qdio.h

  1/* SPDX-License-Identifier: GPL-2.0 */
  2/*
  3 * Copyright IBM Corp. 2000, 2008
  4 * Author(s): Utz Bacher <utz.bacher@de.ibm.com>
  5 *	      Jan Glauber <jang@linux.vnet.ibm.com>
  6 *
  7 */
  8#ifndef __QDIO_H__
  9#define __QDIO_H__
 10
 11#include <linux/interrupt.h>
 12#include <asm/dma-types.h>
 13#include <asm/ccwdev.h>
 14#include <asm/cio.h>
 15
 16/* only use 4 queues to save some cachelines */
 17#define QDIO_MAX_QUEUES_PER_IRQ		4
 18#define QDIO_MAX_BUFFERS_PER_Q		128
 19#define QDIO_MAX_BUFFERS_MASK		(QDIO_MAX_BUFFERS_PER_Q - 1)
 20#define QDIO_BUFNR(num)			((num) & QDIO_MAX_BUFFERS_MASK)
 21#define QDIO_MAX_ELEMENTS_PER_BUFFER	16
 22
 23#define QDIO_QETH_QFMT			0
 24#define QDIO_ZFCP_QFMT			1
 25#define QDIO_IQDIO_QFMT			2
 26
 27/**
 28 * struct qdesfmt0 - queue descriptor, format 0
 29 * @sliba: absolute address of storage list information block
 30 * @sla: absolute address of storage list
 31 * @slsba: absolute address of storage list state block
 32 * @akey: access key for SLIB
 33 * @bkey: access key for SL
 34 * @ckey: access key for SBALs
 35 * @dkey: access key for SLSB
 36 */
 37struct qdesfmt0 {
 38	dma64_t sliba;
 39	dma64_t sla;
 40	dma64_t slsba;
 41	u32	 : 32;
 42	u32 akey : 4;
 43	u32 bkey : 4;
 44	u32 ckey : 4;
 45	u32 dkey : 4;
 46	u32	 : 16;
 47} __attribute__ ((packed));
 48
 49#define QDR_AC_MULTI_BUFFER_ENABLE 0x01
 50
 51/**
 52 * struct qdr - queue description record (QDR)
 53 * @qfmt: queue format
 54 * @ac: adapter characteristics
 55 * @iqdcnt: input queue descriptor count
 56 * @oqdcnt: output queue descriptor count
 57 * @iqdsz: input queue descriptor size
 58 * @oqdsz: output queue descriptor size
 59 * @qiba: absolute address of queue information block
 60 * @qkey: queue information block key
 61 * @qdf0: queue descriptions
 62 */
 63struct qdr {
 64	u32 qfmt   : 8;
 65	u32	   : 16;
 66	u32 ac	   : 8;
 67	u32	   : 8;
 68	u32 iqdcnt : 8;
 69	u32	   : 8;
 70	u32 oqdcnt : 8;
 71	u32	   : 8;
 72	u32 iqdsz  : 8;
 73	u32	   : 8;
 74	u32 oqdsz  : 8;
 75	/* private: */
 76	u32 res[9];
 77	/* public: */
 78	dma64_t qiba;
 79	u32	   : 32;
 80	u32 qkey   : 4;
 81	u32	   : 28;
 82	struct qdesfmt0 qdf0[126];
 83} __packed __aligned(PAGE_SIZE);
 84
 85#define QIB_AC_OUTBOUND_PCI_SUPPORTED	0x40
 86#define QIB_RFLAGS_ENABLE_QEBSM		0x80
 87#define QIB_RFLAGS_ENABLE_DATA_DIV	0x02
 88
 89/**
 90 * struct qib - queue information block (QIB)
 91 * @qfmt: queue format
 92 * @pfmt: implementation dependent parameter format
 93 * @rflags: QEBSM
 94 * @ac: adapter characteristics
 95 * @isliba: logical address of first input SLIB
 96 * @osliba: logical address of first output SLIB
 97 * @ebcnam: adapter identifier in EBCDIC
 98 * @parm: implementation dependent parameters
 99 */
100struct qib {
101	u32 qfmt   : 8;
102	u32 pfmt   : 8;
103	u32 rflags : 8;
104	u32 ac	   : 8;
105	u32	   : 32;
106	u64 isliba;
107	u64 osliba;
108	u32	   : 32;
109	u32	   : 32;
110	u8 ebcnam[8];
111	/* private: */
112	u8 res[88];
113	/* public: */
114	u8 parm[128];
115} __attribute__ ((packed, aligned(256)));
116
117/**
118 * struct slibe - storage list information block element (SLIBE)
119 * @parms: implementation dependent parameters
120 */
121struct slibe {
122	u64 parms;
123};
124
125/**
126 * struct qaob - queue asynchronous operation block
127 * @res0: reserved parameters
128 * @res1: reserved parameter
129 * @res2: reserved parameter
130 * @res3: reserved parameter
131 * @aorc: asynchronous operation return code
132 * @flags: internal flags
133 * @cbtbs: control block type
134 * @sb_count: number of storage blocks
135 * @sba: storage block element addresses
136 * @dcount: size of storage block elements
137 * @user0: user definable value
138 * @res4: reserved parameter
139 * @user1: user definable value
140 */
141struct qaob {
142	u64 res0[6];
143	u8 res1;
144	u8 res2;
145	u8 res3;
146	u8 aorc;
147	u8 flags;
148	u16 cbtbs;
149	u8 sb_count;
150	dma64_t sba[QDIO_MAX_ELEMENTS_PER_BUFFER];
151	u16 dcount[QDIO_MAX_ELEMENTS_PER_BUFFER];
152	u64 user0;
153	u64 res4[2];
154	u8 user1[16];
155} __attribute__ ((packed, aligned(256)));
156
157/**
158 * struct slib - storage list information block (SLIB)
159 * @nsliba: next SLIB address (if any)
160 * @sla: SL address
161 * @slsba: SLSB address
162 * @slibe: SLIB elements
163 */
164struct slib {
165	u64 nsliba;
166	u64 sla;
167	u64 slsba;
168	/* private: */
169	u8 res[1000];
170	/* public: */
171	struct slibe slibe[QDIO_MAX_BUFFERS_PER_Q];
172} __attribute__ ((packed, aligned(2048)));
173
174#define SBAL_EFLAGS_LAST_ENTRY		0x40
175#define SBAL_EFLAGS_CONTIGUOUS		0x20
176#define SBAL_EFLAGS_FIRST_FRAG		0x04
177#define SBAL_EFLAGS_MIDDLE_FRAG		0x08
178#define SBAL_EFLAGS_LAST_FRAG		0x0c
179#define SBAL_EFLAGS_MASK		0x6f
180
181#define SBAL_SFLAGS0_PCI_REQ		0x40
182#define SBAL_SFLAGS0_DATA_CONTINUATION	0x20
183
184/* Awesome OpenFCP extensions */
185#define SBAL_SFLAGS0_TYPE_STATUS	0x00
186#define SBAL_SFLAGS0_TYPE_WRITE		0x08
187#define SBAL_SFLAGS0_TYPE_READ		0x10
188#define SBAL_SFLAGS0_TYPE_WRITE_READ	0x18
189#define SBAL_SFLAGS0_MORE_SBALS		0x04
190#define SBAL_SFLAGS0_COMMAND		0x02
191#define SBAL_SFLAGS0_LAST_SBAL		0x00
192#define SBAL_SFLAGS0_ONLY_SBAL		SBAL_SFLAGS0_COMMAND
193#define SBAL_SFLAGS0_MIDDLE_SBAL	SBAL_SFLAGS0_MORE_SBALS
194#define SBAL_SFLAGS0_FIRST_SBAL (SBAL_SFLAGS0_MORE_SBALS | SBAL_SFLAGS0_COMMAND)
195
196/**
197 * struct qdio_buffer_element - SBAL entry
198 * @eflags: SBAL entry flags
199 * @scount: SBAL count
200 * @sflags: whole SBAL flags
201 * @length: length
202 * @addr: absolute data address
203*/
204struct qdio_buffer_element {
205	u8 eflags;
206	/* private: */
207	u8 res1;
208	/* public: */
209	u8 scount;
210	u8 sflags;
211	u32 length;
212	dma64_t addr;
213} __attribute__ ((packed, aligned(16)));
214
215/**
216 * struct qdio_buffer - storage block address list (SBAL)
217 * @element: SBAL entries
218 */
219struct qdio_buffer {
220	struct qdio_buffer_element element[QDIO_MAX_ELEMENTS_PER_BUFFER];
221} __attribute__ ((packed, aligned(256)));
222
223/**
224 * struct sl_element - storage list entry
225 * @sbal: absolute SBAL address
226 */
227struct sl_element {
228	dma64_t sbal;
229} __attribute__ ((packed));
230
231/**
232 * struct sl - storage list (SL)
233 * @element: SL entries
234 */
235struct sl {
236	struct sl_element element[QDIO_MAX_BUFFERS_PER_Q];
237} __attribute__ ((packed, aligned(1024)));
238
239/**
240 * struct slsb - storage list state block (SLSB)
241 * @val: state per buffer
242 */
243struct slsb {
244	u8 val[QDIO_MAX_BUFFERS_PER_Q];
245} __attribute__ ((packed, aligned(256)));
246
247/* qdio adapter-characteristics-1 flag */
248#define CHSC_AC1_INITIATE_INPUTQ	0x80
249#define AC1_SIGA_INPUT_NEEDED		0x40	/* process input queues */
250#define AC1_SIGA_OUTPUT_NEEDED		0x20	/* process output queues */
251#define AC1_SIGA_SYNC_NEEDED		0x10	/* ask hypervisor to sync */
252#define AC1_AUTOMATIC_SYNC_ON_THININT	0x08	/* set by hypervisor */
253#define AC1_AUTOMATIC_SYNC_ON_OUT_PCI	0x04	/* set by hypervisor */
254#define AC1_SC_QEBSM_AVAILABLE		0x02	/* available for subchannel */
255#define AC1_SC_QEBSM_ENABLED		0x01	/* enabled for subchannel */
256
257#define CHSC_AC2_MULTI_BUFFER_AVAILABLE	0x0080
258#define CHSC_AC2_MULTI_BUFFER_ENABLED	0x0040
259#define CHSC_AC2_DATA_DIV_AVAILABLE	0x0010
260#define CHSC_AC2_SNIFFER_AVAILABLE	0x0008
261#define CHSC_AC2_DATA_DIV_ENABLED	0x0002
262
263#define CHSC_AC3_FORMAT2_CQ_AVAILABLE	0x8000
264
265struct qdio_ssqd_desc {
266	u8 flags;
267	u8:8;
268	u16 sch;
269	u8 qfmt;
270	u8 parm;
271	u8 qdioac1;
272	u8 sch_class;
273	u8 pcnt;
274	u8 icnt;
275	u8:8;
276	u8 ocnt;
277	u8:8;
278	u8 mbccnt;
279	u16 qdioac2;
280	u64 sch_token;
281	u8 mro;
282	u8 mri;
283	u16 qdioac3;
284	u16:16;
285	u8:8;
286	u8 mmwc;
287} __attribute__ ((packed));
288
289/* params are: ccw_device, qdio_error, queue_number,
290   first element processed, number of elements processed, int_parm */
291typedef void qdio_handler_t(struct ccw_device *, unsigned int, int,
292			    int, int, unsigned long);
293
294/* qdio errors reported through the queue handlers: */
295#define QDIO_ERROR_ACTIVATE			0x0001
296#define QDIO_ERROR_GET_BUF_STATE		0x0002
297#define QDIO_ERROR_SET_BUF_STATE		0x0004
298
299/* extra info for completed SBALs: */
300#define QDIO_ERROR_SLSB_STATE			0x0100
301#define QDIO_ERROR_SLSB_PENDING			0x0200
302
303/* for qdio_cleanup */
304#define QDIO_FLAG_CLEANUP_USING_CLEAR		0x01
305#define QDIO_FLAG_CLEANUP_USING_HALT		0x02
306
307/**
308 * struct qdio_initialize - qdio initialization data
309 * @q_format: queue format
310 * @qdr_ac: feature flags to set
311 * @qib_param_field_format: format for qib_parm_field
312 * @qib_param_field: pointer to 128 bytes or NULL, if no param field
313 * @qib_rflags: rflags to set
314 * @no_input_qs: number of input queues
315 * @no_output_qs: number of output queues
316 * @input_handler: handler to be called for input queues, and device-wide errors
317 * @output_handler: handler to be called for output queues
318 * @irq_poll: Data IRQ polling handler
319 * @scan_threshold: # of in-use buffers that triggers scan on output queue
320 * @int_parm: interruption parameter
321 * @input_sbal_addr_array:  per-queue array, each element points to 128 SBALs
322 * @output_sbal_addr_array: per-queue array, each element points to 128 SBALs
323 */
324struct qdio_initialize {
325	unsigned char q_format;
326	unsigned char qdr_ac;
327	unsigned int qib_param_field_format;
328	unsigned char *qib_param_field;
329	unsigned char qib_rflags;
330	unsigned int no_input_qs;
331	unsigned int no_output_qs;
332	qdio_handler_t *input_handler;
333	qdio_handler_t *output_handler;
334	void (*irq_poll)(struct ccw_device *cdev, unsigned long data);
335	unsigned long int_parm;
336	struct qdio_buffer ***input_sbal_addr_array;
337	struct qdio_buffer ***output_sbal_addr_array;
338};
339
340int qdio_alloc_buffers(struct qdio_buffer **buf, unsigned int count);
341void qdio_free_buffers(struct qdio_buffer **buf, unsigned int count);
342void qdio_reset_buffers(struct qdio_buffer **buf, unsigned int count);
343
344extern int qdio_allocate(struct ccw_device *cdev, unsigned int no_input_qs,
345			 unsigned int no_output_qs);
346extern int qdio_establish(struct ccw_device *cdev,
347			  struct qdio_initialize *init_data);
348extern int qdio_activate(struct ccw_device *);
349extern int qdio_start_irq(struct ccw_device *cdev);
350extern int qdio_stop_irq(struct ccw_device *cdev);
351extern int qdio_inspect_input_queue(struct ccw_device *cdev, unsigned int nr,
352				    unsigned int *bufnr, unsigned int *error);
353extern int qdio_inspect_output_queue(struct ccw_device *cdev, unsigned int nr,
354				     unsigned int *bufnr, unsigned int *error);
355extern int qdio_add_bufs_to_input_queue(struct ccw_device *cdev,
356					unsigned int q_nr, unsigned int bufnr,
357					unsigned int count);
358extern int qdio_add_bufs_to_output_queue(struct ccw_device *cdev,
359					 unsigned int q_nr, unsigned int bufnr,
360					 unsigned int count, struct qaob *aob);
361extern int qdio_shutdown(struct ccw_device *, int);
362extern int qdio_free(struct ccw_device *);
363extern int qdio_get_ssqd_desc(struct ccw_device *, struct qdio_ssqd_desc *);
364
365#endif /* __QDIO_H__ */