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thread_info.h

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linux-6.19.14/arch/riscv/include/asm/thread_info.h C
  1/* SPDX-License-Identifier: GPL-2.0-only */
  2/*
  3 * Copyright (C) 2009 Chen Liqin <liqin.chen@sunplusct.com>
  4 * Copyright (C) 2012 Regents of the University of California
  5 * Copyright (C) 2017 SiFive
  6 */
  7
  8#ifndef _ASM_RISCV_THREAD_INFO_H
  9#define _ASM_RISCV_THREAD_INFO_H
 10
 11#include <asm/page.h>
 12#include <linux/const.h>
 13#include <linux/sizes.h>
 14
 15/* thread information allocation */
 16#ifdef CONFIG_KASAN
 17#define KASAN_STACK_ORDER	1
 18#else
 19#define KASAN_STACK_ORDER	0
 20#endif
 21#define THREAD_SIZE_ORDER	(CONFIG_THREAD_SIZE_ORDER + KASAN_STACK_ORDER)
 22#define THREAD_SIZE		(PAGE_SIZE << THREAD_SIZE_ORDER)
 23
 24/*
 25 * By aligning VMAP'd stacks to 2 * THREAD_SIZE, we can detect overflow by
 26 * checking sp & (1 << THREAD_SHIFT), which we can do cheaply in the entry
 27 * assembly.
 28 */
 29#ifdef CONFIG_VMAP_STACK
 30#define THREAD_ALIGN            (2 * THREAD_SIZE)
 31#else
 32#define THREAD_ALIGN            THREAD_SIZE
 33#endif
 34
 35#define THREAD_SHIFT            (PAGE_SHIFT + THREAD_SIZE_ORDER)
 36#define OVERFLOW_STACK_SIZE     SZ_4K
 37
 38#define IRQ_STACK_SIZE		THREAD_SIZE
 39
 40#ifndef __ASSEMBLER__
 41
 42#include <asm/processor.h>
 43#include <asm/csr.h>
 44
 45/*
 46 * low level task data that entry.S needs immediate access to
 47 * - this struct should fit entirely inside of one cache line
 48 * - if the members of this struct changes, the assembly constants
 49 *   in asm-offsets.c must be updated accordingly
 50 * - thread_info is included in task_struct at an offset of 0.  This means that
 51 *   tp points to both thread_info and task_struct.
 52 */
 53struct thread_info {
 54	unsigned long		flags;		/* low level flags */
 55	int                     preempt_count;  /* 0=>preemptible, <0=>BUG */
 56	/*
 57	 * These stack pointers are overwritten on every system call or
 58	 * exception.  SP is also saved to the stack it can be recovered when
 59	 * overwritten.
 60	 */
 61	long			kernel_sp;	/* Kernel stack pointer */
 62	long			user_sp;	/* User stack pointer */
 63	int			cpu;
 64	unsigned long		syscall_work;	/* SYSCALL_WORK_ flags */
 65#ifdef CONFIG_SHADOW_CALL_STACK
 66	void			*scs_base;
 67	void			*scs_sp;
 68#endif
 69#ifdef CONFIG_64BIT
 70	/*
 71	 * Used in handle_exception() to save a0, a1 and a2 before knowing if we
 72	 * can access the kernel stack.
 73	 */
 74	unsigned long		a0, a1, a2;
 75#endif
 76};
 77
 78#ifdef CONFIG_SHADOW_CALL_STACK
 79#define INIT_SCS							\
 80	.scs_base	= init_shadow_call_stack,			\
 81	.scs_sp		= init_shadow_call_stack,
 82#else
 83#define INIT_SCS
 84#endif
 85
 86/*
 87 * macros/functions for gaining access to the thread information structure
 88 *
 89 * preempt_count needs to be 1 initially, until the scheduler is functional.
 90 */
 91#define INIT_THREAD_INFO(tsk)			\
 92{						\
 93	.flags		= 0,			\
 94	.preempt_count	= INIT_PREEMPT_COUNT,	\
 95	INIT_SCS				\
 96}
 97
 98void arch_release_task_struct(struct task_struct *tsk);
 99int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src);
100
101#endif /* !__ASSEMBLER__ */
102
103/*
104 * thread information flags
105 * - these are process state flags that various assembly files may need to
106 *   access
107 * - pending work-to-be-done flags are in lowest half-word
108 * - other flags in upper half-word(s)
109 */
110
111/*
112 * Tell the generic TIF infrastructure which bits riscv supports
113 */
114#define HAVE_TIF_NEED_RESCHED_LAZY
115#define HAVE_TIF_RESTORE_SIGMASK
116
117#include <asm-generic/thread_info_tif.h>
118
119#define TIF_32BIT			16	/* compat-mode 32bit process */
120#define TIF_RISCV_V_DEFER_RESTORE	17	/* restore Vector before returing to user */
121
122#define _TIF_RISCV_V_DEFER_RESTORE	BIT(TIF_RISCV_V_DEFER_RESTORE)
123
124#endif /* _ASM_RISCV_THREAD_INFO_H */
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