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mmu.h

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linux-6.19.14/arch/riscv/include/asm/mmu.h C
 1/* SPDX-License-Identifier: GPL-2.0-only */
 2/*
 3 * Copyright (C) 2012 Regents of the University of California
 4 */
 5
 6
 7#ifndef _ASM_RISCV_MMU_H
 8#define _ASM_RISCV_MMU_H
 9
10#ifndef __ASSEMBLER__
11
12typedef struct {
13#ifndef CONFIG_MMU
14	unsigned long	end_brk;
15#else
16	atomic_long_t id;
17#endif
18	void *vdso;
19#ifdef CONFIG_SMP
20	/* A local icache flush is needed before user execution can resume. */
21	cpumask_t icache_stale_mask;
22	/* Force local icache flush on all migrations. */
23	bool force_icache_flush;
24#endif
25#ifdef CONFIG_BINFMT_ELF_FDPIC
26	unsigned long exec_fdpic_loadmap;
27	unsigned long interp_fdpic_loadmap;
28#endif
29	unsigned long flags;
30#ifdef CONFIG_RISCV_ISA_SUPM
31	u8 pmlen;
32#endif
33} mm_context_t;
34
35/* Lock the pointer masking mode because this mm is multithreaded */
36#define MM_CONTEXT_LOCK_PMLEN	0
37
38#define cntx2asid(cntx)		((cntx) & SATP_ASID_MASK)
39#define cntx2version(cntx)	((cntx) & ~SATP_ASID_MASK)
40
41void __meminit create_pgd_mapping(pgd_t *pgdp, uintptr_t va, phys_addr_t pa, phys_addr_t sz,
42				  pgprot_t prot);
43#endif /* __ASSEMBLER__ */
44
45#endif /* _ASM_RISCV_MMU_H */
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