sm3-riscv64-glue.c

 1// SPDX-License-Identifier: GPL-2.0-or-later
 2/*
 3 * SM3 using the RISC-V vector crypto extensions
 4 *
 5 * Copyright (C) 2023 VRULL GmbH
 6 * Author: Heiko Stuebner <heiko.stuebner@vrull.eu>
 7 *
 8 * Copyright (C) 2023 SiFive, Inc.
 9 * Author: Jerry Shih <jerry.shih@sifive.com>
10 */
11
12#include <asm/simd.h>
13#include <asm/vector.h>
14#include <crypto/internal/hash.h>
15#include <crypto/internal/simd.h>
16#include <crypto/sm3.h>
17#include <crypto/sm3_base.h>
18#include <linux/kernel.h>
19#include <linux/module.h>
20
21/*
22 * Note: the asm function only uses the 'state' field of struct sm3_state.
23 * It is assumed to be the first field.
24 */
25asmlinkage void sm3_transform_zvksh_zvkb(
26	struct sm3_state *state, const u8 *data, int num_blocks);
27
28static void sm3_block(struct sm3_state *state, const u8 *data,
29		      int num_blocks)
30{
31	/*
32	 * Ensure struct sm3_state begins directly with the SM3
33	 * 256-bit internal state, as this is what the asm function expects.
34	 */
35	BUILD_BUG_ON(offsetof(struct sm3_state, state) != 0);
36
37	if (crypto_simd_usable()) {
38		kernel_vector_begin();
39		sm3_transform_zvksh_zvkb(state, data, num_blocks);
40		kernel_vector_end();
41	} else {
42		sm3_block_generic(state, data, num_blocks);
43	}
44}
45
46static int riscv64_sm3_update(struct shash_desc *desc, const u8 *data,
47			      unsigned int len)
48{
49	return sm3_base_do_update_blocks(desc, data, len, sm3_block);
50}
51
52static int riscv64_sm3_finup(struct shash_desc *desc, const u8 *data,
53			     unsigned int len, u8 *out)
54{
55	sm3_base_do_finup(desc, data, len, sm3_block);
56	return sm3_base_finish(desc, out);
57}
58
59static struct shash_alg riscv64_sm3_alg = {
60	.init = sm3_base_init,
61	.update = riscv64_sm3_update,
62	.finup = riscv64_sm3_finup,
63	.descsize = SM3_STATE_SIZE,
64	.digestsize = SM3_DIGEST_SIZE,
65	.base = {
66		.cra_blocksize = SM3_BLOCK_SIZE,
67		.cra_flags = CRYPTO_AHASH_ALG_BLOCK_ONLY |
68			     CRYPTO_AHASH_ALG_FINUP_MAX,
69		.cra_priority = 300,
70		.cra_name = "sm3",
71		.cra_driver_name = "sm3-riscv64-zvksh-zvkb",
72		.cra_module = THIS_MODULE,
73	},
74};
75
76static int __init riscv64_sm3_mod_init(void)
77{
78	if (riscv_isa_extension_available(NULL, ZVKSH) &&
79	    riscv_isa_extension_available(NULL, ZVKB) &&
80	    riscv_vector_vlen() >= 128)
81		return crypto_register_shash(&riscv64_sm3_alg);
82
83	return -ENODEV;
84}
85
86static void __exit riscv64_sm3_mod_exit(void)
87{
88	crypto_unregister_shash(&riscv64_sm3_alg);
89}
90
91module_init(riscv64_sm3_mod_init);
92module_exit(riscv64_sm3_mod_exit);
93
94MODULE_DESCRIPTION("SM3 (RISC-V accelerated)");
95MODULE_AUTHOR("Heiko Stuebner <heiko.stuebner@vrull.eu>");
96MODULE_LICENSE("GPL");
97MODULE_ALIAS_CRYPTO("sm3");