low_i2c.c

   1// SPDX-License-Identifier: GPL-2.0-or-later
   2/*
   3 * arch/powerpc/platforms/powermac/low_i2c.c
   4 *
   5 *  Copyright (C) 2003-2005 Ben. Herrenschmidt (benh@kernel.crashing.org)
   6 *
   7 * The linux i2c layer isn't completely suitable for our needs for various
   8 * reasons ranging from too late initialisation to semantics not perfectly
   9 * matching some requirements of the apple platform functions etc...
  10 *
  11 * This file thus provides a simple low level unified i2c interface for
  12 * powermac that covers the various types of i2c busses used in Apple machines.
  13 * For now, keywest, PMU and SMU, though we could add Cuda, or other bit
  14 * banging busses found on older chipsets in earlier machines if we ever need
  15 * one of them.
  16 *
  17 * The drivers in this file are synchronous/blocking. In addition, the
  18 * keywest one is fairly slow due to the use of msleep instead of interrupts
  19 * as the interrupt is currently used by i2c-keywest. In the long run, we
  20 * might want to get rid of those high-level interfaces to linux i2c layer
  21 * either completely (converting all drivers) or replacing them all with a
  22 * single stub driver on top of this one. Once done, the interrupt will be
  23 * available for our use.
  24 */
  25
  26#undef DEBUG
  27#undef DEBUG_LOW
  28
  29#include <linux/types.h>
  30#include <linux/sched.h>
  31#include <linux/init.h>
  32#include <linux/export.h>
  33#include <linux/adb.h>
  34#include <linux/pmu.h>
  35#include <linux/delay.h>
  36#include <linux/completion.h>
  37#include <linux/platform_device.h>
  38#include <linux/interrupt.h>
  39#include <linux/timer.h>
  40#include <linux/mutex.h>
  41#include <linux/i2c.h>
  42#include <linux/slab.h>
  43#include <linux/of_irq.h>
  44#include <asm/keylargo.h>
  45#include <asm/uninorth.h>
  46#include <asm/io.h>
  47#include <asm/machdep.h>
  48#include <asm/smu.h>
  49#include <asm/pmac_pfunc.h>
  50#include <asm/pmac_low_i2c.h>
  51
  52#ifdef DEBUG
  53#define DBG(x...) do {\
  54		printk(KERN_DEBUG "low_i2c:" x);	\
  55	} while(0)
  56#else
  57#define DBG(x...)
  58#endif
  59
  60#ifdef DEBUG_LOW
  61#define DBG_LOW(x...) do {\
  62		printk(KERN_DEBUG "low_i2c:" x);	\
  63	} while(0)
  64#else
  65#define DBG_LOW(x...)
  66#endif
  67
  68
  69static int pmac_i2c_force_poll = 1;
  70
  71/*
  72 * A bus structure. Each bus in the system has such a structure associated.
  73 */
  74struct pmac_i2c_bus
  75{
  76	struct list_head	link;
  77	struct device_node	*controller;
  78	struct device_node	*busnode;
  79	int			type;
  80	int			flags;
  81	struct i2c_adapter	adapter;
  82	void			*hostdata;
  83	int			channel;	/* some hosts have multiple */
  84	int			mode;		/* current mode */
  85	struct mutex		mutex;
  86	int			opened;
  87	int			polled;		/* open mode */
  88	struct platform_device	*platform_dev;
  89	struct lock_class_key   lock_key;
  90
  91	/* ops */
  92	int (*open)(struct pmac_i2c_bus *bus);
  93	void (*close)(struct pmac_i2c_bus *bus);
  94	int (*xfer)(struct pmac_i2c_bus *bus, u8 addrdir, int subsize,
  95		    u32 subaddr, u8 *data, int len);
  96};
  97
  98static LIST_HEAD(pmac_i2c_busses);
  99
 100/*
 101 * Keywest implementation
 102 */
 103
 104struct pmac_i2c_host_kw
 105{
 106	struct mutex		mutex;		/* Access mutex for use by
 107						 * i2c-keywest */
 108	void __iomem		*base;		/* register base address */
 109	int			bsteps;		/* register stepping */
 110	int			speed;		/* speed */
 111	int			irq;
 112	u8			*data;
 113	unsigned		len;
 114	int			state;
 115	int			rw;
 116	int			polled;
 117	int			result;
 118	struct completion	complete;
 119	spinlock_t		lock;
 120	struct timer_list	timeout_timer;
 121};
 122
 123/* Register indices */
 124typedef enum {
 125	reg_mode = 0,
 126	reg_control,
 127	reg_status,
 128	reg_isr,
 129	reg_ier,
 130	reg_addr,
 131	reg_subaddr,
 132	reg_data
 133} reg_t;
 134
 135/* The Tumbler audio equalizer can be really slow sometimes */
 136#define KW_POLL_TIMEOUT		(2*HZ)
 137
 138/* Mode register */
 139#define KW_I2C_MODE_100KHZ	0x00
 140#define KW_I2C_MODE_50KHZ	0x01
 141#define KW_I2C_MODE_25KHZ	0x02
 142#define KW_I2C_MODE_DUMB	0x00
 143#define KW_I2C_MODE_STANDARD	0x04
 144#define KW_I2C_MODE_STANDARDSUB	0x08
 145#define KW_I2C_MODE_COMBINED	0x0C
 146#define KW_I2C_MODE_MODE_MASK	0x0C
 147#define KW_I2C_MODE_CHAN_MASK	0xF0
 148
 149/* Control register */
 150#define KW_I2C_CTL_AAK		0x01
 151#define KW_I2C_CTL_XADDR	0x02
 152#define KW_I2C_CTL_STOP		0x04
 153#define KW_I2C_CTL_START	0x08
 154
 155/* Status register */
 156#define KW_I2C_STAT_BUSY	0x01
 157#define KW_I2C_STAT_LAST_AAK	0x02
 158#define KW_I2C_STAT_LAST_RW	0x04
 159#define KW_I2C_STAT_SDA		0x08
 160#define KW_I2C_STAT_SCL		0x10
 161
 162/* IER & ISR registers */
 163#define KW_I2C_IRQ_DATA		0x01
 164#define KW_I2C_IRQ_ADDR		0x02
 165#define KW_I2C_IRQ_STOP		0x04
 166#define KW_I2C_IRQ_START	0x08
 167#define KW_I2C_IRQ_MASK		0x0F
 168
 169/* State machine states */
 170enum {
 171	state_idle,
 172	state_addr,
 173	state_read,
 174	state_write,
 175	state_stop,
 176	state_dead
 177};
 178
 179#define WRONG_STATE(name) do {\
 180		printk(KERN_DEBUG "KW: wrong state. Got %s, state: %s " \
 181		       "(isr: %02x)\n",	\
 182		       name, __kw_state_names[host->state], isr); \
 183	} while(0)
 184
 185static const char *__kw_state_names[] = {
 186	"state_idle",
 187	"state_addr",
 188	"state_read",
 189	"state_write",
 190	"state_stop",
 191	"state_dead"
 192};
 193
 194static inline u8 __kw_read_reg(struct pmac_i2c_host_kw *host, reg_t reg)
 195{
 196	return readb(host->base + (((unsigned int)reg) << host->bsteps));
 197}
 198
 199static inline void __kw_write_reg(struct pmac_i2c_host_kw *host,
 200				  reg_t reg, u8 val)
 201{
 202	writeb(val, host->base + (((unsigned)reg) << host->bsteps));
 203	(void)__kw_read_reg(host, reg_subaddr);
 204}
 205
 206#define kw_write_reg(reg, val)	__kw_write_reg(host, reg, val)
 207#define kw_read_reg(reg)	__kw_read_reg(host, reg)
 208
 209static u8 kw_i2c_wait_interrupt(struct pmac_i2c_host_kw *host)
 210{
 211	int i, j;
 212	u8 isr;
 213	
 214	for (i = 0; i < 1000; i++) {
 215		isr = kw_read_reg(reg_isr) & KW_I2C_IRQ_MASK;
 216		if (isr != 0)
 217			return isr;
 218
 219		/* This code is used with the timebase frozen, we cannot rely
 220		 * on udelay nor schedule when in polled mode !
 221		 * For now, just use a bogus loop....
 222		 */
 223		if (host->polled) {
 224			for (j = 1; j < 100000; j++)
 225				mb();
 226		} else
 227			msleep(1);
 228	}
 229	return isr;
 230}
 231
 232static void kw_i2c_do_stop(struct pmac_i2c_host_kw *host, int result)
 233{
 234	kw_write_reg(reg_control, KW_I2C_CTL_STOP);
 235	host->state = state_stop;
 236	host->result = result;
 237}
 238
 239
 240static void kw_i2c_handle_interrupt(struct pmac_i2c_host_kw *host, u8 isr)
 241{
 242	u8 ack;
 243
 244	DBG_LOW("kw_handle_interrupt(%s, isr: %x)\n",
 245		__kw_state_names[host->state], isr);
 246
 247	if (host->state == state_idle) {
 248		printk(KERN_WARNING "low_i2c: Keywest got an out of state"
 249		       " interrupt, ignoring\n");
 250		kw_write_reg(reg_isr, isr);
 251		return;
 252	}
 253
 254	if (isr == 0) {
 255		printk(KERN_WARNING "low_i2c: Timeout in i2c transfer"
 256		       " on keywest !\n");
 257		if (host->state != state_stop) {
 258			kw_i2c_do_stop(host, -EIO);
 259			return;
 260		}
 261		ack = kw_read_reg(reg_status);
 262		if (ack & KW_I2C_STAT_BUSY)
 263			kw_write_reg(reg_status, 0);
 264		host->state = state_idle;
 265		kw_write_reg(reg_ier, 0x00);
 266		if (!host->polled)
 267			complete(&host->complete);
 268		return;
 269	}
 270
 271	if (isr & KW_I2C_IRQ_ADDR) {
 272		ack = kw_read_reg(reg_status);
 273		if (host->state != state_addr) {
 274			WRONG_STATE("KW_I2C_IRQ_ADDR"); 
 275			kw_i2c_do_stop(host, -EIO);
 276		}
 277		if ((ack & KW_I2C_STAT_LAST_AAK) == 0) {
 278			host->result = -ENXIO;
 279			host->state = state_stop;
 280			DBG_LOW("KW: NAK on address\n");
 281		} else {
 282			if (host->len == 0)
 283				kw_i2c_do_stop(host, 0);
 284			else if (host->rw) {
 285				host->state = state_read;
 286				if (host->len > 1)
 287					kw_write_reg(reg_control,
 288						     KW_I2C_CTL_AAK);
 289			} else {
 290				host->state = state_write;
 291				kw_write_reg(reg_data, *(host->data++));
 292				host->len--;
 293			}
 294		}
 295		kw_write_reg(reg_isr, KW_I2C_IRQ_ADDR);
 296	}
 297
 298	if (isr & KW_I2C_IRQ_DATA) {
 299		if (host->state == state_read) {
 300			*(host->data++) = kw_read_reg(reg_data);
 301			host->len--;
 302			kw_write_reg(reg_isr, KW_I2C_IRQ_DATA);
 303			if (host->len == 0)
 304				host->state = state_stop;
 305			else if (host->len == 1)
 306				kw_write_reg(reg_control, 0);
 307		} else if (host->state == state_write) {
 308			ack = kw_read_reg(reg_status);
 309			if ((ack & KW_I2C_STAT_LAST_AAK) == 0) {
 310				DBG_LOW("KW: nack on data write\n");
 311				host->result = -EFBIG;
 312				host->state = state_stop;
 313			} else if (host->len) {
 314				kw_write_reg(reg_data, *(host->data++));
 315				host->len--;
 316			} else
 317				kw_i2c_do_stop(host, 0);
 318		} else {
 319			WRONG_STATE("KW_I2C_IRQ_DATA"); 
 320			if (host->state != state_stop)
 321				kw_i2c_do_stop(host, -EIO);
 322		}
 323		kw_write_reg(reg_isr, KW_I2C_IRQ_DATA);
 324	}
 325
 326	if (isr & KW_I2C_IRQ_STOP) {
 327		kw_write_reg(reg_isr, KW_I2C_IRQ_STOP);
 328		if (host->state != state_stop) {
 329			WRONG_STATE("KW_I2C_IRQ_STOP");
 330			host->result = -EIO;
 331		}
 332		host->state = state_idle;
 333		if (!host->polled)
 334			complete(&host->complete);
 335	}
 336
 337	/* Below should only happen in manual mode which we don't use ... */
 338	if (isr & KW_I2C_IRQ_START)
 339		kw_write_reg(reg_isr, KW_I2C_IRQ_START);
 340
 341}
 342
 343/* Interrupt handler */
 344static irqreturn_t kw_i2c_irq(int irq, void *dev_id)
 345{
 346	struct pmac_i2c_host_kw *host = dev_id;
 347	unsigned long flags;
 348
 349	spin_lock_irqsave(&host->lock, flags);
 350	timer_delete(&host->timeout_timer);
 351	kw_i2c_handle_interrupt(host, kw_read_reg(reg_isr));
 352	if (host->state != state_idle) {
 353		host->timeout_timer.expires = jiffies + KW_POLL_TIMEOUT;
 354		add_timer(&host->timeout_timer);
 355	}
 356	spin_unlock_irqrestore(&host->lock, flags);
 357	return IRQ_HANDLED;
 358}
 359
 360static void kw_i2c_timeout(struct timer_list *t)
 361{
 362	struct pmac_i2c_host_kw *host = timer_container_of(host, t,
 363							   timeout_timer);
 364	unsigned long flags;
 365
 366	spin_lock_irqsave(&host->lock, flags);
 367
 368	/*
 369	 * If the timer is pending, that means we raced with the
 370	 * irq, in which case we just return
 371	 */
 372	if (timer_pending(&host->timeout_timer))
 373		goto skip;
 374
 375	kw_i2c_handle_interrupt(host, kw_read_reg(reg_isr));
 376	if (host->state != state_idle) {
 377		host->timeout_timer.expires = jiffies + KW_POLL_TIMEOUT;
 378		add_timer(&host->timeout_timer);
 379	}
 380 skip:
 381	spin_unlock_irqrestore(&host->lock, flags);
 382}
 383
 384static int kw_i2c_open(struct pmac_i2c_bus *bus)
 385{
 386	struct pmac_i2c_host_kw *host = bus->hostdata;
 387	mutex_lock(&host->mutex);
 388	return 0;
 389}
 390
 391static void kw_i2c_close(struct pmac_i2c_bus *bus)
 392{
 393	struct pmac_i2c_host_kw *host = bus->hostdata;
 394	mutex_unlock(&host->mutex);
 395}
 396
 397static int kw_i2c_xfer(struct pmac_i2c_bus *bus, u8 addrdir, int subsize,
 398		       u32 subaddr, u8 *data, int len)
 399{
 400	struct pmac_i2c_host_kw *host = bus->hostdata;
 401	u8 mode_reg = host->speed;
 402	int use_irq = host->irq && !bus->polled;
 403
 404	/* Setup mode & subaddress if any */
 405	switch(bus->mode) {
 406	case pmac_i2c_mode_dumb:
 407		return -EINVAL;
 408	case pmac_i2c_mode_std:
 409		mode_reg |= KW_I2C_MODE_STANDARD;
 410		if (subsize != 0)
 411			return -EINVAL;
 412		break;
 413	case pmac_i2c_mode_stdsub:
 414		mode_reg |= KW_I2C_MODE_STANDARDSUB;
 415		if (subsize != 1)
 416			return -EINVAL;
 417		break;
 418	case pmac_i2c_mode_combined:
 419		mode_reg |= KW_I2C_MODE_COMBINED;
 420		if (subsize != 1)
 421			return -EINVAL;
 422		break;
 423	}
 424
 425	/* Setup channel & clear pending irqs */
 426	kw_write_reg(reg_isr, kw_read_reg(reg_isr));
 427	kw_write_reg(reg_mode, mode_reg | (bus->channel << 4));
 428	kw_write_reg(reg_status, 0);
 429
 430	/* Set up address and r/w bit, strip possible stale bus number from
 431	 * address top bits
 432	 */
 433	kw_write_reg(reg_addr, addrdir & 0xff);
 434
 435	/* Set up the sub address */
 436	if ((mode_reg & KW_I2C_MODE_MODE_MASK) == KW_I2C_MODE_STANDARDSUB
 437	    || (mode_reg & KW_I2C_MODE_MODE_MASK) == KW_I2C_MODE_COMBINED)
 438		kw_write_reg(reg_subaddr, subaddr);
 439
 440	/* Prepare for async operations */
 441	host->data = data;
 442	host->len = len;
 443	host->state = state_addr;
 444	host->result = 0;
 445	host->rw = (addrdir & 1);
 446	host->polled = bus->polled;
 447
 448	/* Enable interrupt if not using polled mode and interrupt is
 449	 * available
 450	 */
 451	if (use_irq) {
 452		/* Clear completion */
 453		reinit_completion(&host->complete);
 454		/* Ack stale interrupts */
 455		kw_write_reg(reg_isr, kw_read_reg(reg_isr));
 456		/* Arm timeout */
 457		host->timeout_timer.expires = jiffies + KW_POLL_TIMEOUT;
 458		add_timer(&host->timeout_timer);
 459		/* Enable emission */
 460		kw_write_reg(reg_ier, KW_I2C_IRQ_MASK);
 461	}
 462
 463	/* Start sending address */
 464	kw_write_reg(reg_control, KW_I2C_CTL_XADDR);
 465
 466	/* Wait for completion */
 467	if (use_irq)
 468		wait_for_completion(&host->complete);
 469	else {
 470		while(host->state != state_idle) {
 471			unsigned long flags;
 472
 473			u8 isr = kw_i2c_wait_interrupt(host);
 474			spin_lock_irqsave(&host->lock, flags);
 475			kw_i2c_handle_interrupt(host, isr);
 476			spin_unlock_irqrestore(&host->lock, flags);
 477		}
 478	}
 479
 480	/* Disable emission */
 481	kw_write_reg(reg_ier, 0);
 482
 483	return host->result;
 484}
 485
 486static struct pmac_i2c_host_kw *__init kw_i2c_host_init(struct device_node *np)
 487{
 488	struct pmac_i2c_host_kw *host;
 489	const u32		*psteps, *prate, *addrp;
 490	u32			steps;
 491
 492	host = kzalloc(sizeof(*host), GFP_KERNEL);
 493	if (host == NULL) {
 494		printk(KERN_ERR "low_i2c: Can't allocate host for %pOF\n",
 495		       np);
 496		return NULL;
 497	}
 498
 499	/* Apple is kind enough to provide a valid AAPL,address property
 500	 * on all i2c keywest nodes so far ... we would have to fallback
 501	 * to macio parsing if that wasn't the case
 502	 */
 503	addrp = of_get_property(np, "AAPL,address", NULL);
 504	if (addrp == NULL) {
 505		printk(KERN_ERR "low_i2c: Can't find address for %pOF\n",
 506		       np);
 507		kfree(host);
 508		return NULL;
 509	}
 510	mutex_init(&host->mutex);
 511	init_completion(&host->complete);
 512	spin_lock_init(&host->lock);
 513	timer_setup(&host->timeout_timer, kw_i2c_timeout, 0);
 514
 515	psteps = of_get_property(np, "AAPL,address-step", NULL);
 516	steps = psteps ? (*psteps) : 0x10;
 517	for (host->bsteps = 0; (steps & 0x01) == 0; host->bsteps++)
 518		steps >>= 1;
 519	/* Select interface rate */
 520	host->speed = KW_I2C_MODE_25KHZ;
 521	prate = of_get_property(np, "AAPL,i2c-rate", NULL);
 522	if (prate) switch(*prate) {
 523	case 100:
 524		host->speed = KW_I2C_MODE_100KHZ;
 525		break;
 526	case 50:
 527		host->speed = KW_I2C_MODE_50KHZ;
 528		break;
 529	case 25:
 530		host->speed = KW_I2C_MODE_25KHZ;
 531		break;
 532	}	
 533	host->irq = irq_of_parse_and_map(np, 0);
 534	if (!host->irq)
 535		printk(KERN_WARNING
 536		       "low_i2c: Failed to map interrupt for %pOF\n",
 537		       np);
 538
 539	host->base = ioremap((*addrp), 0x1000);
 540	if (host->base == NULL) {
 541		printk(KERN_ERR "low_i2c: Can't map registers for %pOF\n",
 542		       np);
 543		kfree(host);
 544		return NULL;
 545	}
 546
 547	/* Make sure IRQ is disabled */
 548	kw_write_reg(reg_ier, 0);
 549
 550	/* Request chip interrupt. We set IRQF_NO_SUSPEND because we don't
 551	 * want that interrupt disabled between the 2 passes of driver
 552	 * suspend or we'll have issues running the pfuncs
 553	 */
 554	if (request_irq(host->irq, kw_i2c_irq, IRQF_NO_SUSPEND,
 555			"keywest i2c", host))
 556		host->irq = 0;
 557
 558	printk(KERN_INFO "KeyWest i2c @0x%08x irq %d %pOF\n",
 559	       *addrp, host->irq, np);
 560
 561	return host;
 562}
 563
 564
 565static void __init kw_i2c_add(struct pmac_i2c_host_kw *host,
 566			      struct device_node *controller,
 567			      struct device_node *busnode,
 568			      int channel)
 569{
 570	struct pmac_i2c_bus *bus;
 571
 572	bus = kzalloc(sizeof(struct pmac_i2c_bus), GFP_KERNEL);
 573	if (bus == NULL)
 574		return;
 575
 576	bus->controller = of_node_get(controller);
 577	bus->busnode = of_node_get(busnode);
 578	bus->type = pmac_i2c_bus_keywest;
 579	bus->hostdata = host;
 580	bus->channel = channel;
 581	bus->mode = pmac_i2c_mode_std;
 582	bus->open = kw_i2c_open;
 583	bus->close = kw_i2c_close;
 584	bus->xfer = kw_i2c_xfer;
 585	mutex_init(&bus->mutex);
 586	lockdep_register_key(&bus->lock_key);
 587	lockdep_set_class(&bus->mutex, &bus->lock_key);
 588	if (controller == busnode)
 589		bus->flags = pmac_i2c_multibus;
 590	list_add(&bus->link, &pmac_i2c_busses);
 591
 592	printk(KERN_INFO " channel %d bus %s\n", channel,
 593	       (controller == busnode) ? "<multibus>" : busnode->full_name);
 594}
 595
 596static void __init kw_i2c_probe(void)
 597{
 598	struct device_node *np, *child, *parent;
 599
 600	/* Probe keywest-i2c busses */
 601	for_each_compatible_node(np, "i2c","keywest-i2c") {
 602		struct pmac_i2c_host_kw *host;
 603		int multibus;
 604
 605		/* Found one, init a host structure */
 606		host = kw_i2c_host_init(np);
 607		if (host == NULL)
 608			continue;
 609
 610		/* Now check if we have a multibus setup (old style) or if we
 611		 * have proper bus nodes. Note that the "new" way (proper bus
 612		 * nodes) might cause us to not create some busses that are
 613		 * kept hidden in the device-tree. In the future, we might
 614		 * want to work around that by creating busses without a node
 615		 * but not for now
 616		 */
 617		child = of_get_next_child(np, NULL);
 618		multibus = !of_node_name_eq(child, "i2c-bus");
 619		of_node_put(child);
 620
 621		/* For a multibus setup, we get the bus count based on the
 622		 * parent type
 623		 */
 624		if (multibus) {
 625			int chans, i;
 626
 627			parent = of_get_parent(np);
 628			if (parent == NULL)
 629				continue;
 630			chans = parent->name[0] == 'u' ? 2 : 1;
 631			of_node_put(parent);
 632			for (i = 0; i < chans; i++)
 633				kw_i2c_add(host, np, np, i);
 634		} else {
 635			for_each_child_of_node(np, child) {
 636				const u32 *reg = of_get_property(child,
 637						"reg", NULL);
 638				if (reg == NULL)
 639					continue;
 640				kw_i2c_add(host, np, child, *reg);
 641			}
 642		}
 643	}
 644}
 645
 646
 647/*
 648 *
 649 * PMU implementation
 650 *
 651 */
 652
 653#ifdef CONFIG_ADB_PMU
 654
 655/*
 656 * i2c command block to the PMU
 657 */
 658struct pmu_i2c_hdr {
 659	u8	bus;
 660	u8	mode;
 661	u8	bus2;
 662	u8	address;
 663	u8	sub_addr;
 664	u8	comb_addr;
 665	u8	count;
 666	u8	data[];
 667};
 668
 669static void pmu_i2c_complete(struct adb_request *req)
 670{
 671	complete(req->arg);
 672}
 673
 674static int pmu_i2c_xfer(struct pmac_i2c_bus *bus, u8 addrdir, int subsize,
 675			u32 subaddr, u8 *data, int len)
 676{
 677	struct adb_request *req = bus->hostdata;
 678	struct pmu_i2c_hdr *hdr = (struct pmu_i2c_hdr *)&req->data[1];
 679	struct completion comp;
 680	int read = addrdir & 1;
 681	int retry;
 682	int rc = 0;
 683
 684	/* For now, limit ourselves to 16 bytes transfers */
 685	if (len > 16)
 686		return -EINVAL;
 687
 688	init_completion(&comp);
 689
 690	for (retry = 0; retry < 16; retry++) {
 691		memset(req, 0, sizeof(struct adb_request));
 692		hdr->bus = bus->channel;
 693		hdr->count = len;
 694
 695		switch(bus->mode) {
 696		case pmac_i2c_mode_std:
 697			if (subsize != 0)
 698				return -EINVAL;
 699			hdr->address = addrdir;
 700			hdr->mode = PMU_I2C_MODE_SIMPLE;
 701			break;
 702		case pmac_i2c_mode_stdsub:
 703		case pmac_i2c_mode_combined:
 704			if (subsize != 1)
 705				return -EINVAL;
 706			hdr->address = addrdir & 0xfe;
 707			hdr->comb_addr = addrdir;
 708			hdr->sub_addr = subaddr;
 709			if (bus->mode == pmac_i2c_mode_stdsub)
 710				hdr->mode = PMU_I2C_MODE_STDSUB;
 711			else
 712				hdr->mode = PMU_I2C_MODE_COMBINED;
 713			break;
 714		default:
 715			return -EINVAL;
 716		}
 717
 718		reinit_completion(&comp);
 719		req->data[0] = PMU_I2C_CMD;
 720		req->reply[0] = 0xff;
 721		req->nbytes = sizeof(struct pmu_i2c_hdr) + 1;
 722		req->done = pmu_i2c_complete;
 723		req->arg = &comp;
 724		if (!read && len) {
 725			memcpy(hdr->data, data, len);
 726			req->nbytes += len;
 727		}
 728		rc = pmu_queue_request(req);
 729		if (rc)
 730			return rc;
 731		wait_for_completion(&comp);
 732		if (req->reply[0] == PMU_I2C_STATUS_OK)
 733			break;
 734		msleep(15);
 735	}
 736	if (req->reply[0] != PMU_I2C_STATUS_OK)
 737		return -EIO;
 738
 739	for (retry = 0; retry < 16; retry++) {
 740		memset(req, 0, sizeof(struct adb_request));
 741
 742		/* I know that looks like a lot, slow as hell, but darwin
 743		 * does it so let's be on the safe side for now
 744		 */
 745		msleep(15);
 746
 747		hdr->bus = PMU_I2C_BUS_STATUS;
 748
 749		reinit_completion(&comp);
 750		req->data[0] = PMU_I2C_CMD;
 751		req->reply[0] = 0xff;
 752		req->nbytes = 2;
 753		req->done = pmu_i2c_complete;
 754		req->arg = &comp;
 755		rc = pmu_queue_request(req);
 756		if (rc)
 757			return rc;
 758		wait_for_completion(&comp);
 759
 760		if (req->reply[0] == PMU_I2C_STATUS_OK && !read)
 761			return 0;
 762		if (req->reply[0] == PMU_I2C_STATUS_DATAREAD && read) {
 763			int rlen = req->reply_len - 1;
 764
 765			if (rlen != len) {
 766				printk(KERN_WARNING "low_i2c: PMU returned %d"
 767				       " bytes, expected %d !\n", rlen, len);
 768				return -EIO;
 769			}
 770			if (len)
 771				memcpy(data, &req->reply[1], len);
 772			return 0;
 773		}
 774	}
 775	return -EIO;
 776}
 777
 778static void __init pmu_i2c_probe(void)
 779{
 780	struct pmac_i2c_bus *bus;
 781	struct device_node *busnode;
 782	int channel, sz;
 783
 784	if (!pmu_present())
 785		return;
 786
 787	/* There might or might not be a "pmu-i2c" node, we use that
 788	 * or via-pmu itself, whatever we find. I haven't seen a machine
 789	 * with separate bus nodes, so we assume a multibus setup
 790	 */
 791	busnode = of_find_node_by_name(NULL, "pmu-i2c");
 792	if (busnode == NULL)
 793		busnode = of_find_node_by_name(NULL, "via-pmu");
 794	if (busnode == NULL)
 795		return;
 796
 797	printk(KERN_INFO "PMU i2c %pOF\n", busnode);
 798
 799	/*
 800	 * We add bus 1 and 2 only for now, bus 0 is "special"
 801	 */
 802	for (channel = 1; channel <= 2; channel++) {
 803		sz = sizeof(struct pmac_i2c_bus) + sizeof(struct adb_request);
 804		bus = kzalloc(sz, GFP_KERNEL);
 805		if (bus == NULL)
 806			return;
 807
 808		bus->controller = busnode;
 809		bus->busnode = busnode;
 810		bus->type = pmac_i2c_bus_pmu;
 811		bus->channel = channel;
 812		bus->mode = pmac_i2c_mode_std;
 813		bus->hostdata = bus + 1;
 814		bus->xfer = pmu_i2c_xfer;
 815		mutex_init(&bus->mutex);
 816		lockdep_register_key(&bus->lock_key);
 817		lockdep_set_class(&bus->mutex, &bus->lock_key);
 818		bus->flags = pmac_i2c_multibus;
 819		list_add(&bus->link, &pmac_i2c_busses);
 820
 821		printk(KERN_INFO " channel %d bus <multibus>\n", channel);
 822	}
 823}
 824
 825#endif /* CONFIG_ADB_PMU */
 826
 827
 828/*
 829 *
 830 * SMU implementation
 831 *
 832 */
 833
 834#ifdef CONFIG_PMAC_SMU
 835
 836static void smu_i2c_complete(struct smu_i2c_cmd *cmd, void *misc)
 837{
 838	complete(misc);
 839}
 840
 841static int smu_i2c_xfer(struct pmac_i2c_bus *bus, u8 addrdir, int subsize,
 842			u32 subaddr, u8 *data, int len)
 843{
 844	struct smu_i2c_cmd *cmd = bus->hostdata;
 845	struct completion comp;
 846	int read = addrdir & 1;
 847	int rc = 0;
 848
 849	if ((read && len > SMU_I2C_READ_MAX) ||
 850	    ((!read) && len > SMU_I2C_WRITE_MAX))
 851		return -EINVAL;
 852
 853	memset(cmd, 0, sizeof(struct smu_i2c_cmd));
 854	cmd->info.bus = bus->channel;
 855	cmd->info.devaddr = addrdir;
 856	cmd->info.datalen = len;
 857
 858	switch(bus->mode) {
 859	case pmac_i2c_mode_std:
 860		if (subsize != 0)
 861			return -EINVAL;
 862		cmd->info.type = SMU_I2C_TRANSFER_SIMPLE;
 863		break;
 864	case pmac_i2c_mode_stdsub:
 865	case pmac_i2c_mode_combined:
 866		if (subsize > 3 || subsize < 1)
 867			return -EINVAL;
 868		cmd->info.sublen = subsize;
 869		/* that's big-endian only but heh ! */
 870		memcpy(&cmd->info.subaddr, ((char *)&subaddr) + (4 - subsize),
 871		       subsize);
 872		if (bus->mode == pmac_i2c_mode_stdsub)
 873			cmd->info.type = SMU_I2C_TRANSFER_STDSUB;
 874		else
 875			cmd->info.type = SMU_I2C_TRANSFER_COMBINED;
 876		break;
 877	default:
 878		return -EINVAL;
 879	}
 880	if (!read && len)
 881		memcpy(cmd->info.data, data, len);
 882
 883	init_completion(&comp);
 884	cmd->done = smu_i2c_complete;
 885	cmd->misc = &comp;
 886	rc = smu_queue_i2c(cmd);
 887	if (rc < 0)
 888		return rc;
 889	wait_for_completion(&comp);
 890	rc = cmd->status;
 891
 892	if (read && len)
 893		memcpy(data, cmd->info.data, len);
 894	return rc < 0 ? rc : 0;
 895}
 896
 897static void __init smu_i2c_probe(void)
 898{
 899	struct device_node *controller, *busnode;
 900	struct pmac_i2c_bus *bus;
 901	const u32 *reg;
 902	int sz;
 903
 904	if (!smu_present())
 905		return;
 906
 907	controller = of_find_node_by_name(NULL, "smu-i2c-control");
 908	if (controller == NULL)
 909		controller = of_find_node_by_name(NULL, "smu");
 910	if (controller == NULL)
 911		return;
 912
 913	printk(KERN_INFO "SMU i2c %pOF\n", controller);
 914
 915	/* Look for childs, note that they might not be of the right
 916	 * type as older device trees mix i2c busses and other things
 917	 * at the same level
 918	 */
 919	for_each_child_of_node(controller, busnode) {
 920		if (!of_node_is_type(busnode, "i2c") &&
 921		    !of_node_is_type(busnode, "i2c-bus"))
 922			continue;
 923		reg = of_get_property(busnode, "reg", NULL);
 924		if (reg == NULL)
 925			continue;
 926
 927		sz = sizeof(struct pmac_i2c_bus) + sizeof(struct smu_i2c_cmd);
 928		bus = kzalloc(sz, GFP_KERNEL);
 929		if (bus == NULL) {
 930			of_node_put(busnode);
 931			return;
 932		}
 933
 934		bus->controller = controller;
 935		bus->busnode = of_node_get(busnode);
 936		bus->type = pmac_i2c_bus_smu;
 937		bus->channel = *reg;
 938		bus->mode = pmac_i2c_mode_std;
 939		bus->hostdata = bus + 1;
 940		bus->xfer = smu_i2c_xfer;
 941		mutex_init(&bus->mutex);
 942		lockdep_register_key(&bus->lock_key);
 943		lockdep_set_class(&bus->mutex, &bus->lock_key);
 944		bus->flags = 0;
 945		list_add(&bus->link, &pmac_i2c_busses);
 946
 947		printk(KERN_INFO " channel %x bus %pOF\n",
 948		       bus->channel, busnode);
 949	}
 950}
 951
 952#endif /* CONFIG_PMAC_SMU */
 953
 954/*
 955 *
 956 * Core code
 957 *
 958 */
 959
 960
 961struct pmac_i2c_bus *pmac_i2c_find_bus(struct device_node *node)
 962{
 963	struct device_node *p = of_node_get(node);
 964	struct device_node *prev = NULL;
 965	struct pmac_i2c_bus *bus;
 966
 967	while(p) {
 968		list_for_each_entry(bus, &pmac_i2c_busses, link) {
 969			if (p == bus->busnode) {
 970				if (prev && bus->flags & pmac_i2c_multibus) {
 971					const u32 *reg;
 972					reg = of_get_property(prev, "reg",
 973								NULL);
 974					if (!reg)
 975						continue;
 976					if (((*reg) >> 8) != bus->channel)
 977						continue;
 978				}
 979				of_node_put(p);
 980				of_node_put(prev);
 981				return bus;
 982			}
 983		}
 984		of_node_put(prev);
 985		prev = p;
 986		p = of_get_parent(p);
 987	}
 988	return NULL;
 989}
 990EXPORT_SYMBOL_GPL(pmac_i2c_find_bus);
 991
 992u8 pmac_i2c_get_dev_addr(struct device_node *device)
 993{
 994	const u32 *reg = of_get_property(device, "reg", NULL);
 995
 996	if (reg == NULL)
 997		return 0;
 998
 999	return (*reg) & 0xff;
1000}
1001EXPORT_SYMBOL_GPL(pmac_i2c_get_dev_addr);
1002
1003struct device_node *pmac_i2c_get_controller(struct pmac_i2c_bus *bus)
1004{
1005	return bus->controller;
1006}
1007EXPORT_SYMBOL_GPL(pmac_i2c_get_controller);
1008
1009struct device_node *pmac_i2c_get_bus_node(struct pmac_i2c_bus *bus)
1010{
1011	return bus->busnode;
1012}
1013EXPORT_SYMBOL_GPL(pmac_i2c_get_bus_node);
1014
1015int pmac_i2c_get_type(struct pmac_i2c_bus *bus)
1016{
1017	return bus->type;
1018}
1019EXPORT_SYMBOL_GPL(pmac_i2c_get_type);
1020
1021int pmac_i2c_get_flags(struct pmac_i2c_bus *bus)
1022{
1023	return bus->flags;
1024}
1025EXPORT_SYMBOL_GPL(pmac_i2c_get_flags);
1026
1027int pmac_i2c_get_channel(struct pmac_i2c_bus *bus)
1028{
1029	return bus->channel;
1030}
1031EXPORT_SYMBOL_GPL(pmac_i2c_get_channel);
1032
1033
1034struct i2c_adapter *pmac_i2c_get_adapter(struct pmac_i2c_bus *bus)
1035{
1036	return &bus->adapter;
1037}
1038EXPORT_SYMBOL_GPL(pmac_i2c_get_adapter);
1039
1040struct pmac_i2c_bus *pmac_i2c_adapter_to_bus(struct i2c_adapter *adapter)
1041{
1042	struct pmac_i2c_bus *bus;
1043
1044	list_for_each_entry(bus, &pmac_i2c_busses, link)
1045		if (&bus->adapter == adapter)
1046			return bus;
1047	return NULL;
1048}
1049EXPORT_SYMBOL_GPL(pmac_i2c_adapter_to_bus);
1050
1051int pmac_i2c_match_adapter(struct device_node *dev, struct i2c_adapter *adapter)
1052{
1053	struct pmac_i2c_bus *bus = pmac_i2c_find_bus(dev);
1054
1055	if (bus == NULL)
1056		return 0;
1057	return (&bus->adapter == adapter);
1058}
1059EXPORT_SYMBOL_GPL(pmac_i2c_match_adapter);
1060
1061int pmac_low_i2c_lock(struct device_node *np)
1062{
1063	struct pmac_i2c_bus *bus, *found = NULL;
1064
1065	list_for_each_entry(bus, &pmac_i2c_busses, link) {
1066		if (np == bus->controller) {
1067			found = bus;
1068			break;
1069		}
1070	}
1071	if (!found)
1072		return -ENODEV;
1073	return pmac_i2c_open(bus, 0);
1074}
1075EXPORT_SYMBOL_GPL(pmac_low_i2c_lock);
1076
1077int pmac_low_i2c_unlock(struct device_node *np)
1078{
1079	struct pmac_i2c_bus *bus, *found = NULL;
1080
1081	list_for_each_entry(bus, &pmac_i2c_busses, link) {
1082		if (np == bus->controller) {
1083			found = bus;
1084			break;
1085		}
1086	}
1087	if (!found)
1088		return -ENODEV;
1089	pmac_i2c_close(bus);
1090	return 0;
1091}
1092EXPORT_SYMBOL_GPL(pmac_low_i2c_unlock);
1093
1094
1095int pmac_i2c_open(struct pmac_i2c_bus *bus, int polled)
1096{
1097	int rc;
1098
1099	mutex_lock(&bus->mutex);
1100	bus->polled = polled || pmac_i2c_force_poll;
1101	bus->opened = 1;
1102	bus->mode = pmac_i2c_mode_std;
1103	if (bus->open && (rc = bus->open(bus)) != 0) {
1104		bus->opened = 0;
1105		mutex_unlock(&bus->mutex);
1106		return rc;
1107	}
1108	return 0;
1109}
1110EXPORT_SYMBOL_GPL(pmac_i2c_open);
1111
1112void pmac_i2c_close(struct pmac_i2c_bus *bus)
1113{
1114	WARN_ON(!bus->opened);
1115	if (bus->close)
1116		bus->close(bus);
1117	bus->opened = 0;
1118	mutex_unlock(&bus->mutex);
1119}
1120EXPORT_SYMBOL_GPL(pmac_i2c_close);
1121
1122int pmac_i2c_setmode(struct pmac_i2c_bus *bus, int mode)
1123{
1124	WARN_ON(!bus->opened);
1125
1126	/* Report me if you see the error below as there might be a new
1127	 * "combined4" mode that I need to implement for the SMU bus
1128	 */
1129	if (mode < pmac_i2c_mode_dumb || mode > pmac_i2c_mode_combined) {
1130		printk(KERN_ERR "low_i2c: Invalid mode %d requested on"
1131		       " bus %pOF !\n", mode, bus->busnode);
1132		return -EINVAL;
1133	}
1134	bus->mode = mode;
1135
1136	return 0;
1137}
1138EXPORT_SYMBOL_GPL(pmac_i2c_setmode);
1139
1140int pmac_i2c_xfer(struct pmac_i2c_bus *bus, u8 addrdir, int subsize,
1141		  u32 subaddr, u8 *data, int len)
1142{
1143	int rc;
1144
1145	WARN_ON(!bus->opened);
1146
1147	DBG("xfer() chan=%d, addrdir=0x%x, mode=%d, subsize=%d, subaddr=0x%x,"
1148	    " %d bytes, bus %pOF\n", bus->channel, addrdir, bus->mode, subsize,
1149	    subaddr, len, bus->busnode);
1150
1151	rc = bus->xfer(bus, addrdir, subsize, subaddr, data, len);
1152
1153#ifdef DEBUG
1154	if (rc)
1155		DBG("xfer error %d\n", rc);
1156#endif
1157	return rc;
1158}
1159EXPORT_SYMBOL_GPL(pmac_i2c_xfer);
1160
1161/* some quirks for platform function decoding */
1162enum {
1163	pmac_i2c_quirk_invmask = 0x00000001u,
1164	pmac_i2c_quirk_skip = 0x00000002u,
1165};
1166
1167static void pmac_i2c_devscan(void (*callback)(struct device_node *dev,
1168					      int quirks))
1169{
1170	struct pmac_i2c_bus *bus;
1171	struct device_node *np;
1172	static struct whitelist_ent {
1173		char *name;
1174		char *compatible;
1175		int quirks;
1176	} whitelist[] = {
1177		/* XXX Study device-tree's & apple drivers are get the quirks
1178		 * right !
1179		 */
1180		/* Workaround: It seems that running the clockspreading
1181		 * properties on the eMac will cause lockups during boot.
1182		 * The machine seems to work fine without that. So for now,
1183		 * let's make sure i2c-hwclock doesn't match about "imic"
1184		 * clocks and we'll figure out if we really need to do
1185		 * something special about those later.
1186		 */
1187		{ "i2c-hwclock", "imic5002", pmac_i2c_quirk_skip },
1188		{ "i2c-hwclock", "imic5003", pmac_i2c_quirk_skip },
1189		{ "i2c-hwclock", NULL, pmac_i2c_quirk_invmask },
1190		{ "i2c-cpu-voltage", NULL, 0},
1191		{  "temp-monitor", NULL, 0 },
1192		{  "supply-monitor", NULL, 0 },
1193		{ NULL, NULL, 0 },
1194	};
1195
1196	/* Only some devices need to have platform functions instantiated
1197	 * here. For now, we have a table. Others, like 9554 i2c GPIOs used
1198	 * on Xserve, if we ever do a driver for them, will use their own
1199	 * platform function instance
1200	 */
1201	list_for_each_entry(bus, &pmac_i2c_busses, link) {
1202		for_each_child_of_node(bus->busnode, np) {
1203			struct whitelist_ent *p;
1204			/* If multibus, check if device is on that bus */
1205			if (bus->flags & pmac_i2c_multibus)
1206				if (bus != pmac_i2c_find_bus(np))
1207					continue;
1208			for (p = whitelist; p->name != NULL; p++) {
1209				if (!of_node_name_eq(np, p->name))
1210					continue;
1211				if (p->compatible &&
1212				    !of_device_is_compatible(np, p->compatible))
1213					continue;
1214				if (p->quirks & pmac_i2c_quirk_skip)
1215					break;
1216				callback(np, p->quirks);
1217				break;
1218			}
1219		}
1220	}
1221}
1222
1223#define MAX_I2C_DATA	64
1224
1225struct pmac_i2c_pf_inst
1226{
1227	struct pmac_i2c_bus	*bus;
1228	u8			addr;
1229	u8			buffer[MAX_I2C_DATA];
1230	u8			scratch[MAX_I2C_DATA];
1231	int			bytes;
1232	int			quirks;
1233};
1234
1235static void* pmac_i2c_do_begin(struct pmf_function *func, struct pmf_args *args)
1236{
1237	struct pmac_i2c_pf_inst *inst;
1238	struct pmac_i2c_bus	*bus;
1239
1240	bus = pmac_i2c_find_bus(func->node);
1241	if (bus == NULL) {
1242		printk(KERN_ERR "low_i2c: Can't find bus for %pOF (pfunc)\n",
1243		       func->node);
1244		return NULL;
1245	}
1246	if (pmac_i2c_open(bus, 0)) {
1247		printk(KERN_ERR "low_i2c: Can't open i2c bus for %pOF (pfunc)\n",
1248		       func->node);
1249		return NULL;
1250	}
1251
1252	/* XXX might need GFP_ATOMIC when called during the suspend process,
1253	 * but then, there are already lots of issues with suspending when
1254	 * near OOM that need to be resolved, the allocator itself should
1255	 * probably make GFP_NOIO implicit during suspend
1256	 */
1257	inst = kzalloc(sizeof(struct pmac_i2c_pf_inst), GFP_KERNEL);
1258	if (inst == NULL) {
1259		pmac_i2c_close(bus);
1260		return NULL;
1261	}
1262	inst->bus = bus;
1263	inst->addr = pmac_i2c_get_dev_addr(func->node);
1264	inst->quirks = (int)(long)func->driver_data;
1265	return inst;
1266}
1267
1268static void pmac_i2c_do_end(struct pmf_function *func, void *instdata)
1269{
1270	struct pmac_i2c_pf_inst *inst = instdata;
1271
1272	if (inst == NULL)
1273		return;
1274	pmac_i2c_close(inst->bus);
1275	kfree(inst);
1276}
1277
1278static int pmac_i2c_do_read(PMF_STD_ARGS, u32 len)
1279{
1280	struct pmac_i2c_pf_inst *inst = instdata;
1281
1282	inst->bytes = len;
1283	return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_read, 0, 0,
1284			     inst->buffer, len);
1285}
1286
1287static int pmac_i2c_do_write(PMF_STD_ARGS, u32 len, const u8 *data)
1288{
1289	struct pmac_i2c_pf_inst *inst = instdata;
1290
1291	return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_write, 0, 0,
1292			     (u8 *)data, len);
1293}
1294
1295/* This function is used to do the masking & OR'ing for the "rmw" type
1296 * callbacks. Ze should apply the mask and OR in the values in the
1297 * buffer before writing back. The problem is that it seems that
1298 * various darwin drivers implement the mask/or differently, thus
1299 * we need to check the quirks first
1300 */
1301static void pmac_i2c_do_apply_rmw(struct pmac_i2c_pf_inst *inst,
1302				  u32 len, const u8 *mask, const u8 *val)
1303{
1304	int i;
1305
1306	if (inst->quirks & pmac_i2c_quirk_invmask) {
1307		for (i = 0; i < len; i ++)
1308			inst->scratch[i] = (inst->buffer[i] & mask[i]) | val[i];
1309	} else {
1310		for (i = 0; i < len; i ++)
1311			inst->scratch[i] = (inst->buffer[i] & ~mask[i])
1312				| (val[i] & mask[i]);
1313	}
1314}
1315
1316static int pmac_i2c_do_rmw(PMF_STD_ARGS, u32 masklen, u32 valuelen,
1317			   u32 totallen, const u8 *maskdata,
1318			   const u8 *valuedata)
1319{
1320	struct pmac_i2c_pf_inst *inst = instdata;
1321
1322	if (masklen > inst->bytes || valuelen > inst->bytes ||
1323	    totallen > inst->bytes || valuelen > masklen)
1324		return -EINVAL;
1325
1326	pmac_i2c_do_apply_rmw(inst, masklen, maskdata, valuedata);
1327
1328	return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_write, 0, 0,
1329			     inst->scratch, totallen);
1330}
1331
1332static int pmac_i2c_do_read_sub(PMF_STD_ARGS, u8 subaddr, u32 len)
1333{
1334	struct pmac_i2c_pf_inst *inst = instdata;
1335
1336	inst->bytes = len;
1337	return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_read, 1, subaddr,
1338			     inst->buffer, len);
1339}
1340
1341static int pmac_i2c_do_write_sub(PMF_STD_ARGS, u8 subaddr, u32 len,
1342				     const u8 *data)
1343{
1344	struct pmac_i2c_pf_inst *inst = instdata;
1345
1346	return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_write, 1,
1347			     subaddr, (u8 *)data, len);
1348}
1349
1350static int pmac_i2c_do_set_mode(PMF_STD_ARGS, int mode)
1351{
1352	struct pmac_i2c_pf_inst *inst = instdata;
1353
1354	return pmac_i2c_setmode(inst->bus, mode);
1355}
1356
1357static int pmac_i2c_do_rmw_sub(PMF_STD_ARGS, u8 subaddr, u32 masklen,
1358			       u32 valuelen, u32 totallen, const u8 *maskdata,
1359			       const u8 *valuedata)
1360{
1361	struct pmac_i2c_pf_inst *inst = instdata;
1362
1363	if (masklen > inst->bytes || valuelen > inst->bytes ||
1364	    totallen > inst->bytes || valuelen > masklen)
1365		return -EINVAL;
1366
1367	pmac_i2c_do_apply_rmw(inst, masklen, maskdata, valuedata);
1368
1369	return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_write, 1,
1370			     subaddr, inst->scratch, totallen);
1371}
1372
1373static int pmac_i2c_do_mask_and_comp(PMF_STD_ARGS, u32 len,
1374				     const u8 *maskdata,
1375				     const u8 *valuedata)
1376{
1377	struct pmac_i2c_pf_inst *inst = instdata;
1378	int i, match;
1379
1380	/* Get return value pointer, it's assumed to be a u32 */
1381	if (!args || !args->count || !args->u[0].p)
1382		return -EINVAL;
1383
1384	/* Check buffer */
1385	if (len > inst->bytes)
1386		return -EINVAL;
1387
1388	for (i = 0, match = 1; match && i < len; i ++)
1389		if ((inst->buffer[i] & maskdata[i]) != valuedata[i])
1390			match = 0;
1391	*args->u[0].p = match;
1392	return 0;
1393}
1394
1395static int pmac_i2c_do_delay(PMF_STD_ARGS, u32 duration)
1396{
1397	msleep((duration + 999) / 1000);
1398	return 0;
1399}
1400
1401
1402static struct pmf_handlers pmac_i2c_pfunc_handlers = {
1403	.begin			= pmac_i2c_do_begin,
1404	.end			= pmac_i2c_do_end,
1405	.read_i2c		= pmac_i2c_do_read,
1406	.write_i2c		= pmac_i2c_do_write,
1407	.rmw_i2c		= pmac_i2c_do_rmw,
1408	.read_i2c_sub		= pmac_i2c_do_read_sub,
1409	.write_i2c_sub		= pmac_i2c_do_write_sub,
1410	.rmw_i2c_sub		= pmac_i2c_do_rmw_sub,
1411	.set_i2c_mode		= pmac_i2c_do_set_mode,
1412	.mask_and_compare	= pmac_i2c_do_mask_and_comp,
1413	.delay			= pmac_i2c_do_delay,
1414};
1415
1416static void __init pmac_i2c_dev_create(struct device_node *np, int quirks)
1417{
1418	DBG("dev_create(%pOF)\n", np);
1419
1420	pmf_register_driver(np, &pmac_i2c_pfunc_handlers,
1421			    (void *)(long)quirks);
1422}
1423
1424static void __init pmac_i2c_dev_init(struct device_node *np, int quirks)
1425{
1426	DBG("dev_create(%pOF)\n", np);
1427
1428	pmf_do_functions(np, NULL, 0, PMF_FLAGS_ON_INIT, NULL);
1429}
1430
1431static void pmac_i2c_dev_suspend(struct device_node *np, int quirks)
1432{
1433	DBG("dev_suspend(%pOF)\n", np);
1434	pmf_do_functions(np, NULL, 0, PMF_FLAGS_ON_SLEEP, NULL);
1435}
1436
1437static void pmac_i2c_dev_resume(struct device_node *np, int quirks)
1438{
1439	DBG("dev_resume(%pOF)\n", np);
1440	pmf_do_functions(np, NULL, 0, PMF_FLAGS_ON_WAKE, NULL);
1441}
1442
1443void pmac_pfunc_i2c_suspend(void)
1444{
1445	pmac_i2c_devscan(pmac_i2c_dev_suspend);
1446}
1447
1448void pmac_pfunc_i2c_resume(void)
1449{
1450	pmac_i2c_devscan(pmac_i2c_dev_resume);
1451}
1452
1453/*
1454 * Initialize us: probe all i2c busses on the machine, instantiate
1455 * busses and platform functions as needed.
1456 */
1457/* This is non-static as it might be called early by smp code */
1458int __init pmac_i2c_init(void)
1459{
1460	static int i2c_inited;
1461
1462	if (i2c_inited)
1463		return 0;
1464	i2c_inited = 1;
1465
1466	/* Probe keywest-i2c busses */
1467	kw_i2c_probe();
1468
1469#ifdef CONFIG_ADB_PMU
1470	/* Probe PMU i2c busses */
1471	pmu_i2c_probe();
1472#endif
1473
1474#ifdef CONFIG_PMAC_SMU
1475	/* Probe SMU i2c busses */
1476	smu_i2c_probe();
1477#endif
1478
1479	/* Now add platform functions for some known devices */
1480	pmac_i2c_devscan(pmac_i2c_dev_create);
1481
1482	return 0;
1483}
1484machine_arch_initcall(powermac, pmac_i2c_init);
1485
1486/* Since pmac_i2c_init can be called too early for the platform device
1487 * registration, we need to do it at a later time. In our case, subsys
1488 * happens to fit well, though I agree it's a bit of a hack...
1489 */
1490static int __init pmac_i2c_create_platform_devices(void)
1491{
1492	struct pmac_i2c_bus *bus;
1493	int i = 0;
1494
1495	/* In the case where we are initialized from smp_init(), we must
1496	 * not use the timer (and thus the irq). It's safe from now on
1497	 * though
1498	 */
1499	pmac_i2c_force_poll = 0;
1500
1501	/* Create platform devices */
1502	list_for_each_entry(bus, &pmac_i2c_busses, link) {
1503		bus->platform_dev =
1504			platform_device_alloc("i2c-powermac", i++);
1505		if (bus->platform_dev == NULL)
1506			return -ENOMEM;
1507		bus->platform_dev->dev.platform_data = bus;
1508		bus->platform_dev->dev.of_node = bus->busnode;
1509		platform_device_add(bus->platform_dev);
1510	}
1511
1512	/* Now call platform "init" functions */
1513	pmac_i2c_devscan(pmac_i2c_dev_init);
1514
1515	return 0;
1516}
1517machine_subsys_initcall(powermac, pmac_i2c_create_platform_devices);