ksi8560.c

  1/*
  2 * Board setup routines for the Emerson KSI8560
  3 *
  4 * Author: Alexandr Smirnov <asmirnov@ru.mvista.com>
  5 *
  6 * Based on mpc85xx_ads.c maintained by Kumar Gala
  7 *
  8 * 2008 (c) MontaVista, Software, Inc.  This file is licensed under
  9 * the terms of the GNU General Public License version 2.  This program
 10 * is licensed "as is" without any warranty of any kind, whether express
 11 * or implied.
 12 *
 13 */
 14
 15#include <linux/stddef.h>
 16#include <linux/kernel.h>
 17#include <linux/pci.h>
 18#include <linux/kdev_t.h>
 19#include <linux/delay.h>
 20#include <linux/seq_file.h>
 21#include <linux/of.h>
 22#include <linux/of_address.h>
 23
 24#include <asm/time.h>
 25#include <asm/machdep.h>
 26#include <asm/pci-bridge.h>
 27#include <asm/mpic.h>
 28#include <mm/mmu_decl.h>
 29#include <asm/udbg.h>
 30
 31#include <sysdev/fsl_soc.h>
 32#include <sysdev/fsl_pci.h>
 33
 34#include <asm/cpm2.h>
 35#include <sysdev/cpm2_pic.h>
 36
 37#include "mpc85xx.h"
 38
 39#define KSI8560_CPLD_HVR		0x04 /* Hardware Version Register */
 40#define KSI8560_CPLD_PVR		0x08 /* PLD Version Register */
 41#define KSI8560_CPLD_RCR1		0x30 /* Reset Command Register 1 */
 42
 43#define KSI8560_CPLD_RCR1_CPUHR		0x80 /* CPU Hard Reset */
 44
 45static void __iomem *cpld_base = NULL;
 46
 47static void __noreturn machine_restart(char *cmd)
 48{
 49	if (cpld_base)
 50		out_8(cpld_base + KSI8560_CPLD_RCR1, KSI8560_CPLD_RCR1_CPUHR);
 51	else
 52		printk(KERN_ERR "Can't find CPLD base, hang forever\n");
 53
 54	for (;;);
 55}
 56
 57static void __init ksi8560_pic_init(void)
 58{
 59	struct mpic *mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN,
 60			0, 256, " OpenPIC  ");
 61	BUG_ON(mpic == NULL);
 62	mpic_init(mpic);
 63
 64	mpc85xx_cpm2_pic_init();
 65}
 66
 67#ifdef CONFIG_CPM2
 68/*
 69 * Setup I/O ports
 70 */
 71struct cpm_pin {
 72	int port, pin, flags;
 73};
 74
 75static struct cpm_pin __initdata ksi8560_pins[] = {
 76	/* SCC1 */
 77	{3, 29, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
 78	{3, 30, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
 79	{3, 31, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
 80
 81	/* SCC2 */
 82	{3, 26, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
 83	{3, 27, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
 84	{3, 28, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
 85
 86	/* FCC1 */
 87	{0, 14, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
 88	{0, 15, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
 89	{0, 16, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
 90	{0, 17, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
 91	{0, 18, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
 92	{0, 19, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
 93	{0, 20, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
 94	{0, 21, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
 95	{0, 26, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
 96	{0, 27, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
 97	{0, 28, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
 98	{0, 29, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
 99	{0, 30, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
100	{0, 31, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
101	{2, 23, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, /* CLK9 */
102	{2, 22, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, /* CLK10 */
103
104};
105
106static void __init init_ioports(void)
107{
108	int i;
109
110	for (i = 0; i < ARRAY_SIZE(ksi8560_pins); i++) {
111		struct cpm_pin *pin = &ksi8560_pins[i];
112		cpm2_set_pin(pin->port, pin->pin, pin->flags);
113	}
114
115	cpm2_clk_setup(CPM_CLK_SCC1, CPM_BRG1, CPM_CLK_RX);
116	cpm2_clk_setup(CPM_CLK_SCC1, CPM_BRG1, CPM_CLK_TX);
117	cpm2_clk_setup(CPM_CLK_SCC2, CPM_BRG2, CPM_CLK_RX);
118	cpm2_clk_setup(CPM_CLK_SCC2, CPM_BRG2, CPM_CLK_TX);
119	cpm2_clk_setup(CPM_CLK_FCC1, CPM_CLK9, CPM_CLK_RX);
120	cpm2_clk_setup(CPM_CLK_FCC1, CPM_CLK10, CPM_CLK_TX);
121}
122#endif
123
124/*
125 * Setup the architecture
126 */
127static void __init ksi8560_setup_arch(void)
128{
129	struct device_node *cpld;
130
131	cpld = of_find_compatible_node(NULL, NULL, "emerson,KSI8560-cpld");
132	if (cpld)
133		cpld_base = of_iomap(cpld, 0);
134	else
135		printk(KERN_ERR "Can't find CPLD in device tree\n");
136
137	of_node_put(cpld);
138
139	if (ppc_md.progress)
140		ppc_md.progress("ksi8560_setup_arch()", 0);
141
142#ifdef CONFIG_CPM2
143	cpm2_reset();
144	init_ioports();
145#endif
146}
147
148static void ksi8560_show_cpuinfo(struct seq_file *m)
149{
150	uint pvid, svid, phid1;
151
152	pvid = mfspr(SPRN_PVR);
153	svid = mfspr(SPRN_SVR);
154
155	seq_printf(m, "Vendor\t\t: Emerson Network Power\n");
156	seq_printf(m, "Board\t\t: KSI8560\n");
157
158	if (cpld_base) {
159		seq_printf(m, "Hardware rev\t: %d\n",
160					in_8(cpld_base + KSI8560_CPLD_HVR));
161		seq_printf(m, "CPLD rev\t: %d\n",
162					in_8(cpld_base + KSI8560_CPLD_PVR));
163	} else
164		seq_printf(m, "Unknown Hardware and CPLD revs\n");
165
166	seq_printf(m, "PVR\t\t: 0x%x\n", pvid);
167	seq_printf(m, "SVR\t\t: 0x%x\n", svid);
168
169	/* Display cpu Pll setting */
170	phid1 = mfspr(SPRN_HID1);
171	seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f));
172}
173
174machine_device_initcall(ksi8560, mpc85xx_common_publish_devices);
175
176define_machine(ksi8560) {
177	.name			= "KSI8560",
178	.compatible		= "emerson,KSI8560",
179	.setup_arch		= ksi8560_setup_arch,
180	.init_IRQ		= ksi8560_pic_init,
181	.show_cpuinfo		= ksi8560_show_cpuinfo,
182	.get_irq		= mpic_get_irq,
183	.restart		= machine_restart,
184};