interrupt.c

  1// SPDX-License-Identifier: GPL-2.0-or-later
  2
  3#include <linux/context_tracking.h>
  4#include <linux/err.h>
  5#include <linux/compat.h>
  6#include <linux/rseq.h>
  7#include <linux/sched/debug.h> /* for show_regs */
  8
  9#include <asm/kup.h>
 10#include <asm/cputime.h>
 11#include <asm/hw_irq.h>
 12#include <asm/interrupt.h>
 13#include <asm/kprobes.h>
 14#include <asm/paca.h>
 15#include <asm/ptrace.h>
 16#include <asm/reg.h>
 17#include <asm/signal.h>
 18#include <asm/switch_to.h>
 19#include <asm/syscall.h>
 20#include <asm/time.h>
 21#include <asm/tm.h>
 22#include <asm/unistd.h>
 23
 24#if defined(CONFIG_PPC_ADV_DEBUG_REGS) && defined(CONFIG_PPC32)
 25unsigned long global_dbcr0[NR_CPUS];
 26#endif
 27
 28#if defined(CONFIG_PREEMPT_DYNAMIC)
 29DEFINE_STATIC_KEY_TRUE(sk_dynamic_irqentry_exit_cond_resched);
 30#endif
 31
 32#ifdef CONFIG_PPC_BOOK3S_64
 33DEFINE_STATIC_KEY_FALSE(interrupt_exit_not_reentrant);
 34static inline bool exit_must_hard_disable(void)
 35{
 36	return static_branch_unlikely(&interrupt_exit_not_reentrant);
 37}
 38#else
 39static inline bool exit_must_hard_disable(void)
 40{
 41	return true;
 42}
 43#endif
 44
 45/*
 46 * local irqs must be disabled. Returns false if the caller must re-enable
 47 * them, check for new work, and try again.
 48 *
 49 * This should be called with local irqs disabled, but if they were previously
 50 * enabled when the interrupt handler returns (indicating a process-context /
 51 * synchronous interrupt) then irqs_enabled should be true.
 52 *
 53 * restartable is true then EE/RI can be left on because interrupts are handled
 54 * with a restart sequence.
 55 */
 56static notrace __always_inline bool prep_irq_for_enabled_exit(bool restartable)
 57{
 58	bool must_hard_disable = (exit_must_hard_disable() || !restartable);
 59
 60	/* This must be done with RI=1 because tracing may touch vmaps */
 61	trace_hardirqs_on();
 62
 63	if (must_hard_disable)
 64		__hard_EE_RI_disable();
 65
 66#ifdef CONFIG_PPC64
 67	/* This pattern matches prep_irq_for_idle */
 68	if (unlikely(lazy_irq_pending_nocheck())) {
 69		if (must_hard_disable) {
 70			local_paca->irq_happened |= PACA_IRQ_HARD_DIS;
 71			__hard_RI_enable();
 72		}
 73		trace_hardirqs_off();
 74
 75		return false;
 76	}
 77#endif
 78	return true;
 79}
 80
 81static notrace void booke_load_dbcr0(void)
 82{
 83#ifdef CONFIG_PPC_ADV_DEBUG_REGS
 84	unsigned long dbcr0 = current->thread.debug.dbcr0;
 85
 86	if (likely(!(dbcr0 & DBCR0_IDM)))
 87		return;
 88
 89	/*
 90	 * Check to see if the dbcr0 register is set up to debug.
 91	 * Use the internal debug mode bit to do this.
 92	 */
 93	mtmsr(mfmsr() & ~MSR_DE);
 94	if (IS_ENABLED(CONFIG_PPC32)) {
 95		isync();
 96		global_dbcr0[smp_processor_id()] = mfspr(SPRN_DBCR0);
 97	}
 98	mtspr(SPRN_DBCR0, dbcr0);
 99	mtspr(SPRN_DBSR, -1);
100#endif
101}
102
103static notrace void check_return_regs_valid(struct pt_regs *regs)
104{
105#ifdef CONFIG_PPC_BOOK3S_64
106	unsigned long trap, srr0, srr1;
107	static bool warned;
108	u8 *validp;
109	char *h;
110
111	if (trap_is_scv(regs))
112		return;
113
114	trap = TRAP(regs);
115	// EE in HV mode sets HSRRs like 0xea0
116	if (cpu_has_feature(CPU_FTR_HVMODE) && trap == INTERRUPT_EXTERNAL)
117		trap = 0xea0;
118
119	switch (trap) {
120	case 0x980:
121	case INTERRUPT_H_DATA_STORAGE:
122	case 0xe20:
123	case 0xe40:
124	case INTERRUPT_HMI:
125	case 0xe80:
126	case 0xea0:
127	case INTERRUPT_H_FAC_UNAVAIL:
128	case 0x1200:
129	case 0x1500:
130	case 0x1600:
131	case 0x1800:
132		validp = &local_paca->hsrr_valid;
133		if (!READ_ONCE(*validp))
134			return;
135
136		srr0 = mfspr(SPRN_HSRR0);
137		srr1 = mfspr(SPRN_HSRR1);
138		h = "H";
139
140		break;
141	default:
142		validp = &local_paca->srr_valid;
143		if (!READ_ONCE(*validp))
144			return;
145
146		srr0 = mfspr(SPRN_SRR0);
147		srr1 = mfspr(SPRN_SRR1);
148		h = "";
149		break;
150	}
151
152	if (srr0 == regs->nip && srr1 == regs->msr)
153		return;
154
155	/*
156	 * A NMI / soft-NMI interrupt may have come in after we found
157	 * srr_valid and before the SRRs are loaded. The interrupt then
158	 * comes in and clobbers SRRs and clears srr_valid. Then we load
159	 * the SRRs here and test them above and find they don't match.
160	 *
161	 * Test validity again after that, to catch such false positives.
162	 *
163	 * This test in general will have some window for false negatives
164	 * and may not catch and fix all such cases if an NMI comes in
165	 * later and clobbers SRRs without clearing srr_valid, but hopefully
166	 * such things will get caught most of the time, statistically
167	 * enough to be able to get a warning out.
168	 */
169	if (!READ_ONCE(*validp))
170		return;
171
172	if (!data_race(warned)) {
173		data_race(warned = true);
174		printk("%sSRR0 was: %lx should be: %lx\n", h, srr0, regs->nip);
175		printk("%sSRR1 was: %lx should be: %lx\n", h, srr1, regs->msr);
176		show_regs(regs);
177	}
178
179	WRITE_ONCE(*validp, 0); /* fixup */
180#endif
181}
182
183static notrace unsigned long
184interrupt_exit_user_prepare_main(unsigned long ret, struct pt_regs *regs)
185{
186	unsigned long ti_flags;
187
188again:
189	ti_flags = read_thread_flags();
190	while (unlikely(ti_flags & (_TIF_USER_WORK_MASK & ~_TIF_RESTORE_TM))) {
191		local_irq_enable();
192		if (ti_flags & (_TIF_NEED_RESCHED | _TIF_NEED_RESCHED_LAZY)) {
193			schedule();
194		} else {
195			/*
196			 * SIGPENDING must restore signal handler function
197			 * argument GPRs, and some non-volatiles (e.g., r1).
198			 * Restore all for now. This could be made lighter.
199			 */
200			if (ti_flags & _TIF_SIGPENDING)
201				ret |= _TIF_RESTOREALL;
202			do_notify_resume(regs, ti_flags);
203		}
204		local_irq_disable();
205		ti_flags = read_thread_flags();
206	}
207
208	if (IS_ENABLED(CONFIG_PPC_BOOK3S_64) && IS_ENABLED(CONFIG_PPC_FPU)) {
209		if (IS_ENABLED(CONFIG_PPC_TRANSACTIONAL_MEM) &&
210				unlikely((ti_flags & _TIF_RESTORE_TM))) {
211			restore_tm_state(regs);
212		} else {
213			unsigned long mathflags = MSR_FP;
214
215			if (cpu_has_feature(CPU_FTR_VSX))
216				mathflags |= MSR_VEC | MSR_VSX;
217			else if (cpu_has_feature(CPU_FTR_ALTIVEC))
218				mathflags |= MSR_VEC;
219
220			/*
221			 * If userspace MSR has all available FP bits set,
222			 * then they are live and no need to restore. If not,
223			 * it means the regs were given up and restore_math
224			 * may decide to restore them (to avoid taking an FP
225			 * fault).
226			 */
227			if ((regs->msr & mathflags) != mathflags)
228				restore_math(regs);
229		}
230	}
231
232	check_return_regs_valid(regs);
233
234	user_enter_irqoff();
235	if (!prep_irq_for_enabled_exit(true)) {
236		user_exit_irqoff();
237		local_irq_enable();
238		local_irq_disable();
239		goto again;
240	}
241
242#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
243	local_paca->tm_scratch = regs->msr;
244#endif
245
246	booke_load_dbcr0();
247
248	account_cpu_user_exit();
249
250	/* Restore user access locks last */
251	kuap_user_restore(regs);
252
253	return ret;
254}
255
256/*
257 * This should be called after a syscall returns, with r3 the return value
258 * from the syscall. If this function returns non-zero, the system call
259 * exit assembly should additionally load all GPR registers and CTR and XER
260 * from the interrupt frame.
261 *
262 * The function graph tracer can not trace the return side of this function,
263 * because RI=0 and soft mask state is "unreconciled", so it is marked notrace.
264 */
265notrace unsigned long syscall_exit_prepare(unsigned long r3,
266					   struct pt_regs *regs,
267					   long scv)
268{
269	unsigned long ti_flags;
270	unsigned long ret = 0;
271	bool is_not_scv = !IS_ENABLED(CONFIG_PPC_BOOK3S_64) || !scv;
272
273	CT_WARN_ON(ct_state() == CT_STATE_USER);
274
275	kuap_assert_locked();
276
277	regs->result = r3;
278
279	/* Check whether the syscall is issued inside a restartable sequence */
280	rseq_syscall(regs);
281
282	ti_flags = read_thread_flags();
283
284	if (unlikely(r3 >= (unsigned long)-MAX_ERRNO) && is_not_scv) {
285		if (likely(!(ti_flags & (_TIF_NOERROR | _TIF_RESTOREALL)))) {
286			r3 = -r3;
287			regs->ccr |= 0x10000000; /* Set SO bit in CR */
288		}
289	}
290
291	if (unlikely(ti_flags & _TIF_PERSYSCALL_MASK)) {
292		if (ti_flags & _TIF_RESTOREALL)
293			ret = _TIF_RESTOREALL;
294		else
295			regs->gpr[3] = r3;
296		clear_bits(_TIF_PERSYSCALL_MASK, &current_thread_info()->flags);
297	} else {
298		regs->gpr[3] = r3;
299	}
300
301	if (unlikely(ti_flags & _TIF_SYSCALL_DOTRACE)) {
302		do_syscall_trace_leave(regs);
303		ret |= _TIF_RESTOREALL;
304	}
305
306	local_irq_disable();
307	ret = interrupt_exit_user_prepare_main(ret, regs);
308
309#ifdef CONFIG_PPC64
310	regs->exit_result = ret;
311#endif
312
313	return ret;
314}
315
316#ifdef CONFIG_PPC64
317notrace unsigned long syscall_exit_restart(unsigned long r3, struct pt_regs *regs)
318{
319	/*
320	 * This is called when detecting a soft-pending interrupt as well as
321	 * an alternate-return interrupt. So we can't just have the alternate
322	 * return path clear SRR1[MSR] and set PACA_IRQ_HARD_DIS (unless
323	 * the soft-pending case were to fix things up as well). RI might be
324	 * disabled, in which case it gets re-enabled by __hard_irq_disable().
325	 */
326	__hard_irq_disable();
327	local_paca->irq_happened |= PACA_IRQ_HARD_DIS;
328
329#ifdef CONFIG_PPC_BOOK3S_64
330	set_kuap(AMR_KUAP_BLOCKED);
331#endif
332
333	trace_hardirqs_off();
334	user_exit_irqoff();
335	account_cpu_user_entry();
336
337	BUG_ON(!user_mode(regs));
338
339	regs->exit_result = interrupt_exit_user_prepare_main(regs->exit_result, regs);
340
341	return regs->exit_result;
342}
343#endif
344
345notrace unsigned long interrupt_exit_user_prepare(struct pt_regs *regs)
346{
347	unsigned long ret;
348
349	BUG_ON(regs_is_unrecoverable(regs));
350	BUG_ON(arch_irq_disabled_regs(regs));
351	CT_WARN_ON(ct_state() == CT_STATE_USER);
352
353	/*
354	 * We don't need to restore AMR on the way back to userspace for KUAP.
355	 * AMR can only have been unlocked if we interrupted the kernel.
356	 */
357	kuap_assert_locked();
358
359	local_irq_disable();
360
361	ret = interrupt_exit_user_prepare_main(0, regs);
362
363#ifdef CONFIG_PPC64
364	regs->exit_result = ret;
365#endif
366
367	return ret;
368}
369
370void preempt_schedule_irq(void);
371
372notrace unsigned long interrupt_exit_kernel_prepare(struct pt_regs *regs)
373{
374	unsigned long ret = 0;
375	unsigned long kuap;
376	bool stack_store = read_thread_flags() & _TIF_EMULATE_STACK_STORE;
377
378	if (regs_is_unrecoverable(regs))
379		unrecoverable_exception(regs);
380	/*
381	 * CT_WARN_ON comes here via program_check_exception, so avoid
382	 * recursion.
383	 *
384	 * Skip the assertion on PMIs on 64e to work around a problem caused
385	 * by NMI PMIs incorrectly taking this interrupt return path, it's
386	 * possible for this to hit after interrupt exit to user switches
387	 * context to user. See also the comment in the performance monitor
388	 * handler in exceptions-64e.S
389	 */
390	if (!IS_ENABLED(CONFIG_PPC_BOOK3E_64) &&
391	    TRAP(regs) != INTERRUPT_PROGRAM &&
392	    TRAP(regs) != INTERRUPT_PERFMON)
393		CT_WARN_ON(ct_state() == CT_STATE_USER);
394
395	kuap = kuap_get_and_assert_locked();
396
397	local_irq_disable();
398
399	if (!arch_irq_disabled_regs(regs)) {
400		/* Returning to a kernel context with local irqs enabled. */
401		WARN_ON_ONCE(!(regs->msr & MSR_EE));
402again:
403		if (need_irq_preemption()) {
404			/* Return to preemptible kernel context */
405			if (unlikely(read_thread_flags() & _TIF_NEED_RESCHED)) {
406				if (preempt_count() == 0)
407					preempt_schedule_irq();
408			}
409		}
410
411		check_return_regs_valid(regs);
412
413		/*
414		 * Stack store exit can't be restarted because the interrupt
415		 * stack frame might have been clobbered.
416		 */
417		if (!prep_irq_for_enabled_exit(unlikely(stack_store))) {
418			/*
419			 * Replay pending soft-masked interrupts now. Don't
420			 * just local_irq_enabe(); local_irq_disable(); because
421			 * if we are returning from an asynchronous interrupt
422			 * here, another one might hit after irqs are enabled,
423			 * and it would exit via this same path allowing
424			 * another to fire, and so on unbounded.
425			 */
426			hard_irq_disable();
427			replay_soft_interrupts();
428			/* Took an interrupt, may have more exit work to do. */
429			goto again;
430		}
431#ifdef CONFIG_PPC64
432		/*
433		 * An interrupt may clear MSR[EE] and set this concurrently,
434		 * but it will be marked pending and the exit will be retried.
435		 * This leaves a racy window where MSR[EE]=0 and HARD_DIS is
436		 * clear, until interrupt_exit_kernel_restart() calls
437		 * hard_irq_disable(), which will set HARD_DIS again.
438		 */
439		local_paca->irq_happened &= ~PACA_IRQ_HARD_DIS;
440
441	} else {
442		check_return_regs_valid(regs);
443
444		if (unlikely(stack_store))
445			__hard_EE_RI_disable();
446#else
447	} else {
448		__hard_EE_RI_disable();
449#endif /* CONFIG_PPC64 */
450	}
451
452	if (unlikely(stack_store)) {
453		clear_bits(_TIF_EMULATE_STACK_STORE, &current_thread_info()->flags);
454		ret = 1;
455	}
456
457#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
458	local_paca->tm_scratch = regs->msr;
459#endif
460
461	/*
462	 * 64s does not want to mfspr(SPRN_AMR) here, because this comes after
463	 * mtmsr, which would cause Read-After-Write stalls. Hence, take the
464	 * AMR value from the check above.
465	 */
466	kuap_kernel_restore(regs, kuap);
467
468	return ret;
469}
470
471#ifdef CONFIG_PPC64
472notrace unsigned long interrupt_exit_user_restart(struct pt_regs *regs)
473{
474	__hard_irq_disable();
475	local_paca->irq_happened |= PACA_IRQ_HARD_DIS;
476
477#ifdef CONFIG_PPC_BOOK3S_64
478	set_kuap(AMR_KUAP_BLOCKED);
479#endif
480
481	trace_hardirqs_off();
482	user_exit_irqoff();
483	account_cpu_user_entry();
484
485	BUG_ON(!user_mode(regs));
486
487	regs->exit_result |= interrupt_exit_user_prepare(regs);
488
489	return regs->exit_result;
490}
491
492/*
493 * No real need to return a value here because the stack store case does not
494 * get restarted.
495 */
496notrace unsigned long interrupt_exit_kernel_restart(struct pt_regs *regs)
497{
498	__hard_irq_disable();
499	local_paca->irq_happened |= PACA_IRQ_HARD_DIS;
500
501#ifdef CONFIG_PPC_BOOK3S_64
502	set_kuap(AMR_KUAP_BLOCKED);
503#endif
504
505	if (regs->softe == IRQS_ENABLED)
506		trace_hardirqs_off();
507
508	BUG_ON(user_mode(regs));
509
510	return interrupt_exit_kernel_prepare(regs);
511}
512#endif