cputhreads.h

  1/* SPDX-License-Identifier: GPL-2.0 */
  2#ifndef _ASM_POWERPC_CPUTHREADS_H
  3#define _ASM_POWERPC_CPUTHREADS_H
  4
  5#ifndef __ASSEMBLER__
  6#include <linux/cpumask.h>
  7#include <asm/cpu_has_feature.h>
  8
  9/*
 10 * Mapping of threads to cores
 11 *
 12 * Note: This implementation is limited to a power of 2 number of
 13 * threads per core and the same number for each core in the system
 14 * (though it would work if some processors had less threads as long
 15 * as the CPU numbers are still allocated, just not brought online).
 16 *
 17 * However, the API allows for a different implementation in the future
 18 * if needed, as long as you only use the functions and not the variables
 19 * directly.
 20 */
 21
 22#ifdef CONFIG_SMP
 23extern int threads_per_core;
 24extern int threads_per_subcore;
 25extern int threads_shift;
 26extern cpumask_t threads_core_mask;
 27#else
 28#define threads_per_core	1
 29#define threads_per_subcore	1
 30#define threads_shift		0
 31#define has_big_cores		0
 32#define threads_core_mask	(*get_cpu_mask(0))
 33#endif
 34
 35static inline int cpu_nr_cores(void)
 36{
 37	return nr_cpu_ids >> threads_shift;
 38}
 39
 40#ifdef CONFIG_SMP
 41int cpu_core_index_of_thread(int cpu);
 42int cpu_first_thread_of_core(int core);
 43#else
 44static inline int cpu_core_index_of_thread(int cpu) { return cpu; }
 45static inline int cpu_first_thread_of_core(int core) { return core; }
 46#endif
 47
 48static inline int cpu_thread_in_core(int cpu)
 49{
 50	return cpu & (threads_per_core - 1);
 51}
 52
 53static inline int cpu_thread_in_subcore(int cpu)
 54{
 55	return cpu & (threads_per_subcore - 1);
 56}
 57
 58static inline int cpu_first_thread_sibling(int cpu)
 59{
 60	return cpu & ~(threads_per_core - 1);
 61}
 62
 63static inline int cpu_last_thread_sibling(int cpu)
 64{
 65	return cpu | (threads_per_core - 1);
 66}
 67
 68/*
 69 * tlb_thread_siblings are siblings which share a TLB. This is not
 70 * architected, is not something a hypervisor could emulate and a future
 71 * CPU may change behaviour even in compat mode, so this should only be
 72 * used on PowerNV, and only with care.
 73 */
 74static inline int cpu_first_tlb_thread_sibling(int cpu)
 75{
 76	if (cpu_has_feature(CPU_FTR_ARCH_300) && (threads_per_core == 8))
 77		return cpu & ~0x6;	/* Big Core */
 78	else
 79		return cpu_first_thread_sibling(cpu);
 80}
 81
 82static inline int cpu_last_tlb_thread_sibling(int cpu)
 83{
 84	if (cpu_has_feature(CPU_FTR_ARCH_300) && (threads_per_core == 8))
 85		return cpu | 0x6;	/* Big Core */
 86	else
 87		return cpu_last_thread_sibling(cpu);
 88}
 89
 90static inline int cpu_tlb_thread_sibling_step(void)
 91{
 92	if (cpu_has_feature(CPU_FTR_ARCH_300) && (threads_per_core == 8))
 93		return 2;		/* Big Core */
 94	else
 95		return 1;
 96}
 97
 98static inline u32 get_tensr(void)
 99{
100#ifdef	CONFIG_BOOKE
101	if (cpu_has_feature(CPU_FTR_SMT))
102		return mfspr(SPRN_TENSR);
103#endif
104	return 1;
105}
106
107void book3e_start_thread(int thread, unsigned long addr);
108void book3e_stop_thread(int thread);
109
110#endif /* __ASSEMBLER__ */
111
112#define INVALID_THREAD_HWID	0x0fff
113
114#endif /* _ASM_POWERPC_CPUTHREADS_H */
115