rtl930x.dtsi

  1// SPDX-License-Identifier: GPL-2.0-or-later OR BSD-2-Clause
  2
  3/ {
  4	compatible = "realtek,rtl9302-soc";
  5
  6	#address-cells = <1>;
  7	#size-cells = <1>;
  8
  9	aliases {
 10		serial0 = &uart0;
 11		serial1 = &uart1;
 12	};
 13
 14	cpuintc: cpuintc {
 15		compatible = "mti,cpu-interrupt-controller";
 16		#address-cells = <0>;
 17		#interrupt-cells = <1>;
 18		interrupt-controller;
 19	};
 20
 21	cpus {
 22		#address-cells = <1>;
 23		#size-cells = <0>;
 24
 25		cpu@0 {
 26			device_type = "cpu";
 27			compatible = "mips,mips34Kc";
 28			reg = <0>;
 29			clocks = <&baseclk>;
 30		};
 31	};
 32
 33	baseclk: clock-800mhz {
 34		compatible = "fixed-clock";
 35		#clock-cells = <0>;
 36		clock-frequency = <800000000>;
 37	};
 38
 39	lx_clk: clock-175mhz {
 40		compatible = "fixed-clock";
 41		#clock-cells = <0>;
 42		clock-frequency  = <175000000>;
 43	};
 44
 45	switch0: switch@1b000000 {
 46		compatible = "realtek,rtl9301-switch", "syscon", "simple-mfd";
 47		reg = <0x1b000000 0x10000>;
 48		#address-cells = <1>;
 49		#size-cells = <1>;
 50
 51		interrupt-parent = <&intc>;
 52		interrupts = <23>, <24>;
 53		interrupt-names = "switch", "nic";
 54
 55		reboot@c {
 56			compatible = "syscon-reboot";
 57			reg = <0x0c 0x4>;
 58			value = <0x01>;
 59		};
 60
 61		i2c0: i2c@36c {
 62			compatible = "realtek,rtl9301-i2c";
 63			reg = <0x36c 0x14>;
 64			#address-cells = <1>;
 65			#size-cells = <0>;
 66			status = "disabled";
 67		};
 68
 69		i2c1: i2c@388 {
 70			compatible = "realtek,rtl9301-i2c";
 71			reg = <0x388 0x14>;
 72			#address-cells = <1>;
 73			#size-cells = <0>;
 74			status = "disabled";
 75		};
 76
 77		mdio_controller: mdio-controller@ca00 {
 78			compatible = "realtek,rtl9301-mdio";
 79			reg = <0xca00 0x200>;
 80			#address-cells = <1>;
 81			#size-cells = <0>;
 82			status = "disabled";
 83
 84			mdio0: mdio-bus@0 {
 85				reg = <0>;
 86				#address-cells = <1>;
 87				#size-cells = <0>;
 88				status = "disabled";
 89			};
 90			mdio1: mdio-bus@1 {
 91				reg = <1>;
 92				#address-cells = <1>;
 93				#size-cells = <0>;
 94				status = "disabled";
 95			};
 96			mdio2: mdio-bus@2 {
 97				reg = <2>;
 98				#address-cells = <1>;
 99				#size-cells = <0>;
100				status = "disabled";
101			};
102			mdio3: mdio-bus@3 {
103				reg = <3>;
104				#address-cells = <1>;
105				#size-cells = <0>;
106				status = "disabled";
107			};
108		};
109	};
110
111	soc: soc@18000000 {
112		compatible = "simple-bus";
113		#address-cells = <1>;
114		#size-cells = <1>;
115		ranges = <0x0 0x18000000 0x20000>;
116
117		intc: interrupt-controller@3000 {
118			compatible = "realtek,rtl9300-intc", "realtek,rtl-intc";
119			reg = <0x3000 0x18>, <0x3018 0x18>;
120			interrupt-controller;
121			#interrupt-cells = <1>;
122
123			interrupt-parent = <&cpuintc>;
124			interrupts = <2>, <3>, <4>, <5>, <6>, <7>;
125		};
126
127		spi0: spi@1200 {
128			compatible = "realtek,rtl8380-spi";
129			reg = <0x1200 0x100>;
130
131			#address-cells = <1>;
132			#size-cells = <0>;
133		};
134
135		timer0: timer@3200 {
136			compatible = "realtek,rtl9302-timer", "realtek,otto-timer";
137			reg = <0x3200 0x10>, <0x3210 0x10>, <0x3220 0x10>,
138			    <0x3230 0x10>, <0x3240 0x10>;
139
140			interrupt-parent = <&intc>;
141			interrupts = <7>, <8>, <9>, <10>, <11>;
142			clocks = <&lx_clk>;
143		};
144
145		watchdog0: watchdog@3260 {
146			compatible = "realtek,rtl9300-wdt";
147			reg = <0x3260 0xc>;
148
149			realtek,reset-mode = "soc";
150
151			clocks = <&lx_clk>;
152			timeout-sec = <30>;
153
154			interrupt-parent = <&intc>;
155			interrupt-names = "phase1", "phase2";
156			interrupts = <5>, <6>;
157		};
158
159		gpio0: gpio@3300 {
160			compatible = "realtek,rtl9300-gpio", "realtek,otto-gpio";
161			reg = <0x3300 0x1c>, <0x3338 0x8>;
162			gpio-controller;
163			#gpio-cells = <2>;
164			ngpios = <24>;
165
166			interrupt-controller;
167			#interrupt-cells = <2>;
168			interrupt-parent = <&intc>;
169			interrupts = <13>;
170		};
171
172		snand: spi@1a400 {
173			compatible = "realtek,rtl9301-snand";
174			reg = <0x1a400 0x44>;
175			interrupt-parent = <&intc>;
176			interrupts = <19>;
177			clocks = <&lx_clk>;
178			#address-cells = <1>;
179			#size-cells = <0>;
180			status = "disabled";
181		};
182
183		uart0: serial@2000 {
184			compatible = "ns16550a";
185			reg = <0x2000 0x100>;
186
187			clocks = <&lx_clk>;
188
189			interrupt-parent = <&intc>;
190			interrupts = <30>;
191
192			reg-io-width = <1>;
193			reg-shift = <2>;
194			fifo-size = <1>;
195			no-loopback-test;
196
197			status = "disabled";
198		};
199
200		uart1: serial@2100 {
201			compatible = "ns16550a";
202			reg = <0x2100 0x100>;
203
204			clocks = <&lx_clk>;
205
206			interrupt-parent = <&intc>;
207			interrupts = <31>;
208
209			reg-io-width = <1>;
210			reg-shift = <2>;
211			fifo-size = <1>;
212			no-loopback-test;
213
214			status = "disabled";
215		};
216	};
217};