File Index
Files and directories
Sign in
FILE

via.c

File preview with syntax highlighting.

linux-6.19.14/arch/m68k/mac/via.c C
  1// SPDX-License-Identifier: GPL-2.0
  2/*
  3 *	6522 Versatile Interface Adapter (VIA)
  4 *
  5 *	There are two of these on the Mac II. Some IRQs are vectored
  6 *	via them as are assorted bits and bobs - eg RTC, ADB.
  7 *
  8 * CSA: Motorola seems to have removed documentation on the 6522 from
  9 * their web site; try
 10 *     http://nerini.drf.com/vectrex/other/text/chips/6522/
 11 *     http://www.zymurgy.net/classic/vic20/vicdet1.htm
 12 * and
 13 *     http://193.23.168.87/mikro_laborversuche/via_iobaustein/via6522_1.html
 14 * for info.  A full-text web search on 6522 AND VIA will probably also
 15 * net some usefulness. <cananian@alumni.princeton.edu> 20apr1999
 16 *
 17 * Additional data is here (the SY6522 was used in the Mac II etc):
 18 *     http://www.6502.org/documents/datasheets/synertek/synertek_sy6522.pdf
 19 *     http://www.6502.org/documents/datasheets/synertek/synertek_sy6522_programming_reference.pdf
 20 *
 21 * PRAM/RTC access algorithms are from the NetBSD RTC toolkit version 1.08b
 22 * by Erik Vogan and adapted to Linux by Joshua M. Thompson (funaho@jurai.org)
 23 *
 24 */
 25
 26#include <linux/clocksource.h>
 27#include <linux/types.h>
 28#include <linux/kernel.h>
 29#include <linux/mm.h>
 30#include <linux/delay.h>
 31#include <linux/init.h>
 32#include <linux/module.h>
 33#include <linux/irq.h>
 34
 35#include <asm/macintosh.h>
 36#include <asm/macints.h>
 37#include <asm/mac_via.h>
 38#include <asm/mac_psc.h>
 39#include <asm/mac_oss.h>
 40
 41#include "mac.h"
 42
 43volatile __u8 *via1, *via2;
 44int rbv_present;
 45int via_alt_mapping;
 46EXPORT_SYMBOL(via_alt_mapping);
 47static __u8 rbv_clear;
 48
 49/*
 50 * Globals for accessing the VIA chip registers without having to
 51 * check if we're hitting a real VIA or an RBV. Normally you could
 52 * just hit the combined register (ie, vIER|rIER) but that seems to
 53 * break on AV Macs...probably because they actually decode more than
 54 * eight address bits. Why can't Apple engineers at least be
 55 * _consistently_ lazy?                          - 1999-05-21 (jmt)
 56 */
 57
 58static int gIER,gIFR,gBufA,gBufB;
 59
 60/*
 61 * On Macs with a genuine VIA chip there is no way to mask an individual slot
 62 * interrupt. This limitation also seems to apply to VIA clone logic cores in
 63 * Quadra-like ASICs. (RBV and OSS machines don't have this limitation.)
 64 *
 65 * We used to fake it by configuring the relevant VIA pin as an output
 66 * (to mask the interrupt) or input (to unmask). That scheme did not work on
 67 * (at least) the Quadra 700. A NuBus card's /NMRQ signal is an open-collector
 68 * circuit (see Designing Cards and Drivers for Macintosh II and Macintosh SE,
 69 * p. 10-11 etc) but VIA outputs are not (see datasheet).
 70 *
 71 * Driving these outputs high must cause the VIA to source current and the
 72 * card to sink current when it asserts /NMRQ. Current will flow but the pin
 73 * voltage is uncertain and so the /NMRQ condition may still cause a transition
 74 * at the VIA2 CA1 input (which explains the lost interrupts). A side effect
 75 * is that a disabled slot IRQ can never be tested as pending or not.
 76 *
 77 * Driving these outputs low doesn't work either. All the slot /NMRQ lines are
 78 * (active low) OR'd together to generate the CA1 (aka "SLOTS") interrupt (see
 79 * The Guide To Macintosh Family Hardware, 2nd edition p. 167). If we drive a
 80 * disabled /NMRQ line low, the falling edge immediately triggers a CA1
 81 * interrupt and all slot interrupts after that will generate no transition
 82 * and therefore no interrupt, even after being re-enabled.
 83 *
 84 * So we make the VIA port A I/O lines inputs and use nubus_disabled to keep
 85 * track of their states. When any slot IRQ becomes disabled we mask the CA1
 86 * umbrella interrupt. Only when all slot IRQs become enabled do we unmask
 87 * the CA1 interrupt. It must remain enabled even when cards have no interrupt
 88 * handler registered. Drivers must therefore disable a slot interrupt at the
 89 * device before they call free_irq (like shared and autovector interrupts).
 90 *
 91 * There is also a related problem when MacOS is used to boot Linux. A network
 92 * card brought up by a MacOS driver may raise an interrupt while Linux boots.
 93 * This can be fatal since it can't be handled until the right driver loads
 94 * (if such a driver exists at all). Apparently related to this hardware
 95 * limitation, "Designing Cards and Drivers", p. 9-8, says that a slot
 96 * interrupt with no driver would crash MacOS (the book was written before
 97 * the appearance of Macs with RBV or OSS).
 98 */
 99
100static u8 nubus_disabled;
101
102void via_debug_dump(void);
103static void via_nubus_init(void);
104
105/*
106 * Initialize the VIAs
107 *
108 * First we figure out where they actually _are_ as well as what type of
109 * VIA we have for VIA2 (it could be a real VIA or an RBV or even an OSS.)
110 * Then we pretty much clear them out and disable all IRQ sources.
111 */
112
113void __init via_init(void)
114{
115	via1 = (void *)VIA1_BASE;
116	pr_debug("VIA1 detected at %p\n", via1);
117
118	if (oss_present) {
119		via2 = NULL;
120		rbv_present = 0;
121	} else {
122		switch (macintosh_config->via_type) {
123
124		/* IIci, IIsi, IIvx, IIvi (P6xx), LC series */
125
126		case MAC_VIA_IICI:
127			via2 = (void *)RBV_BASE;
128			pr_debug("VIA2 (RBV) detected at %p\n", via2);
129			rbv_present = 1;
130			if (macintosh_config->ident == MAC_MODEL_LCIII) {
131				rbv_clear = 0x00;
132			} else {
133				/* on most RBVs (& unlike the VIAs), you   */
134				/* need to set bit 7 when you write to IFR */
135				/* in order for your clear to occur.       */
136				rbv_clear = 0x80;
137			}
138			gIER = rIER;
139			gIFR = rIFR;
140			gBufA = rSIFR;
141			gBufB = rBufB;
142			break;
143
144		/* Quadra and early MacIIs agree on the VIA locations */
145
146		case MAC_VIA_QUADRA:
147		case MAC_VIA_II:
148			via2 = (void *) VIA2_BASE;
149			pr_debug("VIA2 detected at %p\n", via2);
150			rbv_present = 0;
151			rbv_clear = 0x00;
152			gIER = vIER;
153			gIFR = vIFR;
154			gBufA = vBufA;
155			gBufB = vBufB;
156			break;
157
158		default:
159			panic("UNKNOWN VIA TYPE");
160		}
161	}
162
163#ifdef DEBUG_VIA
164	via_debug_dump();
165#endif
166
167	/*
168	 * Shut down all IRQ sources, reset the timers, and
169	 * kill the timer latch on VIA1.
170	 */
171
172	via1[vIER] = 0x7F;
173	via1[vIFR] = 0x7F;
174	via1[vT1CL] = 0;
175	via1[vT1CH] = 0;
176	via1[vT2CL] = 0;
177	via1[vT2CH] = 0;
178	via1[vACR] &= ~0xC0; /* setup T1 timer with no PB7 output */
179	via1[vACR] &= ~0x03; /* disable port A & B latches */
180
181	/*
182	 * SE/30: disable video IRQ
183	 */
184
185	if (macintosh_config->ident == MAC_MODEL_SE30) {
186		via1[vDirB] |= 0x40;
187		via1[vBufB] |= 0x40;
188	}
189
190	switch (macintosh_config->adb_type) {
191	case MAC_ADB_IOP:
192	case MAC_ADB_II:
193	case MAC_ADB_PB1:
194		/*
195		 * Set the RTC bits to a known state: all lines to outputs and
196		 * RTC disabled (yes that's 0 to enable and 1 to disable).
197		 */
198		via1[vDirB] |= VIA1B_vRTCEnb | VIA1B_vRTCClk | VIA1B_vRTCData;
199		via1[vBufB] |= VIA1B_vRTCEnb | VIA1B_vRTCClk;
200		break;
201	}
202
203	/* Everything below this point is VIA2/RBV only... */
204
205	if (oss_present)
206		return;
207
208	if ((macintosh_config->via_type == MAC_VIA_QUADRA) &&
209	    (macintosh_config->adb_type != MAC_ADB_PB1) &&
210	    (macintosh_config->adb_type != MAC_ADB_PB2) &&
211	    (macintosh_config->ident    != MAC_MODEL_C660) &&
212	    (macintosh_config->ident    != MAC_MODEL_Q840)) {
213		via_alt_mapping = 1;
214		via1[vDirB] |= 0x40;
215		via1[vBufB] &= ~0x40;
216	} else {
217		via_alt_mapping = 0;
218	}
219
220	/*
221	 * Now initialize VIA2. For RBV we just kill all interrupts;
222	 * for a regular VIA we also reset the timers and stuff.
223	 */
224
225	via2[gIER] = 0x7F;
226	via2[gIFR] = 0x7F | rbv_clear;
227	if (!rbv_present) {
228		via2[vT1CL] = 0;
229		via2[vT1CH] = 0;
230		via2[vT2CL] = 0;
231		via2[vT2CH] = 0;
232		via2[vACR] &= ~0xC0; /* setup T1 timer with no PB7 output */
233		via2[vACR] &= ~0x03; /* disable port A & B latches */
234	}
235
236	via_nubus_init();
237
238	/* Everything below this point is VIA2 only... */
239
240	if (rbv_present)
241		return;
242
243	/*
244	 * Set vPCR for control line interrupts.
245	 *
246	 * CA1 (SLOTS IRQ), CB1 (ASC IRQ): negative edge trigger.
247	 *
248	 * Macs with ESP SCSI have a negative edge triggered SCSI interrupt.
249	 * Testing reveals that PowerBooks do too. However, the SE/30
250	 * schematic diagram shows an active high NCR5380 IRQ line.
251	 */
252
253	pr_debug("VIA2 vPCR is 0x%02X\n", via2[vPCR]);
254	if (macintosh_config->via_type == MAC_VIA_II) {
255		/* CA2 (SCSI DRQ), CB2 (SCSI IRQ): indep. input, pos. edge */
256		via2[vPCR] = 0x66;
257	} else {
258		/* CA2 (SCSI DRQ), CB2 (SCSI IRQ): indep. input, neg. edge */
259		via2[vPCR] = 0x22;
260	}
261}
262
263/*
264 * Debugging dump, used in various places to see what's going on.
265 */
266
267void via_debug_dump(void)
268{
269	printk(KERN_DEBUG "VIA1: DDRA = 0x%02X DDRB = 0x%02X ACR = 0x%02X\n",
270		(uint) via1[vDirA], (uint) via1[vDirB], (uint) via1[vACR]);
271	printk(KERN_DEBUG "         PCR = 0x%02X  IFR = 0x%02X IER = 0x%02X\n",
272		(uint) via1[vPCR], (uint) via1[vIFR], (uint) via1[vIER]);
273	if (!via2)
274		return;
275	if (rbv_present) {
276		printk(KERN_DEBUG "VIA2:  IFR = 0x%02X  IER = 0x%02X\n",
277			(uint) via2[rIFR], (uint) via2[rIER]);
278		printk(KERN_DEBUG "      SIFR = 0x%02X SIER = 0x%02X\n",
279			(uint) via2[rSIFR], (uint) via2[rSIER]);
280	} else {
281		printk(KERN_DEBUG "VIA2: DDRA = 0x%02X DDRB = 0x%02X ACR = 0x%02X\n",
282			(uint) via2[vDirA], (uint) via2[vDirB],
283			(uint) via2[vACR]);
284		printk(KERN_DEBUG "         PCR = 0x%02X  IFR = 0x%02X IER = 0x%02X\n",
285			(uint) via2[vPCR],
286			(uint) via2[vIFR], (uint) via2[vIER]);
287	}
288}
289
290/*
291 * Flush the L2 cache on Macs that have it by flipping
292 * the system into 24-bit mode for an instant.
293 */
294
295void via_l2_flush(int writeback)
296{
297	unsigned long flags;
298
299	local_irq_save(flags);
300	via2[gBufB] &= ~VIA2B_vMode32;
301	via2[gBufB] |= VIA2B_vMode32;
302	local_irq_restore(flags);
303}
304
305/*
306 * Initialize VIA2 for Nubus access
307 */
308
309static void __init via_nubus_init(void)
310{
311	/* unlock nubus transactions */
312
313	if ((macintosh_config->adb_type != MAC_ADB_PB1) &&
314	    (macintosh_config->adb_type != MAC_ADB_PB2)) {
315		/* set the line to be an output on non-RBV machines */
316		if (!rbv_present)
317			via2[vDirB] |= 0x02;
318
319		/* this seems to be an ADB bit on PMU machines */
320		/* according to MkLinux.  -- jmt               */
321		via2[gBufB] |= 0x02;
322	}
323
324	/*
325	 * Disable the slot interrupts. On some hardware that's not possible.
326	 * On some hardware it's unclear what all of these I/O lines do.
327	 */
328
329	switch (macintosh_config->via_type) {
330	case MAC_VIA_II:
331	case MAC_VIA_QUADRA:
332		pr_debug("VIA2 vDirA is 0x%02X\n", via2[vDirA]);
333		break;
334	case MAC_VIA_IICI:
335		/* RBV. Disable all the slot interrupts. SIER works like IER. */
336		via2[rSIER] = 0x7F;
337		break;
338	}
339}
340
341void via_nubus_irq_startup(int irq)
342{
343	int irq_idx = IRQ_IDX(irq);
344
345	switch (macintosh_config->via_type) {
346	case MAC_VIA_II:
347	case MAC_VIA_QUADRA:
348		/* Make the port A line an input. Probably redundant. */
349		if (macintosh_config->via_type == MAC_VIA_II) {
350			/* The top two bits are RAM size outputs. */
351			via2[vDirA] &= 0xC0 | ~(1 << irq_idx);
352		} else {
353			/* Allow NuBus slots 9 through F. */
354			via2[vDirA] &= 0x80 | ~(1 << irq_idx);
355		}
356		fallthrough;
357	case MAC_VIA_IICI:
358		via_irq_enable(irq);
359		break;
360	}
361}
362
363void via_nubus_irq_shutdown(int irq)
364{
365	switch (macintosh_config->via_type) {
366	case MAC_VIA_II:
367	case MAC_VIA_QUADRA:
368		/* Ensure that the umbrella CA1 interrupt remains enabled. */
369		via_irq_enable(irq);
370		break;
371	case MAC_VIA_IICI:
372		via_irq_disable(irq);
373		break;
374	}
375}
376
377/*
378 * The generic VIA interrupt routines (shamelessly stolen from Alan Cox's
379 * via6522.c :-), disable/pending masks added.
380 */
381
382#define VIA_TIMER_1_INT BIT(6)
383
384void via1_irq(struct irq_desc *desc)
385{
386	int irq_num;
387	unsigned char irq_bit, events;
388
389	events = via1[vIFR] & via1[vIER] & 0x7F;
390	if (!events)
391		return;
392
393	irq_num = IRQ_MAC_TIMER_1;
394	irq_bit = VIA_TIMER_1_INT;
395	if (events & irq_bit) {
396		unsigned long flags;
397
398		local_irq_save(flags);
399		via1[vIFR] = irq_bit;
400		generic_handle_irq(irq_num);
401		local_irq_restore(flags);
402
403		events &= ~irq_bit;
404		if (!events)
405			return;
406	}
407
408	irq_num = VIA1_SOURCE_BASE;
409	irq_bit = 1;
410	do {
411		if (events & irq_bit) {
412			via1[vIFR] = irq_bit;
413			generic_handle_irq(irq_num);
414		}
415		++irq_num;
416		irq_bit <<= 1;
417	} while (events >= irq_bit);
418}
419
420static void via2_irq(struct irq_desc *desc)
421{
422	int irq_num;
423	unsigned char irq_bit, events;
424
425	events = via2[gIFR] & via2[gIER] & 0x7F;
426	if (!events)
427		return;
428
429	irq_num = VIA2_SOURCE_BASE;
430	irq_bit = 1;
431	do {
432		if (events & irq_bit) {
433			via2[gIFR] = irq_bit | rbv_clear;
434			generic_handle_irq(irq_num);
435		}
436		++irq_num;
437		irq_bit <<= 1;
438	} while (events >= irq_bit);
439}
440
441/*
442 * Dispatch Nubus interrupts. We are called as a secondary dispatch by the
443 * VIA2 dispatcher as a fast interrupt handler.
444 */
445
446static void via_nubus_irq(struct irq_desc *desc)
447{
448	int slot_irq;
449	unsigned char slot_bit, events;
450
451	events = ~via2[gBufA] & 0x7F;
452	if (rbv_present)
453		events &= via2[rSIER];
454	else
455		events &= ~via2[vDirA];
456	if (!events)
457		return;
458
459	do {
460		slot_irq = IRQ_NUBUS_F;
461		slot_bit = 0x40;
462		do {
463			if (events & slot_bit) {
464				events &= ~slot_bit;
465				generic_handle_irq(slot_irq);
466			}
467			--slot_irq;
468			slot_bit >>= 1;
469		} while (events);
470
471 		/* clear the CA1 interrupt and make certain there's no more. */
472		via2[gIFR] = 0x02 | rbv_clear;
473		events = ~via2[gBufA] & 0x7F;
474		if (rbv_present)
475			events &= via2[rSIER];
476		else
477			events &= ~via2[vDirA];
478	} while (events);
479}
480
481/*
482 * Register the interrupt dispatchers for VIA or RBV machines only.
483 */
484
485void __init via_register_interrupts(void)
486{
487	if (via_alt_mapping) {
488		/* software interrupt */
489		irq_set_chained_handler(IRQ_AUTO_1, via1_irq);
490		/* via1 interrupt */
491		irq_set_chained_handler(IRQ_AUTO_6, via1_irq);
492	} else {
493		irq_set_chained_handler(IRQ_AUTO_1, via1_irq);
494	}
495	irq_set_chained_handler(IRQ_AUTO_2, via2_irq);
496	irq_set_chained_handler(IRQ_MAC_NUBUS, via_nubus_irq);
497}
498
499void via_irq_enable(int irq) {
500	int irq_src	= IRQ_SRC(irq);
501	int irq_idx	= IRQ_IDX(irq);
502
503	if (irq_src == 1) {
504		via1[vIER] = IER_SET_BIT(irq_idx);
505	} else if (irq_src == 2) {
506		if (irq != IRQ_MAC_NUBUS || nubus_disabled == 0)
507			via2[gIER] = IER_SET_BIT(irq_idx);
508	} else if (irq_src == 7) {
509		switch (macintosh_config->via_type) {
510		case MAC_VIA_II:
511		case MAC_VIA_QUADRA:
512			nubus_disabled &= ~(1 << irq_idx);
513			/* Enable the CA1 interrupt when no slot is disabled. */
514			if (!nubus_disabled)
515				via2[gIER] = IER_SET_BIT(1);
516			break;
517		case MAC_VIA_IICI:
518			/* On RBV, enable the slot interrupt.
519			 * SIER works like IER.
520			 */
521			via2[rSIER] = IER_SET_BIT(irq_idx);
522			break;
523		}
524	}
525}
526
527void via_irq_disable(int irq) {
528	int irq_src	= IRQ_SRC(irq);
529	int irq_idx	= IRQ_IDX(irq);
530
531	if (irq_src == 1) {
532		via1[vIER] = IER_CLR_BIT(irq_idx);
533	} else if (irq_src == 2) {
534		via2[gIER] = IER_CLR_BIT(irq_idx);
535	} else if (irq_src == 7) {
536		switch (macintosh_config->via_type) {
537		case MAC_VIA_II:
538		case MAC_VIA_QUADRA:
539			nubus_disabled |= 1 << irq_idx;
540			if (nubus_disabled)
541				via2[gIER] = IER_CLR_BIT(1);
542			break;
543		case MAC_VIA_IICI:
544			via2[rSIER] = IER_CLR_BIT(irq_idx);
545			break;
546		}
547	}
548}
549
550void via1_set_head(int head)
551{
552	if (head == 0)
553		via1[vBufA] &= ~VIA1A_vHeadSel;
554	else
555		via1[vBufA] |= VIA1A_vHeadSel;
556}
557EXPORT_SYMBOL(via1_set_head);
558
559int via2_scsi_drq_pending(void)
560{
561	return via2[gIFR] & (1 << IRQ_IDX(IRQ_MAC_SCSIDRQ));
562}
563EXPORT_SYMBOL(via2_scsi_drq_pending);
564
565/* timer and clock source */
566
567#define VIA_CLOCK_FREQ     783360                /* VIA "phase 2" clock in Hz */
568#define VIA_TIMER_CYCLES   (VIA_CLOCK_FREQ / HZ) /* clock cycles per jiffy */
569
570#define VIA_TC             (VIA_TIMER_CYCLES - 2) /* including 0 and -1 */
571#define VIA_TC_LOW         (VIA_TC & 0xFF)
572#define VIA_TC_HIGH        (VIA_TC >> 8)
573
574static u64 mac_read_clk(struct clocksource *cs);
575
576static struct clocksource mac_clk = {
577	.name   = "via1",
578	.rating = 250,
579	.read   = mac_read_clk,
580	.mask   = CLOCKSOURCE_MASK(32),
581	.flags  = CLOCK_SOURCE_IS_CONTINUOUS,
582};
583
584static u32 clk_total, clk_offset;
585
586static irqreturn_t via_timer_handler(int irq, void *dev_id)
587{
588	clk_total += VIA_TIMER_CYCLES;
589	clk_offset = 0;
590	legacy_timer_tick(1);
591
592	return IRQ_HANDLED;
593}
594
595void __init via_init_clock(void)
596{
597	if (request_irq(IRQ_MAC_TIMER_1, via_timer_handler, IRQF_TIMER, "timer",
598			NULL)) {
599		pr_err("Couldn't register %s interrupt\n", "timer");
600		return;
601	}
602
603	via1[vT1CL] = VIA_TC_LOW;
604	via1[vT1CH] = VIA_TC_HIGH;
605	via1[vACR] |= 0x40;
606
607	clocksource_register_hz(&mac_clk, VIA_CLOCK_FREQ);
608}
609
610static u64 mac_read_clk(struct clocksource *cs)
611{
612	unsigned long flags;
613	u8 count_high;
614	u16 count;
615	u32 ticks;
616
617	/*
618	 * Timer counter wrap-around is detected with the timer interrupt flag
619	 * but reading the counter low byte (vT1CL) would reset the flag.
620	 * Also, accessing both counter registers is essentially a data race.
621	 * These problems are avoided by ignoring the low byte. Clock accuracy
622	 * is 256 times worse (error can reach 0.327 ms) but CPU overhead is
623	 * reduced by avoiding slow VIA register accesses.
624	 *
625	 * The VIA timer counter observably decrements to 0xFFFF before the
626	 * counter reload interrupt gets raised. That complicates things a bit.
627	 *
628	 * State | vT1CH      | VIA_TIMER_1_INT | inference drawn
629	 * ------+------------+-----------------+-----------------------------
630	 * i     | FE thru 00 | false           | counter is decrementing
631	 * ii    | FF         | false           | counter wrapped
632	 * iii   | FF         | true            | wrapped, interrupt raised
633	 * iv    | FF         | false           | wrapped, interrupt handled
634	 * v     | FE thru 00 | true            | wrapped, interrupt unhandled
635	 *
636	 * State iv is never observed because handling the interrupt involves
637	 * a 6522 register access and every access consumes a "phi 2" clock
638	 * cycle. So 0xFF implies either state ii or state iii, depending on
639	 * the value of the VIA_TIMER_1_INT bit.
640	 */
641
642	local_irq_save(flags);
643	count_high = via1[vT1CH];
644	if (count_high == 0xFF)
645		count_high = 0;
646	if (count_high > 0 && (via1[vIFR] & VIA_TIMER_1_INT))
647		clk_offset = VIA_TIMER_CYCLES;
648	count = count_high << 8;
649	ticks = VIA_TIMER_CYCLES - count;
650	ticks += clk_offset + clk_total;
651	local_irq_restore(flags);
652
653	return ticks;
654}
~/ Read-only file preview.