dump_tlb.c

  1// SPDX-License-Identifier: GPL-2.0
  2/*
  3 * Copyright (C) 2020-2022 Loongson Technology Corporation Limited
  4 *
  5 * Derived from MIPS:
  6 * Copyright (C) 1994, 1995 by Waldorf Electronics, written by Ralf Baechle.
  7 * Copyright (C) 1999 by Silicon Graphics, Inc.
  8 */
  9#include <linux/kernel.h>
 10#include <linux/mm.h>
 11
 12#include <asm/loongarch.h>
 13#include <asm/page.h>
 14#include <asm/pgtable.h>
 15#include <asm/tlb.h>
 16
 17void dump_tlb_regs(void)
 18{
 19	const int field = 2 * sizeof(unsigned long);
 20
 21	pr_info("Index    : 0x%0x\n", read_csr_tlbidx());
 22	pr_info("PageSize : 0x%0x\n", read_csr_pagesize());
 23	pr_info("EntryHi  : 0x%0*lx\n", field, (unsigned long)read_csr_entryhi());
 24	pr_info("EntryLo0 : 0x%0*lx\n", field, (unsigned long)read_csr_entrylo0());
 25	pr_info("EntryLo1 : 0x%0*lx\n", field, (unsigned long)read_csr_entrylo1());
 26}
 27
 28static void dump_tlb(int first, int last)
 29{
 30	unsigned long s_entryhi, entryhi, asid;
 31	unsigned long long entrylo0, entrylo1, pa;
 32	unsigned int index;
 33	unsigned int s_index, s_asid;
 34	unsigned int pagesize, c0, c1, i;
 35	unsigned long asidmask = cpu_asid_mask(&current_cpu_data);
 36	int pwidth = 16;
 37	int vwidth = 16;
 38	int asidwidth = DIV_ROUND_UP(ilog2(asidmask) + 1, 4);
 39
 40	s_entryhi = read_csr_entryhi();
 41	s_index = read_csr_tlbidx();
 42	s_asid = read_csr_asid();
 43
 44	for (i = first; i <= last; i++) {
 45		write_csr_index(i);
 46		tlb_read();
 47		pagesize = read_csr_pagesize();
 48		entryhi	 = read_csr_entryhi();
 49		entrylo0 = read_csr_entrylo0();
 50		entrylo1 = read_csr_entrylo1();
 51		index = read_csr_tlbidx();
 52		asid = read_csr_asid();
 53
 54		/* EHINV bit marks entire entry as invalid */
 55		if (index & CSR_TLBIDX_EHINV)
 56			continue;
 57		/*
 58		 * ASID takes effect in absence of G (global) bit.
 59		 */
 60		if (!((entrylo0 | entrylo1) & ENTRYLO_G) &&
 61		    asid != s_asid)
 62			continue;
 63
 64		/*
 65		 * Only print entries in use
 66		 */
 67		pr_info("Index: %4d pgsize=0x%x ", i, (1 << pagesize));
 68
 69		c0 = (entrylo0 & ENTRYLO_C) >> ENTRYLO_C_SHIFT;
 70		c1 = (entrylo1 & ENTRYLO_C) >> ENTRYLO_C_SHIFT;
 71
 72		pr_cont("va=0x%0*lx asid=0x%0*lx",
 73			vwidth, (entryhi & ~0x1fffUL), asidwidth, asid & asidmask);
 74
 75		/* NR/NX are in awkward places, so mask them off separately */
 76#ifdef CONFIG_64BIT
 77		pa = entrylo0 & ~(ENTRYLO_NR | ENTRYLO_NX);
 78#endif
 79		pa = pa & PAGE_MASK;
 80		pr_cont("\n\t[");
 81#ifdef CONFIG_64BIT
 82		pr_cont("nr=%d nx=%d ",
 83			(entrylo0 & ENTRYLO_NR) ? 1 : 0,
 84			(entrylo0 & ENTRYLO_NX) ? 1 : 0);
 85#endif
 86		pr_cont("pa=0x%0*llx c=%d d=%d v=%d g=%d plv=%lld] [",
 87			pwidth, pa, c0,
 88			(entrylo0 & ENTRYLO_D) ? 1 : 0,
 89			(entrylo0 & ENTRYLO_V) ? 1 : 0,
 90			(entrylo0 & ENTRYLO_G) ? 1 : 0,
 91			(entrylo0 & ENTRYLO_PLV) >> ENTRYLO_PLV_SHIFT);
 92		/* NR/NX are in awkward places, so mask them off separately */
 93#ifdef CONFIG_64BIT
 94		pa = entrylo1 & ~(ENTRYLO_NR | ENTRYLO_NX);
 95#endif
 96		pa = pa & PAGE_MASK;
 97#ifdef CONFIG_64BIT
 98		pr_cont("nr=%d nx=%d ",
 99			(entrylo1 & ENTRYLO_NR) ? 1 : 0,
100			(entrylo1 & ENTRYLO_NX) ? 1 : 0);
101#endif
102		pr_cont("pa=0x%0*llx c=%d d=%d v=%d g=%d plv=%lld]\n",
103			pwidth, pa, c1,
104			(entrylo1 & ENTRYLO_D) ? 1 : 0,
105			(entrylo1 & ENTRYLO_V) ? 1 : 0,
106			(entrylo1 & ENTRYLO_G) ? 1 : 0,
107			(entrylo1 & ENTRYLO_PLV) >> ENTRYLO_PLV_SHIFT);
108	}
109	pr_info("\n");
110
111	write_csr_entryhi(s_entryhi);
112	write_csr_tlbidx(s_index);
113	write_csr_asid(s_asid);
114}
115
116void dump_tlb_all(void)
117{
118	dump_tlb(0, current_cpu_data.tlbsize - 1);
119}