head.S

  1/* SPDX-License-Identifier: GPL-2.0 */
  2/*
  3 * Copyright (C) 2020-2022 Loongson Technology Corporation Limited
  4 */
  5#include <linux/init.h>
  6#include <linux/threads.h>
  7
  8#include <asm/addrspace.h>
  9#include <asm/asm.h>
 10#include <asm/asmmacro.h>
 11#include <asm/bug.h>
 12#include <asm/regdef.h>
 13#include <asm/loongarch.h>
 14#include <asm/stackframe.h>
 15
 16#ifdef CONFIG_EFI_STUB
 17
 18#include "efi-header.S"
 19
 20	__HEAD
 21
 22_head:
 23	.word	IMAGE_DOS_SIGNATURE	/* "MZ", MS-DOS header */
 24	.org	0x8
 25	.dword	_kernel_entry		/* Kernel entry point (physical address) */
 26	.dword	_kernel_asize		/* Kernel image effective size */
 27	.quad	PHYS_LINK_KADDR		/* Kernel image load offset from start of RAM */
 28	.org	0x38			/* 0x20 ~ 0x37 reserved */
 29	.long	LINUX_PE_MAGIC
 30	.long	pe_header - _head	/* Offset to the PE header */
 31
 32pe_header:
 33	__EFI_PE_HEADER
 34
 35SYM_DATA(kernel_asize, .long _kernel_asize);
 36SYM_DATA(kernel_fsize, .long _kernel_fsize);
 37
 38#endif
 39
 40	__REF
 41
 42	.align 12
 43
 44SYM_CODE_START(kernel_entry)			# kernel entry point
 45	UNWIND_HINT_END_OF_STACK
 46
 47	SETUP_TWINS
 48	SETUP_MODES	t0
 49	JUMP_VIRT_ADDR	t0, t1
 50	SETUP_DMWINS	t0
 51
 52	la.pcrel	t0, __bss_start		# clear .bss
 53	LONG_S		zero, t0, 0
 54	la.pcrel	t1, __bss_stop - LONGSIZE
 551:
 56	PTR_ADDI	t0, t0, LONGSIZE
 57	LONG_S		zero, t0, 0
 58	bne		t0, t1, 1b
 59
 60	la.pcrel	t0, fw_arg0
 61	PTR_S		a0, t0, 0		# firmware arguments
 62	la.pcrel	t0, fw_arg1
 63	PTR_S		a1, t0, 0
 64	la.pcrel	t0, fw_arg2
 65	PTR_S		a2, t0, 0
 66
 67#ifdef CONFIG_PAGE_SIZE_4KB
 68	LONG_LI		t0, 0
 69	LONG_LI		t1, CSR_STFILL
 70	csrxchg		t0, t1, LOONGARCH_CSR_IMPCTL1
 71#endif
 72	/* KSave3 used for percpu base, initialized as 0 */
 73	csrwr		zero, PERCPU_BASE_KS
 74	/* GPR21 used for percpu base (runtime), initialized as 0 */
 75	move		u0, zero
 76
 77	la.pcrel	tp, init_thread_union
 78	/* Set the SP after an empty pt_regs.  */
 79	PTR_LI		sp, (_THREAD_SIZE - PT_SIZE)
 80	PTR_ADD		sp, sp, tp
 81	set_saved_sp	sp, t0, t1
 82
 83#ifdef CONFIG_RELOCATABLE
 84
 85	bl		relocate_kernel
 86
 87#ifdef CONFIG_RANDOMIZE_BASE
 88	/* Repoint the sp into the new kernel */
 89	PTR_LI		sp, (_THREAD_SIZE - PT_SIZE)
 90	PTR_ADD		sp, sp, tp
 91	set_saved_sp	sp, t0, t1
 92
 93	/* Jump to the new kernel: new_pc = current_pc + random_offset */
 94	pcaddi		t0, 0
 95	PTR_ADD		t0, t0, a0
 96	jirl		zero, t0, 0xc
 97#endif /* CONFIG_RANDOMIZE_BASE */
 98
 99#endif /* CONFIG_RELOCATABLE */
100
101#ifdef CONFIG_KASAN
102	bl		kasan_early_init
103#endif
104
105	bl		start_kernel
106	ASM_BUG()
107
108SYM_CODE_END(kernel_entry)
109
110#ifdef CONFIG_SMP
111
112/*
113 * SMP slave cpus entry point.	Board specific code for bootstrap calls this
114 * function after setting up the stack and tp registers.
115 */
116SYM_CODE_START(smpboot_entry)
117	UNWIND_HINT_END_OF_STACK
118
119	SETUP_TWINS
120	SETUP_MODES	t0
121	JUMP_VIRT_ADDR	t0, t1
122	SETUP_DMWINS	t0
123
124#ifdef CONFIG_PAGE_SIZE_4KB
125	LONG_LI		t0, 0
126	LONG_LI		t1, CSR_STFILL
127	csrxchg		t0, t1, LOONGARCH_CSR_IMPCTL1
128#endif
129	la.pcrel	t0, cpuboot_data
130	ld.d		sp, t0, CPU_BOOT_STACK
131	ld.d		tp, t0, CPU_BOOT_TINFO
132
133	bl		start_secondary
134	ASM_BUG()
135
136SYM_CODE_END(smpboot_entry)
137
138#endif /* CONFIG_SMP */