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loongson-2k2000.dtsi
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linux-6.19.14/arch/loongarch/boot/dts/loongson-2k2000.dtsi
1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Copyright (C) 2023 Loongson Technology Corporation Limited 4 */ 5 6/dts-v1/; 7 8#include <dt-bindings/interrupt-controller/irq.h> 9#include <dt-bindings/clock/loongson,ls2k-clk.h> 10 11/ { 12 #address-cells = <2>; 13 #size-cells = <2>; 14 15 cpus { 16 #address-cells = <1>; 17 #size-cells = <0>; 18 19 cpu0: cpu@1 { 20 compatible = "loongson,la364"; 21 device_type = "cpu"; 22 reg = <0x0>; 23 clocks = <&clk LOONGSON2_NODE_CLK>; 24 }; 25 26 cpu1: cpu@2 { 27 compatible = "loongson,la364"; 28 device_type = "cpu"; 29 reg = <0x1>; 30 clocks = <&clk LOONGSON2_NODE_CLK>; 31 }; 32 }; 33 34 ref_100m: clock-ref-100m { 35 compatible = "fixed-clock"; 36 #clock-cells = <0>; 37 clock-frequency = <100000000>; 38 clock-output-names = "ref_100m"; 39 }; 40 41 cpuintc: interrupt-controller { 42 compatible = "loongson,cpu-interrupt-controller"; 43 #interrupt-cells = <1>; 44 interrupt-controller; 45 }; 46 47 thermal-zones { 48 cpu-thermal { 49 polling-delay-passive = <1000>; 50 polling-delay = <5000>; 51 thermal-sensors = <&tsensor 0>; 52 53 trips { 54 cpu-alert { 55 temperature = <40000>; 56 hysteresis = <2000>; 57 type = "active"; 58 }; 59 60 cpu-crit { 61 temperature = <85000>; 62 hysteresis = <5000>; 63 type = "critical"; 64 }; 65 }; 66 }; 67 }; 68 69 bus@10000000 { 70 compatible = "simple-bus"; 71 ranges = <0x0 0x10000000 0x0 0x10000000 0x0 0x10000000>, 72 <0x0 0x02000000 0x0 0x02000000 0x0 0x02000000>, 73 <0x0 0x40000000 0x0 0x40000000 0x0 0x40000000>, 74 <0xfe 0x0 0xfe 0x0 0x0 0x40000000>; 75 #address-cells = <2>; 76 #size-cells = <2>; 77 78 isa@18400000 { 79 compatible = "isa"; 80 #size-cells = <1>; 81 #address-cells = <2>; 82 ranges = <1 0x0 0x0 0x18400000 0x4000>; 83 }; 84 85 clk: clock-controller@10010480 { 86 compatible = "loongson,ls2k2000-clk"; 87 reg = <0x0 0x10010480 0x0 0x100>; 88 #clock-cells = <1>; 89 clocks = <&ref_100m>; 90 clock-names = "ref_100m"; 91 }; 92 93 pmc: power-management@100d0000 { 94 compatible = "loongson,ls2k2000-pmc", "loongson,ls2k0500-pmc", "syscon"; 95 reg = <0x0 0x100d0000 0x0 0x58>; 96 interrupt-parent = <&eiointc>; 97 interrupts = <47>; 98 loongson,suspend-address = <0x0 0x1c000500>; 99 100 syscon-reboot { 101 compatible = "syscon-reboot"; 102 offset = <0x30>; 103 mask = <0x1>; 104 }; 105 106 syscon-poweroff { 107 compatible = "syscon-poweroff"; 108 regmap = <&pmc>; 109 offset = <0x14>; 110 mask = <0x3c00>; 111 value = <0x3c00>; 112 }; 113 }; 114 115 tsensor: thermal-sensor@1fe01460 { 116 compatible = "loongson,ls2k2000-thermal"; 117 reg = <0x0 0x1fe01460 0x0 0x30>, 118 <0x0 0x1fe0019c 0x0 0x4>; 119 interrupt-parent = <&liointc>; 120 interrupts = <7 IRQ_TYPE_LEVEL_HIGH>; 121 #thermal-sensor-cells = <1>; 122 }; 123 124 liointc: interrupt-controller@1fe01400 { 125 compatible = "loongson,liointc-1.0"; 126 reg = <0x0 0x1fe01400 0x0 0x64>; 127 128 interrupt-controller; 129 #address-cells = <0>; 130 #interrupt-cells = <2>; 131 interrupt-parent = <&cpuintc>; 132 interrupts = <2>; 133 interrupt-names = "int0"; 134 loongson,parent_int_map = <0xffffffff>, /* int0 */ 135 <0x00000000>, /* int1 */ 136 <0x00000000>, /* int2 */ 137 <0x00000000>; /* int3 */ 138 }; 139 140 eiointc: interrupt-controller@1fe01600 { 141 compatible = "loongson,ls2k2000-eiointc"; 142 reg = <0x0 0x1fe01600 0x0 0xea00>; 143 interrupt-controller; 144 #address-cells = <0>; 145 #interrupt-cells = <1>; 146 interrupt-parent = <&cpuintc>; 147 interrupts = <3>; 148 }; 149 150 pic: interrupt-controller@10000000 { 151 compatible = "loongson,pch-pic-1.0"; 152 reg = <0x0 0x10000000 0x0 0x400>; 153 interrupt-controller; 154 #address-cells = <0>; 155 #interrupt-cells = <2>; 156 loongson,pic-base-vec = <0>; 157 interrupt-parent = <&eiointc>; 158 }; 159 160 msi: msi-controller@1fe01140 { 161 compatible = "loongson,pch-msi-1.0"; 162 reg = <0x0 0x1fe01140 0x0 0x8>; 163 interrupt-controller; 164 #interrupt-cells = <1>; 165 msi-controller; 166 loongson,msi-base-vec = <64>; 167 loongson,msi-num-vecs = <192>; 168 interrupt-parent = <&eiointc>; 169 }; 170 171 pwm@100a0000 { 172 compatible = "loongson,ls2k2000-pwm", "loongson,ls7a-pwm"; 173 reg = <0x0 0x100a0000 0x0 0x10>; 174 interrupt-parent = <&pic>; 175 interrupts = <24 IRQ_TYPE_LEVEL_HIGH>; 176 clocks = <&clk LOONGSON2_MISC_CLK>; 177 #pwm-cells = <3>; 178 status = "disabled"; 179 }; 180 181 pwm@100a0100 { 182 compatible = "loongson,ls2k2000-pwm", "loongson,ls7a-pwm"; 183 reg = <0x0 0x100a0100 0x0 0x10>; 184 interrupt-parent = <&pic>; 185 interrupts = <25 IRQ_TYPE_LEVEL_HIGH>; 186 clocks = <&clk LOONGSON2_MISC_CLK>; 187 #pwm-cells = <3>; 188 status = "disabled"; 189 }; 190 191 pwm@100a0200 { 192 compatible = "loongson,ls2k2000-pwm", "loongson,ls7a-pwm"; 193 reg = <0x0 0x100a0200 0x0 0x10>; 194 interrupt-parent = <&pic>; 195 interrupts = <26 IRQ_TYPE_LEVEL_HIGH>; 196 clocks = <&clk LOONGSON2_MISC_CLK>; 197 #pwm-cells = <3>; 198 status = "disabled"; 199 }; 200 201 pwm@100a0300 { 202 compatible = "loongson,ls2k2000-pwm", "loongson,ls7a-pwm"; 203 reg = <0x0 0x100a0300 0x0 0x10>; 204 interrupt-parent = <&pic>; 205 interrupts = <27 IRQ_TYPE_LEVEL_HIGH>; 206 clocks = <&clk LOONGSON2_MISC_CLK>; 207 #pwm-cells = <3>; 208 status = "disabled"; 209 }; 210 211 pwm@100a0400 { 212 compatible = "loongson,ls2k2000-pwm", "loongson,ls7a-pwm"; 213 reg = <0x0 0x100a0400 0x0 0x10>; 214 interrupt-parent = <&pic>; 215 interrupts = <38 IRQ_TYPE_LEVEL_HIGH>; 216 clocks = <&clk LOONGSON2_MISC_CLK>; 217 #pwm-cells = <3>; 218 status = "disabled"; 219 }; 220 221 pwm@100a0500 { 222 compatible = "loongson,ls2k2000-pwm", "loongson,ls7a-pwm"; 223 reg = <0x0 0x100a0500 0x0 0x10>; 224 interrupt-parent = <&pic>; 225 interrupts = <39 IRQ_TYPE_LEVEL_HIGH>; 226 clocks = <&clk LOONGSON2_MISC_CLK>; 227 #pwm-cells = <3>; 228 status = "disabled"; 229 }; 230 231 rtc0: rtc@100d0100 { 232 compatible = "loongson,ls2k2000-rtc", "loongson,ls7a-rtc"; 233 reg = <0x0 0x100d0100 0x0 0x100>; 234 interrupt-parent = <&pic>; 235 interrupts = <52 IRQ_TYPE_LEVEL_HIGH>; 236 status = "disabled"; 237 }; 238 239 i2c@1fe00120 { 240 compatible = "loongson,ls2k-i2c"; 241 reg = <0x0 0x1fe00120 0x0 0x8>; 242 interrupt-parent = <&liointc>; 243 interrupts = <8 IRQ_TYPE_LEVEL_HIGH>; 244 status = "disabled"; 245 }; 246 247 i2c@1fe00130 { 248 compatible = "loongson,ls2k-i2c"; 249 reg = <0x0 0x1fe00130 0x0 0x8>; 250 interrupt-parent = <&liointc>; 251 interrupts = <9 IRQ_TYPE_LEVEL_HIGH>; 252 status = "disabled"; 253 }; 254 255 uart0: serial@1fe001e0 { 256 compatible = "loongson,ls2k2000-uart", "loongson,ls2k1500-uart", "ns16550a"; 257 reg = <0x0 0x1fe001e0 0x0 0x10>; 258 clock-frequency = <100000000>; 259 interrupt-parent = <&liointc>; 260 interrupts = <10 IRQ_TYPE_LEVEL_HIGH>; 261 no-loopback-test; 262 status = "disabled"; 263 }; 264 265 emmc: mmc@79990000 { 266 compatible = "loongson,ls2k2000-mmc"; 267 reg = <0x0 0x79990000 0x0 0x1000>; 268 interrupt-parent = <&pic>; 269 interrupts = <51 IRQ_TYPE_LEVEL_HIGH>; 270 clocks = <&clk LOONGSON2_EMMC_CLK>; 271 status = "disabled"; 272 }; 273 274 mmc@79991000 { 275 compatible = "loongson,ls2k2000-mmc"; 276 reg = <0x0 0x79991000 0x0 0x1000>; 277 interrupt-parent = <&pic>; 278 interrupts = <50 IRQ_TYPE_LEVEL_HIGH>; 279 clocks = <&clk LOONGSON2_EMMC_CLK>; 280 status = "disabled"; 281 }; 282 283 pcie@1a000000 { 284 compatible = "loongson,ls2k-pci"; 285 reg = <0x0 0x1a000000 0x0 0x02000000>, 286 <0xfe 0x0 0x0 0x20000000>; 287 #address-cells = <3>; 288 #size-cells = <2>; 289 device_type = "pci"; 290 msi-parent = <&msi>; 291 bus-range = <0x0 0xff>; 292 ranges = <0x01000000 0x0 0x00008000 0x0 0x18408000 0x0 0x00008000>, 293 <0x02000000 0x0 0x60000000 0x0 0x60000000 0x0 0x20000000>; 294 295 gmac0: ethernet@3,0 { 296 reg = <0x1800 0x0 0x0 0x0 0x0>; 297 interrupts-extended = <&pic 12 IRQ_TYPE_LEVEL_HIGH>, 298 <&pic 13 IRQ_TYPE_LEVEL_HIGH>; 299 interrupt-names = "macirq", "eth_lpi"; 300 status = "disabled"; 301 }; 302 303 gmac1: ethernet@3,1 { 304 reg = <0x1900 0x0 0x0 0x0 0x0>; 305 interrupts-extended = <&pic 14 IRQ_TYPE_LEVEL_HIGH>, 306 <&pic 15 IRQ_TYPE_LEVEL_HIGH>; 307 interrupt-names = "macirq", "eth_lpi"; 308 status = "disabled"; 309 }; 310 311 gmac2: ethernet@3,2 { 312 reg = <0x1a00 0x0 0x0 0x0 0x0>; 313 interrupts-extended = <&pic 17 IRQ_TYPE_LEVEL_HIGH>, 314 <&pic 18 IRQ_TYPE_LEVEL_HIGH>; 315 interrupt-names = "macirq", "eth_lpi"; 316 status = "disabled"; 317 }; 318 319 xhci0: usb@4,0 { 320 reg = <0x2000 0x0 0x0 0x0 0x0>; 321 interrupts-extended = <&pic 48 IRQ_TYPE_LEVEL_HIGH>; 322 status = "disabled"; 323 }; 324 325 xhci1: usb@19,0 { 326 reg = <0xc800 0x0 0x0 0x0 0x0>; 327 interrupts-extended = <&pic 22 IRQ_TYPE_LEVEL_HIGH>; 328 status = "disabled"; 329 }; 330 331 display@6,1 { 332 reg = <0x3100 0x0 0x0 0x0 0x0>; 333 interrupts-extended = <&pic 28 IRQ_TYPE_LEVEL_HIGH>; 334 status = "disabled"; 335 }; 336 337 i2s@7,0 { 338 reg = <0x3800 0x0 0x0 0x0 0x0>; 339 interrupts-extended = <&pic 78 IRQ_TYPE_LEVEL_HIGH>, 340 <&pic 79 IRQ_TYPE_LEVEL_HIGH>; 341 interrupt-names = "tx", "rx"; 342 status = "disabled"; 343 }; 344 345 sata: sata@8,0 { 346 reg = <0x4000 0x0 0x0 0x0 0x0>; 347 interrupts-extended = <&pic 16 IRQ_TYPE_LEVEL_HIGH>; 348 status = "disabled"; 349 }; 350 351 pcie@9,0 { 352 reg = <0x4800 0x0 0x0 0x0 0x0>; 353 #address-cells = <3>; 354 #size-cells = <2>; 355 device_type = "pci"; 356 interrupt-parent = <&pic>; 357 #interrupt-cells = <1>; 358 interrupt-map-mask = <0x0 0x0 0x0 0x0>; 359 interrupt-map = <0x0 0x0 0x0 0x0 &pic 32 IRQ_TYPE_LEVEL_HIGH>; 360 ranges; 361 }; 362 363 pcie@a,0 { 364 reg = <0x5000 0x0 0x0 0x0 0x0>; 365 #address-cells = <3>; 366 #size-cells = <2>; 367 device_type = "pci"; 368 interrupt-parent = <&pic>; 369 #interrupt-cells = <1>; 370 interrupt-map-mask = <0x0 0x0 0x0 0x0>; 371 interrupt-map = <0x0 0x0 0x0 0x0 &pic 33 IRQ_TYPE_LEVEL_HIGH>; 372 ranges; 373 }; 374 375 pcie@b,0 { 376 reg = <0x5800 0x0 0x0 0x0 0x0>; 377 #address-cells = <3>; 378 #size-cells = <2>; 379 device_type = "pci"; 380 interrupt-parent = <&pic>; 381 #interrupt-cells = <1>; 382 interrupt-map-mask = <0x0 0x0 0x0 0x0>; 383 interrupt-map = <0x0 0x0 0x0 0x0 &pic 34 IRQ_TYPE_LEVEL_HIGH>; 384 ranges; 385 }; 386 387 pcie@c,0 { 388 reg = <0x6000 0x0 0x0 0x0 0x0>; 389 #address-cells = <3>; 390 #size-cells = <2>; 391 device_type = "pci"; 392 interrupt-parent = <&pic>; 393 #interrupt-cells = <1>; 394 interrupt-map-mask = <0x0 0x0 0x0 0x0>; 395 interrupt-map = <0x0 0x0 0x0 0x0 &pic 35 IRQ_TYPE_LEVEL_HIGH>; 396 ranges; 397 }; 398 399 pcie@d,0 { 400 reg = <0x6800 0x0 0x0 0x0 0x0>; 401 #address-cells = <3>; 402 #size-cells = <2>; 403 device_type = "pci"; 404 interrupt-parent = <&pic>; 405 #interrupt-cells = <1>; 406 interrupt-map-mask = <0x0 0x0 0x0 0x0>; 407 interrupt-map = <0x0 0x0 0x0 0x0 &pic 36 IRQ_TYPE_LEVEL_HIGH>; 408 ranges; 409 }; 410 411 pcie@e,0 { 412 reg = <0x7000 0x0 0x0 0x0 0x0>; 413 #address-cells = <3>; 414 #size-cells = <2>; 415 device_type = "pci"; 416 interrupt-parent = <&pic>; 417 #interrupt-cells = <1>; 418 interrupt-map-mask = <0x0 0x0 0x0 0x0>; 419 interrupt-map = <0x0 0x0 0x0 0x0 &pic 37 IRQ_TYPE_LEVEL_HIGH>; 420 ranges; 421 }; 422 423 pcie@f,0 { 424 reg = <0x7800 0x0 0x0 0x0 0x0>; 425 #address-cells = <3>; 426 #size-cells = <2>; 427 device_type = "pci"; 428 interrupt-parent = <&pic>; 429 #interrupt-cells = <1>; 430 interrupt-map-mask = <0x0 0x0 0x0 0x0>; 431 interrupt-map = <0x0 0x0 0x0 0x0 &pic 40 IRQ_TYPE_LEVEL_HIGH>; 432 ranges; 433 }; 434 435 pcie@10,0 { 436 reg = <0x8000 0x0 0x0 0x0 0x0>; 437 #address-cells = <3>; 438 #size-cells = <2>; 439 device_type = "pci"; 440 interrupt-parent = <&pic>; 441 #interrupt-cells = <1>; 442 interrupt-map-mask = <0x0 0x0 0x0 0x0>; 443 interrupt-map = <0x0 0x0 0x0 0x0 &pic 30 IRQ_TYPE_LEVEL_HIGH>; 444 ranges; 445 }; 446 }; 447 }; 448};
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