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loongson-2k1000.dtsi
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linux-6.19.14/arch/loongarch/boot/dts/loongson-2k1000.dtsi
1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Copyright (C) 2023 Loongson Technology Corporation Limited 4 */ 5 6/dts-v1/; 7 8#include <dt-bindings/interrupt-controller/irq.h> 9#include <dt-bindings/clock/loongson,ls2k-clk.h> 10#include <dt-bindings/gpio/gpio.h> 11 12/ { 13 #address-cells = <2>; 14 #size-cells = <2>; 15 16 cpus { 17 #address-cells = <1>; 18 #size-cells = <0>; 19 20 cpu0: cpu@0 { 21 compatible = "loongson,la264"; 22 device_type = "cpu"; 23 reg= <0x0>; 24 clocks = <&clk LOONGSON2_NODE_CLK>; 25 }; 26 27 cpu1: cpu@1 { 28 compatible = "loongson,la264"; 29 device_type = "cpu"; 30 reg = <0x1>; 31 clocks = <&clk LOONGSON2_NODE_CLK>; 32 }; 33 }; 34 35 ref_100m: clock-ref-100m { 36 compatible = "fixed-clock"; 37 #clock-cells = <0>; 38 clock-frequency = <100000000>; 39 clock-output-names = "ref_100m"; 40 }; 41 42 cpuintc: interrupt-controller { 43 compatible = "loongson,cpu-interrupt-controller"; 44 #interrupt-cells = <1>; 45 interrupt-controller; 46 }; 47 48 /* i2c of the dvi eeprom edid */ 49 i2c-0 { 50 compatible = "i2c-gpio"; 51 scl-gpios = <&gpio0 0 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; 52 sda-gpios = <&gpio0 1 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; 53 i2c-gpio,delay-us = <5>; /* ~100 kHz */ 54 #address-cells = <1>; 55 #size-cells = <0>; 56 status = "disabled"; 57 }; 58 59 /* i2c of the eeprom edid */ 60 i2c-1 { 61 compatible = "i2c-gpio"; 62 scl-gpios = <&gpio0 33 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; 63 sda-gpios = <&gpio0 32 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; 64 i2c-gpio,delay-us = <5>; /* ~100 kHz */ 65 #address-cells = <1>; 66 #size-cells = <0>; 67 status = "disabled"; 68 }; 69 70 thermal-zones { 71 cpu_thermal: cpu-thermal { 72 polling-delay-passive = <1000>; 73 polling-delay = <5000>; 74 thermal-sensors = <&tsensor 0>; 75 76 trips { 77 cpu_alert: cpu-alert { 78 temperature = <33000>; 79 hysteresis = <2000>; 80 type = "active"; 81 }; 82 83 cpu_crit: cpu-crit { 84 temperature = <85000>; 85 hysteresis = <5000>; 86 type = "critical"; 87 }; 88 }; 89 }; 90 }; 91 92 bus@10000000 { 93 compatible = "simple-bus"; 94 ranges = <0x0 0x10000000 0x0 0x10000000 0x0 0x10000000>, 95 <0x0 0x02000000 0x0 0x02000000 0x0 0x02000000>, 96 <0x0 0x20000000 0x0 0x20000000 0x0 0x10000000>, 97 <0x0 0x40000000 0x0 0x40000000 0x0 0x40000000>, 98 <0xfe 0x0 0xfe 0x0 0x0 0x40000000>; 99 #address-cells = <2>; 100 #size-cells = <2>; 101 dma-coherent; 102 103 isa@18000000 { 104 compatible = "isa"; 105 #size-cells = <1>; 106 #address-cells = <2>; 107 ranges = <1 0x0 0x0 0x18000000 0x4000>; 108 }; 109 110 liointc0: interrupt-controller@1fe01400 { 111 compatible = "loongson,liointc-2.0"; 112 reg = <0x0 0x1fe01400 0x0 0x40>, 113 <0x0 0x1fe01040 0x0 0x8>, 114 <0x0 0x1fe01140 0x0 0x8>; 115 reg-names = "main", "isr0", "isr1"; 116 interrupt-controller; 117 #address-cells = <0>; 118 #interrupt-cells = <2>; 119 interrupt-parent = <&cpuintc>; 120 interrupts = <2>; 121 interrupt-names = "int0"; 122 loongson,parent_int_map = <0xffffffff>, /* int0 */ 123 <0x00000000>, /* int1 */ 124 <0x00000000>, /* int2 */ 125 <0x00000000>; /* int3 */ 126 }; 127 128 liointc1: interrupt-controller@1fe01440 { 129 compatible = "loongson,liointc-2.0"; 130 reg = <0x0 0x1fe01440 0x0 0x40>, 131 <0x0 0x1fe01048 0x0 0x8>, 132 <0x0 0x1fe01148 0x0 0x8>; 133 reg-names = "main", "isr0", "isr1"; 134 interrupt-controller; 135 #address-cells = <0>; 136 #interrupt-cells = <2>; 137 interrupt-parent = <&cpuintc>; 138 interrupts = <3>; 139 interrupt-names = "int1"; 140 loongson,parent_int_map = <0x00000000>, /* int0 */ 141 <0xffffffff>, /* int1 */ 142 <0x00000000>, /* int2 */ 143 <0x00000000>; /* int3 */ 144 }; 145 146 chipid@1fe00000 { 147 compatible = "loongson,ls2k-chipid"; 148 reg = <0x0 0x1fe00000 0x0 0x30>; 149 little-endian; 150 }; 151 152 pctrl: pinctrl@1fe00420 { 153 compatible = "loongson,ls2k-pinctrl"; 154 reg = <0x0 0x1fe00420 0x0 0x18>; 155 status = "disabled"; 156 }; 157 158 clk: clock-controller@1fe00480 { 159 compatible = "loongson,ls2k-clk"; 160 reg = <0x0 0x1fe00480 0x0 0x58>; 161 #clock-cells = <1>; 162 clocks = <&ref_100m>; 163 clock-names = "ref_100m"; 164 }; 165 166 gpio0: gpio@1fe00500 { 167 compatible = "loongson,ls2k-gpio"; 168 reg = <0x0 0x1fe00500 0x0 0x38>; 169 ngpios = <64>; 170 #gpio-cells = <2>; 171 gpio-controller; 172 gpio-ranges = <&pctrl 0x0 0x0 15>, 173 <&pctrl 16 16 15>, 174 <&pctrl 32 32 10>, 175 <&pctrl 44 44 20>; 176 interrupt-parent = <&liointc1>; 177 interrupts = <28 IRQ_TYPE_LEVEL_HIGH>, 178 <29 IRQ_TYPE_LEVEL_HIGH>, 179 <30 IRQ_TYPE_LEVEL_HIGH>, 180 <30 IRQ_TYPE_LEVEL_HIGH>, 181 <26 IRQ_TYPE_LEVEL_HIGH>, 182 <26 IRQ_TYPE_LEVEL_HIGH>, 183 <26 IRQ_TYPE_LEVEL_HIGH>, 184 <26 IRQ_TYPE_LEVEL_HIGH>, 185 <26 IRQ_TYPE_LEVEL_HIGH>, 186 <26 IRQ_TYPE_LEVEL_HIGH>, 187 <26 IRQ_TYPE_LEVEL_HIGH>, 188 <26 IRQ_TYPE_LEVEL_HIGH>, 189 <26 IRQ_TYPE_LEVEL_HIGH>, 190 <26 IRQ_TYPE_LEVEL_HIGH>, 191 <26 IRQ_TYPE_LEVEL_HIGH>, 192 <0 IRQ_TYPE_NONE>, 193 <26 IRQ_TYPE_LEVEL_HIGH>, 194 <26 IRQ_TYPE_LEVEL_HIGH>, 195 <26 IRQ_TYPE_LEVEL_HIGH>, 196 <26 IRQ_TYPE_LEVEL_HIGH>, 197 <26 IRQ_TYPE_LEVEL_HIGH>, 198 <26 IRQ_TYPE_LEVEL_HIGH>, 199 <26 IRQ_TYPE_NONE>, 200 <26 IRQ_TYPE_LEVEL_HIGH>, 201 <26 IRQ_TYPE_LEVEL_HIGH>, 202 <26 IRQ_TYPE_LEVEL_HIGH>, 203 <26 IRQ_TYPE_LEVEL_HIGH>, 204 <26 IRQ_TYPE_LEVEL_HIGH>, 205 <26 IRQ_TYPE_LEVEL_HIGH>, 206 <26 IRQ_TYPE_LEVEL_HIGH>, 207 <26 IRQ_TYPE_LEVEL_HIGH>, 208 <26 IRQ_TYPE_LEVEL_HIGH>, 209 <27 IRQ_TYPE_LEVEL_HIGH>, 210 <27 IRQ_TYPE_LEVEL_HIGH>, 211 <27 IRQ_TYPE_LEVEL_HIGH>, 212 <27 IRQ_TYPE_LEVEL_HIGH>, 213 <27 IRQ_TYPE_LEVEL_HIGH>, 214 <0 IRQ_TYPE_NONE>, 215 <27 IRQ_TYPE_LEVEL_HIGH>, 216 <27 IRQ_TYPE_LEVEL_HIGH>, 217 <27 IRQ_TYPE_LEVEL_HIGH>, 218 <27 IRQ_TYPE_LEVEL_HIGH>, 219 <0 IRQ_TYPE_NONE>, 220 <0 IRQ_TYPE_NONE>, 221 <27 IRQ_TYPE_LEVEL_HIGH>, 222 <27 IRQ_TYPE_LEVEL_HIGH>, 223 <27 IRQ_TYPE_LEVEL_HIGH>, 224 <27 IRQ_TYPE_LEVEL_HIGH>, 225 <27 IRQ_TYPE_LEVEL_HIGH>, 226 <27 IRQ_TYPE_LEVEL_HIGH>, 227 <27 IRQ_TYPE_LEVEL_HIGH>, 228 <27 IRQ_TYPE_LEVEL_HIGH>, 229 <27 IRQ_TYPE_LEVEL_HIGH>, 230 <27 IRQ_TYPE_LEVEL_HIGH>, 231 <27 IRQ_TYPE_LEVEL_HIGH>, 232 <27 IRQ_TYPE_LEVEL_HIGH>, 233 <27 IRQ_TYPE_LEVEL_HIGH>, 234 <27 IRQ_TYPE_LEVEL_HIGH>, 235 <27 IRQ_TYPE_LEVEL_HIGH>, 236 <27 IRQ_TYPE_LEVEL_HIGH>, 237 <27 IRQ_TYPE_LEVEL_HIGH>, 238 <27 IRQ_TYPE_LEVEL_HIGH>, 239 <27 IRQ_TYPE_LEVEL_HIGH>, 240 <27 IRQ_TYPE_LEVEL_HIGH>; 241 }; 242 243 tsensor: thermal-sensor@1fe01500 { 244 compatible = "loongson,ls2k1000-thermal"; 245 reg = <0x0 0x1fe01500 0x0 0x30>; 246 interrupt-parent = <&liointc0>; 247 interrupts = <7 IRQ_TYPE_LEVEL_HIGH>; 248 #thermal-sensor-cells = <1>; 249 }; 250 251 dma-controller@1fe00c00 { 252 compatible = "loongson,ls2k1000-apbdma"; 253 reg = <0x0 0x1fe00c00 0x0 0x8>; 254 interrupt-parent = <&liointc1>; 255 interrupts = <12 IRQ_TYPE_LEVEL_HIGH>; 256 clocks = <&clk LOONGSON2_APB_CLK>; 257 #dma-cells = <1>; 258 status = "disabled"; 259 }; 260 261 apbdma1: dma-controller@1fe00c10 { 262 compatible = "loongson,ls2k1000-apbdma"; 263 reg = <0x0 0x1fe00c10 0x0 0x8>; 264 interrupt-parent = <&liointc1>; 265 interrupts = <13 IRQ_TYPE_LEVEL_HIGH>; 266 clocks = <&clk LOONGSON2_APB_CLK>; 267 #dma-cells = <1>; 268 status = "disabled"; 269 }; 270 271 apbdma2: dma-controller@1fe00c20 { 272 compatible = "loongson,ls2k1000-apbdma"; 273 reg = <0x0 0x1fe00c20 0x0 0x8>; 274 interrupt-parent = <&liointc1>; 275 interrupts = <14 IRQ_TYPE_LEVEL_HIGH>; 276 clocks = <&clk LOONGSON2_APB_CLK>; 277 #dma-cells = <1>; 278 status = "disabled"; 279 }; 280 281 apbdma3: dma-controller@1fe00c30 { 282 compatible = "loongson,ls2k1000-apbdma"; 283 reg = <0x0 0x1fe00c30 0x0 0x8>; 284 interrupt-parent = <&liointc1>; 285 interrupts = <15 IRQ_TYPE_LEVEL_HIGH>; 286 clocks = <&clk LOONGSON2_APB_CLK>; 287 #dma-cells = <1>; 288 status = "disabled"; 289 }; 290 291 dma-controller@1fe00c40 { 292 compatible = "loongson,ls2k1000-apbdma"; 293 reg = <0x0 0x1fe00c40 0x0 0x8>; 294 interrupt-parent = <&liointc1>; 295 interrupts = <16 IRQ_TYPE_LEVEL_HIGH>; 296 clocks = <&clk LOONGSON2_APB_CLK>; 297 #dma-cells = <1>; 298 status = "disabled"; 299 }; 300 301 uart0: serial@1fe20000 { 302 compatible = "loongson,ls2k1000-uart", "loongson,ls2k0500-uart", "ns16550a"; 303 reg = <0x0 0x1fe20000 0x0 0x10>; 304 clock-frequency = <125000000>; 305 interrupt-parent = <&liointc0>; 306 interrupts = <0x0 IRQ_TYPE_LEVEL_HIGH>; 307 no-loopback-test; 308 status = "disabled"; 309 }; 310 311 i2c2: i2c@1fe21000 { 312 compatible = "loongson,ls2k-i2c"; 313 reg = <0x0 0x1fe21000 0x0 0x8>; 314 interrupt-parent = <&liointc0>; 315 interrupts = <22 IRQ_TYPE_LEVEL_HIGH>; 316 status = "disabled"; 317 }; 318 319 i2c3: i2c@1fe21800 { 320 compatible = "loongson,ls2k-i2c"; 321 reg = <0x0 0x1fe21800 0x0 0x8>; 322 interrupt-parent = <&liointc0>; 323 interrupts = <23 IRQ_TYPE_LEVEL_HIGH>; 324 status = "disabled"; 325 }; 326 327 pwm@1fe22000 { 328 compatible = "loongson,ls2k1000-pwm", "loongson,ls7a-pwm"; 329 reg = <0x0 0x1fe22000 0x0 0x10>; 330 interrupt-parent = <&liointc0>; 331 interrupts = <24 IRQ_TYPE_LEVEL_HIGH>; 332 clocks = <&clk LOONGSON2_APB_CLK>; 333 #pwm-cells = <3>; 334 status = "disabled"; 335 }; 336 337 pwm1: pwm@1fe22010 { 338 compatible = "loongson,ls2k1000-pwm", "loongson,ls7a-pwm"; 339 reg = <0x0 0x1fe22010 0x0 0x10>; 340 interrupt-parent = <&liointc0>; 341 interrupts = <25 IRQ_TYPE_LEVEL_HIGH>; 342 clocks = <&clk LOONGSON2_APB_CLK>; 343 #pwm-cells = <3>; 344 status = "disabled"; 345 }; 346 347 pwm@1fe22020 { 348 compatible = "loongson,ls2k1000-pwm", "loongson,ls7a-pwm"; 349 reg = <0x0 0x1fe22020 0x0 0x10>; 350 interrupt-parent = <&liointc0>; 351 interrupts = <26 IRQ_TYPE_LEVEL_HIGH>; 352 clocks = <&clk LOONGSON2_APB_CLK>; 353 #pwm-cells = <3>; 354 status = "disabled"; 355 }; 356 357 pwm@1fe22030 { 358 compatible = "loongson,ls2k1000-pwm", "loongson,ls7a-pwm"; 359 reg = <0x0 0x1fe22030 0x0 0x10>; 360 interrupt-parent = <&liointc0>; 361 interrupts = <27 IRQ_TYPE_LEVEL_HIGH>; 362 clocks = <&clk LOONGSON2_APB_CLK>; 363 #pwm-cells = <3>; 364 status = "disabled"; 365 }; 366 367 pmc: power-management@1fe27000 { 368 compatible = "loongson,ls2k1000-pmc", "loongson,ls2k0500-pmc", "syscon"; 369 reg = <0x0 0x1fe27000 0x0 0x58>; 370 interrupt-parent = <&liointc1>; 371 interrupts = <11 IRQ_TYPE_LEVEL_HIGH>; 372 loongson,suspend-address = <0x0 0x1c000500>; 373 374 syscon-reboot { 375 compatible = "syscon-reboot"; 376 offset = <0x30>; 377 mask = <0x1>; 378 }; 379 380 syscon-poweroff { 381 compatible = "syscon-poweroff"; 382 regmap = <&pmc>; 383 offset = <0x14>; 384 mask = <0x3c00>; 385 value = <0x3c00>; 386 }; 387 }; 388 389 rtc0: rtc@1fe27800 { 390 compatible = "loongson,ls2k1000-rtc"; 391 reg = <0x0 0x1fe27800 0x0 0x100>; 392 interrupt-parent = <&liointc1>; 393 interrupts = <8 IRQ_TYPE_LEVEL_HIGH>; 394 status = "disabled"; 395 }; 396 397 i2s: i2s@1fe2d000 { 398 compatible = "loongson,ls2k1000-i2s"; 399 reg = <0 0x1fe2d000 0 0x14>, 400 <0 0x1fe00438 0 0x8>; 401 interrupt-parent = <&liointc0>; 402 interrupts = <5 IRQ_TYPE_LEVEL_HIGH>; 403 clocks = <&clk LOONGSON2_APB_CLK>; 404 dmas = <&apbdma2 0>, <&apbdma3 0>; 405 dma-names = "tx", "rx"; 406 #sound-dai-cells = <0>; 407 status = "disabled"; 408 }; 409 410 mmc: mmc@1fe2c000 { 411 compatible = "loongson,ls2k1000-mmc"; 412 reg = <0 0x1fe2c000 0 0x68>, 413 <0 0x1fe00438 0 0x8>; 414 interrupt-parent = <&liointc0>; 415 interrupts = <31 IRQ_TYPE_LEVEL_HIGH>; 416 clocks = <&clk LOONGSON2_APB_CLK>; 417 dmas = <&apbdma1 0>; 418 dma-names = "rx-tx"; 419 status = "disabled"; 420 }; 421 422 spi0: spi@1fff0220 { 423 compatible = "loongson,ls2k1000-spi"; 424 reg = <0x0 0x1fff0220 0x0 0x10>; 425 clocks = <&clk LOONGSON2_BOOT_CLK>; 426 status = "disabled"; 427 }; 428 429 pcie@1a000000 { 430 compatible = "loongson,ls2k-pci"; 431 reg = <0x0 0x1a000000 0x0 0x02000000>, 432 <0xfe 0x0 0x0 0x20000000>; 433 #address-cells = <3>; 434 #size-cells = <2>; 435 device_type = "pci"; 436 bus-range = <0x0 0xff>; 437 ranges = <0x01000000 0x0 0x00008000 0x0 0x18008000 0x0 0x00008000>, 438 <0x02000000 0x0 0x60000000 0x0 0x60000000 0x0 0x20000000>; 439 440 gmac0: ethernet@3,0 { 441 reg = <0x1800 0x0 0x0 0x0 0x0>; 442 interrupts-extended = <&liointc0 12 IRQ_TYPE_LEVEL_HIGH>, 443 <&liointc0 13 IRQ_TYPE_LEVEL_HIGH>; 444 interrupt-names = "macirq", "eth_lpi"; 445 status = "disabled"; 446 }; 447 448 gmac1: ethernet@3,1 { 449 reg = <0x1900 0x0 0x0 0x0 0x0>; 450 interrupts-extended = <&liointc0 14 IRQ_TYPE_LEVEL_HIGH>, 451 <&liointc0 15 IRQ_TYPE_LEVEL_HIGH>; 452 interrupt-names = "macirq", "eth_lpi"; 453 status = "disabled"; 454 }; 455 456 ehci0: usb@4,1 { 457 reg = <0x2100 0x0 0x0 0x0 0x0>; 458 interrupts-extended = <&liointc1 18 IRQ_TYPE_LEVEL_HIGH>; 459 status = "disabled"; 460 }; 461 462 ohci0: usb@4,2 { 463 reg = <0x2200 0x0 0x0 0x0 0x0>; 464 interrupts-extended = <&liointc1 19 IRQ_TYPE_LEVEL_HIGH>; 465 status = "disabled"; 466 }; 467 468 display@6,0 { 469 reg = <0x3000 0x0 0x0 0x0 0x0>; 470 interrupts-extended = <&liointc0 28 IRQ_TYPE_LEVEL_HIGH>; 471 status = "disabled"; 472 }; 473 474 hda@7,0 { 475 reg = <0x3800 0x0 0x0 0x0 0x0>; 476 interrupts-extended = <&liointc0 4 IRQ_TYPE_LEVEL_HIGH>; 477 status = "disabled"; 478 }; 479 480 sata: sata@8,0 { 481 reg = <0x4000 0x0 0x0 0x0 0x0>; 482 interrupts-extended = <&liointc0 19 IRQ_TYPE_LEVEL_HIGH>; 483 status = "disabled"; 484 }; 485 486 pcie@9,0 { 487 reg = <0x4800 0x0 0x0 0x0 0x0>; 488 #address-cells = <3>; 489 #size-cells = <2>; 490 device_type = "pci"; 491 #interrupt-cells = <1>; 492 interrupt-map-mask = <0x0 0x0 0x0 0x0>; 493 interrupt-map = <0x0 0x0 0x0 0x0 &liointc1 0x0 IRQ_TYPE_LEVEL_HIGH>; 494 ranges; 495 }; 496 497 pcie@a,0 { 498 reg = <0x5000 0x0 0x0 0x0 0x0>; 499 #address-cells = <3>; 500 #size-cells = <2>; 501 device_type = "pci"; 502 interrupt-parent = <&liointc1>; 503 #interrupt-cells = <1>; 504 interrupt-map-mask = <0x0 0x0 0x0 0x0>; 505 interrupt-map = <0x0 0x0 0x0 0x0 &liointc1 1 IRQ_TYPE_LEVEL_HIGH>; 506 ranges; 507 }; 508 509 pcie@b,0 { 510 reg = <0x5800 0x0 0x0 0x0 0x0>; 511 #address-cells = <3>; 512 #size-cells = <2>; 513 device_type = "pci"; 514 interrupt-parent = <&liointc1>; 515 #interrupt-cells = <1>; 516 interrupt-map-mask = <0x0 0x0 0x0 0x0>; 517 interrupt-map = <0x0 0x0 0x0 0x0 &liointc1 2 IRQ_TYPE_LEVEL_HIGH>; 518 ranges; 519 }; 520 521 pcie@c,0 { 522 reg = <0x6000 0x0 0x0 0x0 0x0>; 523 #address-cells = <3>; 524 #size-cells = <2>; 525 device_type = "pci"; 526 interrupt-parent = <&liointc1>; 527 #interrupt-cells = <1>; 528 interrupt-map-mask = <0x0 0x0 0x0 0x0>; 529 interrupt-map = <0x0 0x0 0x0 0x0 &liointc1 3 IRQ_TYPE_LEVEL_HIGH>; 530 ranges; 531 }; 532 533 pcie@d,0 { 534 reg = <0x6800 0x0 0x0 0x0 0x0>; 535 #address-cells = <3>; 536 #size-cells = <2>; 537 device_type = "pci"; 538 interrupt-parent = <&liointc1>; 539 #interrupt-cells = <1>; 540 interrupt-map-mask = <0x0 0x0 0x0 0x0>; 541 interrupt-map = <0x0 0x0 0x0 0x0 &liointc1 4 IRQ_TYPE_LEVEL_HIGH>; 542 ranges; 543 }; 544 545 pcie@e,0 { 546 reg = <0x7000 0x0 0x0 0x0 0x0>; 547 #address-cells = <3>; 548 #size-cells = <2>; 549 device_type = "pci"; 550 interrupt-parent = <&liointc1>; 551 #interrupt-cells = <1>; 552 interrupt-map-mask = <0x0 0x0 0x0 0x0>; 553 interrupt-map = <0x0 0x0 0x0 0x0 &liointc1 5 IRQ_TYPE_LEVEL_HIGH>; 554 ranges; 555 }; 556 }; 557 }; 558};
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