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loongson-2k0500.dtsi
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linux-6.19.14/arch/loongarch/boot/dts/loongson-2k0500.dtsi
1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Copyright (C) 2023 Loongson Technology Corporation Limited 4 */ 5 6/dts-v1/; 7 8#include <dt-bindings/interrupt-controller/irq.h> 9#include <dt-bindings/clock/loongson,ls2k-clk.h> 10 11/ { 12 #address-cells = <2>; 13 #size-cells = <2>; 14 15 cpus { 16 #address-cells = <1>; 17 #size-cells = <0>; 18 19 cpu0: cpu@0 { 20 compatible = "loongson,la264"; 21 device_type = "cpu"; 22 reg = <0x0>; 23 clocks = <&clk LOONGSON2_NODE_CLK>; 24 }; 25 }; 26 27 ref_100m: clock-ref-100m { 28 compatible = "fixed-clock"; 29 #clock-cells = <0>; 30 clock-frequency = <100000000>; 31 clock-output-names = "ref_100m"; 32 }; 33 34 cpuintc: interrupt-controller { 35 compatible = "loongson,cpu-interrupt-controller"; 36 #interrupt-cells = <1>; 37 interrupt-controller; 38 }; 39 40 thermal-zones { 41 cpu-thermal { 42 polling-delay-passive = <1000>; 43 polling-delay = <5000>; 44 thermal-sensors = <&tsensor 0>; 45 46 trips { 47 cpu-alert { 48 temperature = <33000>; 49 hysteresis = <2000>; 50 type = "active"; 51 }; 52 53 cpu-crit { 54 temperature = <85000>; 55 hysteresis = <5000>; 56 type = "critical"; 57 }; 58 }; 59 }; 60 }; 61 62 bus@10000000 { 63 compatible = "simple-bus"; 64 ranges = <0x0 0x10000000 0x0 0x10000000 0x0 0x10000000>, 65 <0x0 0x02000000 0x0 0x02000000 0x0 0x02000000>, 66 <0x0 0x20000000 0x0 0x20000000 0x0 0x10000000>, 67 <0x0 0x40000000 0x0 0x40000000 0x0 0x40000000>, 68 <0xfe 0x0 0xfe 0x0 0x0 0x40000000>; 69 #address-cells = <2>; 70 #size-cells = <2>; 71 72 isa@16400000 { 73 compatible = "isa"; 74 #size-cells = <1>; 75 #address-cells = <2>; 76 ranges = <1 0x0 0x0 0x16400000 0x4000>; 77 }; 78 79 clk: clock-controller@1fe10400 { 80 compatible = "loongson,ls2k0500-clk"; 81 reg = <0x0 0x1fe10400 0x0 0x2c>; 82 #clock-cells = <1>; 83 clocks = <&ref_100m>; 84 clock-names = "ref_100m"; 85 }; 86 87 dma-controller@1fe10c00 { 88 compatible = "loongson,ls2k0500-apbdma", "loongson,ls2k1000-apbdma"; 89 reg = <0 0x1fe10c00 0 0x8>; 90 interrupt-parent = <&eiointc>; 91 interrupts = <67>; 92 clocks = <&clk LOONGSON2_APB_CLK>; 93 #dma-cells = <1>; 94 status = "disabled"; 95 }; 96 97 dma-controller@1fe10c10 { 98 compatible = "loongson,ls2k0500-apbdma", "loongson,ls2k1000-apbdma"; 99 reg = <0 0x1fe10c10 0 0x8>; 100 interrupt-parent = <&eiointc>; 101 interrupts = <68>; 102 clocks = <&clk LOONGSON2_APB_CLK>; 103 #dma-cells = <1>; 104 status = "disabled"; 105 }; 106 107 apbdma2: dma-controller@1fe10c20 { 108 compatible = "loongson,ls2k0500-apbdma", "loongson,ls2k1000-apbdma"; 109 reg = <0 0x1fe10c20 0 0x8>; 110 interrupt-parent = <&eiointc>; 111 interrupts = <69>; 112 clocks = <&clk LOONGSON2_APB_CLK>; 113 #dma-cells = <1>; 114 status = "disabled"; 115 }; 116 117 apbdma3: dma-controller@1fe10c30 { 118 compatible = "loongson,ls2k0500-apbdma", "loongson,ls2k1000-apbdma"; 119 reg = <0 0x1fe10c30 0 0x8>; 120 interrupt-parent = <&eiointc>; 121 interrupts = <70>; 122 clocks = <&clk LOONGSON2_APB_CLK>; 123 #dma-cells = <1>; 124 status = "disabled"; 125 }; 126 127 liointc0: interrupt-controller@1fe11400 { 128 compatible = "loongson,liointc-2.0"; 129 reg = <0x0 0x1fe11400 0x0 0x40>, 130 <0x0 0x1fe11040 0x0 0x8>; 131 reg-names = "main", "isr0"; 132 133 interrupt-controller; 134 #address-cells = <0>; 135 #interrupt-cells = <2>; 136 interrupt-parent = <&cpuintc>; 137 interrupts = <2>; 138 interrupt-names = "int0"; 139 140 loongson,parent_int_map = <0xffffffff>, /* int0 */ 141 <0x00000000>, /* int1 */ 142 <0x00000000>, /* int2 */ 143 <0x00000000>; /* int3 */ 144 }; 145 146 liointc1: interrupt-controller@1fe11440 { 147 compatible = "loongson,liointc-2.0"; 148 reg = <0x0 0x1fe11440 0x0 0x40>, 149 <0x0 0x1fe11048 0x0 0x8>; 150 reg-names = "main", "isr0"; 151 152 interrupt-controller; 153 #address-cells = <0>; 154 #interrupt-cells = <2>; 155 interrupt-parent = <&cpuintc>; 156 interrupts = <4>; 157 interrupt-names = "int2"; 158 159 loongson,parent_int_map = <0x00000000>, /* int0 */ 160 <0x00000000>, /* int1 */ 161 <0xffffffff>, /* int2 */ 162 <0x00000000>; /* int3 */ 163 }; 164 165 eiointc: interrupt-controller@1fe11600 { 166 compatible = "loongson,ls2k0500-eiointc"; 167 reg = <0x0 0x1fe11600 0x0 0xea00>; 168 interrupt-controller; 169 #address-cells = <0>; 170 #interrupt-cells = <1>; 171 interrupt-parent = <&cpuintc>; 172 interrupts = <3>; 173 }; 174 175 pwm@1ff5c000 { 176 compatible = "loongson,ls2k0500-pwm", "loongson,ls7a-pwm"; 177 reg = <0x0 0x1ff5c000 0x0 0x10>; 178 interrupt-parent = <&liointc0>; 179 interrupts = <24 IRQ_TYPE_LEVEL_HIGH>; 180 clocks = <&clk LOONGSON2_APB_CLK>; 181 #pwm-cells = <3>; 182 status = "disabled"; 183 }; 184 185 pwm@1ff5c010 { 186 compatible = "loongson,ls2k0500-pwm", "loongson,ls7a-pwm"; 187 reg = <0x0 0x1ff5c010 0x0 0x10>; 188 interrupt-parent = <&liointc0>; 189 interrupts = <24 IRQ_TYPE_LEVEL_HIGH>; 190 clocks = <&clk LOONGSON2_APB_CLK>; 191 #pwm-cells = <3>; 192 status = "disabled"; 193 }; 194 195 pwm@1ff5c020 { 196 compatible = "loongson,ls2k0500-pwm", "loongson,ls7a-pwm"; 197 reg = <0x0 0x1ff5c020 0x0 0x10>; 198 interrupt-parent = <&liointc0>; 199 interrupts = <24 IRQ_TYPE_LEVEL_HIGH>; 200 clocks = <&clk LOONGSON2_APB_CLK>; 201 #pwm-cells = <3>; 202 status = "disabled"; 203 }; 204 205 pwm@1ff5c030 { 206 compatible = "loongson,ls2k0500-pwm", "loongson,ls7a-pwm"; 207 reg = <0x0 0x1ff5c030 0x0 0x10>; 208 interrupt-parent = <&liointc0>; 209 interrupts = <24 IRQ_TYPE_LEVEL_HIGH>; 210 clocks = <&clk LOONGSON2_APB_CLK>; 211 #pwm-cells = <3>; 212 status = "disabled"; 213 }; 214 215 pwm@1ff5c040 { 216 compatible = "loongson,ls2k0500-pwm", "loongson,ls7a-pwm"; 217 reg = <0x0 0x1ff5c040 0x0 0x10>; 218 interrupt-parent = <&liointc0>; 219 interrupts = <25 IRQ_TYPE_LEVEL_HIGH>; 220 clocks = <&clk LOONGSON2_APB_CLK>; 221 #pwm-cells = <3>; 222 status = "disabled"; 223 }; 224 225 pwm@1ff5c050 { 226 compatible = "loongson,ls2k0500-pwm", "loongson,ls7a-pwm"; 227 reg = <0x0 0x1ff5c050 0x0 0x10>; 228 interrupt-parent = <&liointc0>; 229 interrupts = <25 IRQ_TYPE_LEVEL_HIGH>; 230 clocks = <&clk LOONGSON2_APB_CLK>; 231 #pwm-cells = <3>; 232 status = "disabled"; 233 }; 234 235 pwm@1ff5c060 { 236 compatible = "loongson,ls2k0500-pwm", "loongson,ls7a-pwm"; 237 reg = <0x0 0x1ff5c060 0x0 0x10>; 238 interrupt-parent = <&liointc0>; 239 interrupts = <25 IRQ_TYPE_LEVEL_HIGH>; 240 clocks = <&clk LOONGSON2_APB_CLK>; 241 #pwm-cells = <3>; 242 status = "disabled"; 243 }; 244 245 pwm@1ff5c070 { 246 compatible = "loongson,ls2k0500-pwm", "loongson,ls7a-pwm"; 247 reg = <0x0 0x1ff5c070 0x0 0x10>; 248 interrupt-parent = <&liointc0>; 249 interrupts = <25 IRQ_TYPE_LEVEL_HIGH>; 250 clocks = <&clk LOONGSON2_APB_CLK>; 251 #pwm-cells = <3>; 252 status = "disabled"; 253 }; 254 255 pwm@1ff5c080 { 256 compatible = "loongson,ls2k0500-pwm", "loongson,ls7a-pwm"; 257 reg = <0x0 0x1ff5c080 0x0 0x10>; 258 interrupt-parent = <&liointc0>; 259 interrupts = <26 IRQ_TYPE_LEVEL_HIGH>; 260 clocks = <&clk LOONGSON2_APB_CLK>; 261 #pwm-cells = <3>; 262 status = "disabled"; 263 }; 264 265 pwm@1ff5c090 { 266 compatible = "loongson,ls2k0500-pwm", "loongson,ls7a-pwm"; 267 reg = <0x0 0x1ff5c090 0x0 0x10>; 268 interrupt-parent = <&liointc0>; 269 interrupts = <26 IRQ_TYPE_LEVEL_HIGH>; 270 clocks = <&clk LOONGSON2_APB_CLK>; 271 #pwm-cells = <3>; 272 status = "disabled"; 273 }; 274 275 pwm@1ff5c0a0 { 276 compatible = "loongson,ls2k0500-pwm", "loongson,ls7a-pwm"; 277 reg = <0x0 0x1ff5c0a0 0x0 0x10>; 278 interrupt-parent = <&liointc0>; 279 interrupts = <26 IRQ_TYPE_LEVEL_HIGH>; 280 clocks = <&clk LOONGSON2_APB_CLK>; 281 #pwm-cells = <3>; 282 status = "disabled"; 283 }; 284 285 pwm@1ff5c0b0 { 286 compatible = "loongson,ls2k0500-pwm", "loongson,ls7a-pwm"; 287 reg = <0x0 0x1ff5c0b0 0x0 0x10>; 288 interrupt-parent = <&liointc0>; 289 interrupts = <26 IRQ_TYPE_LEVEL_HIGH>; 290 clocks = <&clk LOONGSON2_APB_CLK>; 291 #pwm-cells = <3>; 292 status = "disabled"; 293 }; 294 295 pwm@1ff5c0c0 { 296 compatible = "loongson,ls2k0500-pwm", "loongson,ls7a-pwm"; 297 reg = <0x0 0x1ff5c0c0 0x0 0x10>; 298 interrupt-parent = <&liointc0>; 299 interrupts = <27 IRQ_TYPE_LEVEL_HIGH>; 300 clocks = <&clk LOONGSON2_APB_CLK>; 301 #pwm-cells = <3>; 302 status = "disabled"; 303 }; 304 305 pwm@1ff5c0d0 { 306 compatible = "loongson,ls2k0500-pwm", "loongson,ls7a-pwm"; 307 reg = <0x0 0x1ff5c0d0 0x0 0x10>; 308 interrupt-parent = <&liointc0>; 309 interrupts = <27 IRQ_TYPE_LEVEL_HIGH>; 310 clocks = <&clk LOONGSON2_APB_CLK>; 311 #pwm-cells = <3>; 312 status = "disabled"; 313 }; 314 315 pwm@1ff5c0e0 { 316 compatible = "loongson,ls2k0500-pwm", "loongson,ls7a-pwm"; 317 reg = <0x0 0x1ff5c0e0 0x0 0x10>; 318 interrupt-parent = <&liointc0>; 319 interrupts = <27 IRQ_TYPE_LEVEL_HIGH>; 320 clocks = <&clk LOONGSON2_APB_CLK>; 321 #pwm-cells = <3>; 322 status = "disabled"; 323 }; 324 325 pwm@1ff5c0f0 { 326 compatible = "loongson,ls2k0500-pwm", "loongson,ls7a-pwm"; 327 reg = <0x0 0x1ff5c0f0 0x0 0x10>; 328 interrupt-parent = <&liointc0>; 329 interrupts = <27 IRQ_TYPE_LEVEL_HIGH>; 330 clocks = <&clk LOONGSON2_APB_CLK>; 331 #pwm-cells = <3>; 332 status = "disabled"; 333 }; 334 335 gmac0: ethernet@1f020000 { 336 compatible = "snps,dwmac-3.70a"; 337 reg = <0x0 0x1f020000 0x0 0x10000>; 338 interrupt-parent = <&liointc0>; 339 interrupts = <12 IRQ_TYPE_LEVEL_HIGH>; 340 interrupt-names = "macirq"; 341 status = "disabled"; 342 }; 343 344 gmac1: ethernet@1f030000 { 345 compatible = "snps,dwmac-3.70a"; 346 reg = <0x0 0x1f030000 0x0 0x10000>; 347 interrupt-parent = <&liointc0>; 348 interrupts = <14 IRQ_TYPE_LEVEL_HIGH>; 349 interrupt-names = "macirq"; 350 status = "disabled"; 351 }; 352 353 sata: sata@1f040000 { 354 compatible = "snps,spear-ahci"; 355 reg = <0x0 0x1f040000 0x0 0x10000>; 356 interrupt-parent = <&eiointc>; 357 interrupts = <75>; 358 status = "disabled"; 359 }; 360 361 ehci0: usb@1f050000 { 362 compatible = "generic-ehci"; 363 reg = <0x0 0x1f050000 0x0 0x8000>; 364 interrupt-parent = <&eiointc>; 365 interrupts = <71>; 366 status = "disabled"; 367 }; 368 369 ohci0: usb@1f058000 { 370 compatible = "generic-ohci"; 371 reg = <0x0 0x1f058000 0x0 0x8000>; 372 interrupt-parent = <&eiointc>; 373 interrupts = <72>; 374 status = "disabled"; 375 }; 376 377 tsensor: thermal-sensor@1fe11500 { 378 compatible = "loongson,ls2k0500-thermal", "loongson,ls2k1000-thermal"; 379 reg = <0x0 0x1fe11500 0x0 0x30>; 380 interrupt-parent = <&liointc0>; 381 interrupts = <7 IRQ_TYPE_LEVEL_HIGH>; 382 #thermal-sensor-cells = <1>; 383 }; 384 385 uart0: serial@1ff40800 { 386 compatible = "loongson,ls2k0500-uart", "ns16550a"; 387 reg = <0x0 0x1ff40800 0x0 0x10>; 388 clock-frequency = <100000000>; 389 interrupt-parent = <&eiointc>; 390 interrupts = <2>; 391 no-loopback-test; 392 status = "disabled"; 393 }; 394 395 i2c0: i2c@1ff48000 { 396 compatible = "loongson,ls2k-i2c"; 397 reg = <0x0 0x1ff48000 0x0 0x0800>; 398 interrupt-parent = <&eiointc>; 399 interrupts = <14>; 400 status = "disabled"; 401 }; 402 403 i2c@1ff48800 { 404 compatible = "loongson,ls2k-i2c"; 405 reg = <0x0 0x1ff48800 0x0 0x0800>; 406 interrupt-parent = <&eiointc>; 407 interrupts = <15>; 408 status = "disabled"; 409 }; 410 411 i2c@1ff49000 { 412 compatible = "loongson,ls2k-i2c"; 413 reg = <0x0 0x1ff49000 0x0 0x0800>; 414 interrupt-parent = <&eiointc>; 415 interrupts = <16>; 416 status = "disabled"; 417 }; 418 419 i2c@1ff49800 { 420 compatible = "loongson,ls2k-i2c"; 421 reg = <0x0 0x1ff49800 0x0 0x0800>; 422 interrupt-parent = <&eiointc>; 423 interrupts = <17>; 424 status = "disabled"; 425 }; 426 427 i2c@1ff4a000 { 428 compatible = "loongson,ls2k-i2c"; 429 reg = <0x0 0x1ff4a000 0x0 0x0800>; 430 interrupt-parent = <&eiointc>; 431 interrupts = <18>; 432 status = "disabled"; 433 }; 434 435 i2c@1ff4a800 { 436 compatible = "loongson,ls2k-i2c"; 437 reg = <0x0 0x1ff4a800 0x0 0x0800>; 438 interrupt-parent = <&eiointc>; 439 interrupts = <19>; 440 status = "disabled"; 441 }; 442 443 mmc0: mmc@1ff64000 { 444 compatible = "loongson,ls2k0500-mmc"; 445 reg = <0 0x1ff64000 0 0x2000>, 446 <0 0x1fe10100 0 0x4>; 447 interrupt-parent = <&eiointc>; 448 interrupts = <57>; 449 dmas = <&apbdma3 0>; 450 dma-names = "rx-tx"; 451 clocks = <&clk LOONGSON2_APB_CLK>; 452 status = "disabled"; 453 }; 454 455 mmc@1ff66000 { 456 compatible = "loongson,ls2k0500-mmc"; 457 reg = <0 0x1ff66000 0 0x2000>, 458 <0 0x1fe10100 0 0x4>; 459 interrupt-parent = <&eiointc>; 460 interrupts = <58>; 461 dmas = <&apbdma2 0>; 462 dma-names = "rx-tx"; 463 clocks = <&clk LOONGSON2_APB_CLK>; 464 status = "disabled"; 465 }; 466 467 pmc: power-management@1ff6c000 { 468 compatible = "loongson,ls2k0500-pmc", "syscon"; 469 reg = <0x0 0x1ff6c000 0x0 0x58>; 470 interrupt-parent = <&eiointc>; 471 interrupts = <56>; 472 loongson,suspend-address = <0x0 0x1c000500>; 473 474 syscon-reboot { 475 compatible = "syscon-reboot"; 476 offset = <0x30>; 477 mask = <0x1>; 478 }; 479 480 syscon-poweroff { 481 compatible = "syscon-poweroff"; 482 regmap = <&pmc>; 483 offset = <0x14>; 484 mask = <0x3c00>; 485 value = <0x3c00>; 486 }; 487 }; 488 489 rtc0: rtc@1ff6c100 { 490 compatible = "loongson,ls2k0500-rtc", "loongson,ls7a-rtc"; 491 reg = <0x0 0x1ff6c100 0x0 0x100>; 492 interrupt-parent = <&eiointc>; 493 interrupts = <35>; 494 status = "disabled"; 495 }; 496 497 pcie@1a000000 { 498 compatible = "loongson,ls2k-pci"; 499 reg = <0x0 0x1a000000 0x0 0x02000000>, 500 <0xfe 0x0 0x0 0x20000000>; 501 #address-cells = <3>; 502 #size-cells = <2>; 503 device_type = "pci"; 504 bus-range = <0x0 0x5>; 505 ranges = <0x01000000 0x0 0x00004000 0x0 0x16404000 0x0 0x00004000>, 506 <0x02000000 0x0 0x40000000 0x0 0x40000000 0x0 0x40000000>; 507 508 pcie@0,0 { 509 reg = <0x0000 0x0 0x0 0x0 0x0>; 510 #address-cells = <3>; 511 #size-cells = <2>; 512 device_type = "pci"; 513 interrupt-parent = <&eiointc>; 514 #interrupt-cells = <1>; 515 interrupt-map-mask = <0x0 0x0 0x0 0x0>; 516 interrupt-map = <0x0 0x0 0x0 0x0 &eiointc 81>; 517 ranges; 518 }; 519 520 pcie@1,0 { 521 reg = <0x0800 0x0 0x0 0x0 0x0>; 522 #address-cells = <3>; 523 #size-cells = <2>; 524 device_type = "pci"; 525 interrupt-parent = <&eiointc>; 526 #interrupt-cells = <1>; 527 interrupt-map-mask = <0x0 0x0 0x0 0x0>; 528 interrupt-map = <0x0 0x0 0x0 0x0 &eiointc 82>; 529 ranges; 530 }; 531 }; 532 }; 533};
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