processor.h

  1/* SPDX-License-Identifier: GPL-2.0-only */
  2/*
  3 * Based on arch/arm/include/asm/processor.h
  4 *
  5 * Copyright (C) 1995-1999 Russell King
  6 * Copyright (C) 2012 ARM Ltd.
  7 */
  8#ifndef __ASM_PROCESSOR_H
  9#define __ASM_PROCESSOR_H
 10
 11/*
 12 * On arm64 systems, unaligned accesses by the CPU are cheap, and so there is
 13 * no point in shifting all network buffers by 2 bytes just to make some IP
 14 * header fields appear aligned in memory, potentially sacrificing some DMA
 15 * performance on some platforms.
 16 */
 17#define NET_IP_ALIGN	0
 18
 19#define MTE_CTRL_GCR_USER_EXCL_SHIFT	0
 20#define MTE_CTRL_GCR_USER_EXCL_MASK	0xffff
 21
 22#define MTE_CTRL_TCF_SYNC		(1UL << 16)
 23#define MTE_CTRL_TCF_ASYNC		(1UL << 17)
 24#define MTE_CTRL_TCF_ASYMM		(1UL << 18)
 25
 26#define MTE_CTRL_STORE_ONLY		(1UL << 19)
 27
 28#ifndef __ASSEMBLER__
 29
 30#include <linux/build_bug.h>
 31#include <linux/cache.h>
 32#include <linux/init.h>
 33#include <linux/stddef.h>
 34#include <linux/string.h>
 35#include <linux/thread_info.h>
 36
 37#include <vdso/processor.h>
 38
 39#include <asm/alternative.h>
 40#include <asm/cpufeature.h>
 41#include <asm/hw_breakpoint.h>
 42#include <asm/kasan.h>
 43#include <asm/lse.h>
 44#include <asm/pgtable-hwdef.h>
 45#include <asm/pointer_auth.h>
 46#include <asm/ptrace.h>
 47#include <asm/spectre.h>
 48#include <asm/types.h>
 49
 50/*
 51 * TASK_SIZE - the maximum size of a user space task.
 52 * TASK_UNMAPPED_BASE - the lower boundary of the mmap VM area.
 53 */
 54
 55#define DEFAULT_MAP_WINDOW_64	(UL(1) << VA_BITS_MIN)
 56#define TASK_SIZE_64		(UL(1) << vabits_actual)
 57#define TASK_SIZE_MAX		(UL(1) << VA_BITS)
 58
 59#ifdef CONFIG_COMPAT
 60#if defined(CONFIG_ARM64_64K_PAGES) && defined(CONFIG_KUSER_HELPERS)
 61/*
 62 * With CONFIG_ARM64_64K_PAGES enabled, the last page is occupied
 63 * by the compat vectors page.
 64 */
 65#define TASK_SIZE_32		UL(0x100000000)
 66#else
 67#define TASK_SIZE_32		(UL(0x100000000) - PAGE_SIZE)
 68#endif /* CONFIG_ARM64_64K_PAGES */
 69#define TASK_SIZE		(test_thread_flag(TIF_32BIT) ? \
 70				TASK_SIZE_32 : TASK_SIZE_64)
 71#define TASK_SIZE_OF(tsk)	(test_tsk_thread_flag(tsk, TIF_32BIT) ? \
 72				TASK_SIZE_32 : TASK_SIZE_64)
 73#define DEFAULT_MAP_WINDOW	(test_thread_flag(TIF_32BIT) ? \
 74				TASK_SIZE_32 : DEFAULT_MAP_WINDOW_64)
 75#else
 76#define TASK_SIZE		TASK_SIZE_64
 77#define DEFAULT_MAP_WINDOW	DEFAULT_MAP_WINDOW_64
 78#endif /* CONFIG_COMPAT */
 79
 80#ifdef CONFIG_ARM64_FORCE_52BIT
 81#define STACK_TOP_MAX		TASK_SIZE_64
 82#define TASK_UNMAPPED_BASE	(PAGE_ALIGN(TASK_SIZE / 4))
 83#else
 84#define STACK_TOP_MAX		DEFAULT_MAP_WINDOW_64
 85#define TASK_UNMAPPED_BASE	(PAGE_ALIGN(DEFAULT_MAP_WINDOW / 4))
 86#endif /* CONFIG_ARM64_FORCE_52BIT */
 87
 88#ifdef CONFIG_COMPAT
 89#define AARCH32_VECTORS_BASE	0xffff0000
 90#define STACK_TOP		(test_thread_flag(TIF_32BIT) ? \
 91				AARCH32_VECTORS_BASE : STACK_TOP_MAX)
 92#else
 93#define STACK_TOP		STACK_TOP_MAX
 94#endif /* CONFIG_COMPAT */
 95
 96#ifndef CONFIG_ARM64_FORCE_52BIT
 97#define arch_get_mmap_end(addr, len, flags) \
 98		(((addr) > DEFAULT_MAP_WINDOW) ? TASK_SIZE : DEFAULT_MAP_WINDOW)
 99
100#define arch_get_mmap_base(addr, base) ((addr > DEFAULT_MAP_WINDOW) ? \
101					base + TASK_SIZE - DEFAULT_MAP_WINDOW :\
102					base)
103#endif /* CONFIG_ARM64_FORCE_52BIT */
104
105extern phys_addr_t arm64_dma_phys_limit;
106#define ARCH_LOW_ADDRESS_LIMIT	(arm64_dma_phys_limit - 1)
107
108struct debug_info {
109#ifdef CONFIG_HAVE_HW_BREAKPOINT
110	/* Have we suspended stepping by a debugger? */
111	int			suspended_step;
112	/* Allow breakpoints and watchpoints to be disabled for this thread. */
113	int			bps_disabled;
114	int			wps_disabled;
115	/* Hardware breakpoints pinned to this task. */
116	struct perf_event	*hbp_break[ARM_MAX_BRP];
117	struct perf_event	*hbp_watch[ARM_MAX_WRP];
118#endif
119};
120
121enum vec_type {
122	ARM64_VEC_SVE = 0,
123	ARM64_VEC_SME,
124	ARM64_VEC_MAX,
125};
126
127enum fp_type {
128	FP_STATE_CURRENT,	/* Save based on current task state. */
129	FP_STATE_FPSIMD,
130	FP_STATE_SVE,
131};
132
133struct cpu_context {
134	unsigned long x19;
135	unsigned long x20;
136	unsigned long x21;
137	unsigned long x22;
138	unsigned long x23;
139	unsigned long x24;
140	unsigned long x25;
141	unsigned long x26;
142	unsigned long x27;
143	unsigned long x28;
144	unsigned long fp;
145	unsigned long sp;
146	unsigned long pc;
147};
148
149struct thread_struct {
150	struct cpu_context	cpu_context;	/* cpu context */
151
152	/*
153	 * Whitelisted fields for hardened usercopy:
154	 * Maintainers must ensure manually that this contains no
155	 * implicit padding.
156	 */
157	struct {
158		unsigned long	tp_value;	/* TLS register */
159		unsigned long	tp2_value;
160		u64		fpmr;
161		unsigned long	pad;
162		struct user_fpsimd_state fpsimd_state;
163	} uw;
164
165	enum fp_type		fp_type;	/* registers FPSIMD or SVE? */
166	unsigned int		fpsimd_cpu;
167	void			*sve_state;	/* SVE registers, if any */
168	void			*sme_state;	/* ZA and ZT state, if any */
169	unsigned int		vl[ARM64_VEC_MAX];	/* vector length */
170	unsigned int		vl_onexec[ARM64_VEC_MAX]; /* vl after next exec */
171	unsigned long		fault_address;	/* fault info */
172	unsigned long		fault_code;	/* ESR_EL1 value */
173	struct debug_info	debug;		/* debugging */
174
175	/*
176	 * Set [cleared] by kernel_neon_begin() [kernel_neon_end()] to the
177	 * address of a caller provided buffer that will be used to preserve a
178	 * task's kernel mode FPSIMD state while it is scheduled out.
179	 */
180	struct user_fpsimd_state	*kernel_fpsimd_state;
181	unsigned int			kernel_fpsimd_cpu;
182#ifdef CONFIG_ARM64_PTR_AUTH
183	struct ptrauth_keys_user	keys_user;
184#ifdef CONFIG_ARM64_PTR_AUTH_KERNEL
185	struct ptrauth_keys_kernel	keys_kernel;
186#endif
187#endif
188#ifdef CONFIG_ARM64_MTE
189	u64			mte_ctrl;
190#endif
191	u64			sctlr_user;
192	u64			svcr;
193	u64			tpidr2_el0;
194	u64			por_el0;
195#ifdef CONFIG_ARM64_GCS
196	unsigned int		gcs_el0_mode;
197	unsigned int		gcs_el0_locked;
198	u64			gcspr_el0;
199	u64			gcs_base;
200	u64			gcs_size;
201#endif
202};
203
204static inline unsigned int thread_get_vl(struct thread_struct *thread,
205					 enum vec_type type)
206{
207	return thread->vl[type];
208}
209
210static inline unsigned int thread_get_sve_vl(struct thread_struct *thread)
211{
212	return thread_get_vl(thread, ARM64_VEC_SVE);
213}
214
215static inline unsigned int thread_get_sme_vl(struct thread_struct *thread)
216{
217	return thread_get_vl(thread, ARM64_VEC_SME);
218}
219
220static inline unsigned int thread_get_cur_vl(struct thread_struct *thread)
221{
222	if (system_supports_sme() && (thread->svcr & SVCR_SM_MASK))
223		return thread_get_sme_vl(thread);
224	else
225		return thread_get_sve_vl(thread);
226}
227
228unsigned int task_get_vl(const struct task_struct *task, enum vec_type type);
229void task_set_vl(struct task_struct *task, enum vec_type type,
230		 unsigned long vl);
231void task_set_vl_onexec(struct task_struct *task, enum vec_type type,
232			unsigned long vl);
233unsigned int task_get_vl_onexec(const struct task_struct *task,
234				enum vec_type type);
235
236static inline unsigned int task_get_sve_vl(const struct task_struct *task)
237{
238	return task_get_vl(task, ARM64_VEC_SVE);
239}
240
241static inline unsigned int task_get_sme_vl(const struct task_struct *task)
242{
243	return task_get_vl(task, ARM64_VEC_SME);
244}
245
246static inline void task_set_sve_vl(struct task_struct *task, unsigned long vl)
247{
248	task_set_vl(task, ARM64_VEC_SVE, vl);
249}
250
251static inline unsigned int task_get_sve_vl_onexec(const struct task_struct *task)
252{
253	return task_get_vl_onexec(task, ARM64_VEC_SVE);
254}
255
256static inline void task_set_sve_vl_onexec(struct task_struct *task,
257					  unsigned long vl)
258{
259	task_set_vl_onexec(task, ARM64_VEC_SVE, vl);
260}
261
262#define SCTLR_USER_MASK                                                        \
263	(SCTLR_ELx_ENIA | SCTLR_ELx_ENIB | SCTLR_ELx_ENDA | SCTLR_ELx_ENDB |   \
264	 SCTLR_EL1_TCF0_MASK)
265
266static inline void arch_thread_struct_whitelist(unsigned long *offset,
267						unsigned long *size)
268{
269	/* Verify that there is no padding among the whitelisted fields: */
270	BUILD_BUG_ON(sizeof_field(struct thread_struct, uw) !=
271		     sizeof_field(struct thread_struct, uw.tp_value) +
272		     sizeof_field(struct thread_struct, uw.tp2_value) +
273		     sizeof_field(struct thread_struct, uw.fpmr) +
274		     sizeof_field(struct thread_struct, uw.pad) +
275		     sizeof_field(struct thread_struct, uw.fpsimd_state));
276
277	*offset = offsetof(struct thread_struct, uw);
278	*size = sizeof_field(struct thread_struct, uw);
279}
280
281#ifdef CONFIG_COMPAT
282#define task_user_tls(t)						\
283({									\
284	unsigned long *__tls;						\
285	if (is_compat_thread(task_thread_info(t)))			\
286		__tls = &(t)->thread.uw.tp2_value;			\
287	else								\
288		__tls = &(t)->thread.uw.tp_value;			\
289	__tls;								\
290 })
291#else
292#define task_user_tls(t)	(&(t)->thread.uw.tp_value)
293#endif
294
295/* Sync TPIDR_EL0 back to thread_struct for current */
296void tls_preserve_current_state(void);
297
298#define INIT_THREAD {				\
299	.fpsimd_cpu = NR_CPUS,			\
300}
301
302static inline void start_thread_common(struct pt_regs *regs, unsigned long pc,
303				       unsigned long pstate)
304{
305	/*
306	 * Ensure all GPRs are zeroed, and initialize PC + PSTATE.
307	 * The SP (or compat SP) will be initialized later.
308	 */
309	regs->user_regs = (struct user_pt_regs) {
310		.pc = pc,
311		.pstate = pstate,
312	};
313
314	/*
315	 * To allow the syscalls:sys_exit_execve tracepoint we need to preserve
316	 * syscallno, but do not need orig_x0 or the original GPRs.
317	 */
318	regs->orig_x0 = 0;
319
320	/*
321	 * An exec from a kernel thread won't have an existing PMR value.
322	 */
323	if (system_uses_irq_prio_masking())
324		regs->pmr = GIC_PRIO_IRQON;
325
326	/*
327	 * The pt_regs::stackframe field must remain valid throughout this
328	 * function as a stacktrace can be taken at any time. Any user or
329	 * kernel task should have a valid final frame.
330	 */
331	WARN_ON_ONCE(regs->stackframe.record.fp != 0);
332	WARN_ON_ONCE(regs->stackframe.record.lr != 0);
333	WARN_ON_ONCE(regs->stackframe.type != FRAME_META_TYPE_FINAL);
334}
335
336static inline void start_thread(struct pt_regs *regs, unsigned long pc,
337				unsigned long sp)
338{
339	start_thread_common(regs, pc, PSR_MODE_EL0t);
340	spectre_v4_enable_task_mitigation(current);
341	regs->sp = sp;
342}
343
344#ifdef CONFIG_COMPAT
345static inline void compat_start_thread(struct pt_regs *regs, unsigned long pc,
346				       unsigned long sp)
347{
348	unsigned long pstate = PSR_AA32_MODE_USR;
349	if (pc & 1)
350		pstate |= PSR_AA32_T_BIT;
351	if (IS_ENABLED(CONFIG_CPU_BIG_ENDIAN))
352		pstate |= PSR_AA32_E_BIT;
353
354	start_thread_common(regs, pc, pstate);
355	spectre_v4_enable_task_mitigation(current);
356	regs->compat_sp = sp;
357}
358#endif
359
360static __always_inline bool is_ttbr0_addr(unsigned long addr)
361{
362	/* entry assembly clears tags for TTBR0 addrs */
363	return addr < TASK_SIZE;
364}
365
366static __always_inline bool is_ttbr1_addr(unsigned long addr)
367{
368	/* TTBR1 addresses may have a tag if KASAN_SW_TAGS is in use */
369	return arch_kasan_reset_tag(addr) >= PAGE_OFFSET;
370}
371
372/* Forward declaration, a strange C thing */
373struct task_struct;
374
375unsigned long __get_wchan(struct task_struct *p);
376
377void update_sctlr_el1(u64 sctlr);
378
379/* Thread switching */
380extern struct task_struct *cpu_switch_to(struct task_struct *prev,
381					 struct task_struct *next);
382
383#define task_pt_regs(p) \
384	((struct pt_regs *)(THREAD_SIZE + task_stack_page(p)) - 1)
385
386#define KSTK_EIP(tsk)	((unsigned long)task_pt_regs(tsk)->pc)
387#define KSTK_ESP(tsk)	user_stack_pointer(task_pt_regs(tsk))
388
389/*
390 * Prefetching support
391 */
392#define ARCH_HAS_PREFETCH
393static inline void prefetch(const void *ptr)
394{
395	asm volatile("prfm pldl1keep, %a0\n" : : "p" (ptr));
396}
397
398#define ARCH_HAS_PREFETCHW
399static inline void prefetchw(const void *ptr)
400{
401	asm volatile("prfm pstl1keep, %a0\n" : : "p" (ptr));
402}
403
404extern unsigned long __ro_after_init signal_minsigstksz; /* sigframe size */
405extern void __init minsigstksz_setup(void);
406
407/*
408 * Not at the top of the file due to a direct #include cycle between
409 * <asm/fpsimd.h> and <asm/processor.h>.  Deferring this #include
410 * ensures that contents of processor.h are visible to fpsimd.h even if
411 * processor.h is included first.
412 *
413 * These prctl helpers are the only things in this file that require
414 * fpsimd.h.  The core code expects them to be in this header.
415 */
416#include <asm/fpsimd.h>
417
418/* Userspace interface for PR_S[MV]E_{SET,GET}_VL prctl()s: */
419#define SVE_SET_VL(arg)	sve_set_current_vl(arg)
420#define SVE_GET_VL()	sve_get_current_vl()
421#define SME_SET_VL(arg)	sme_set_current_vl(arg)
422#define SME_GET_VL()	sme_get_current_vl()
423
424/* PR_PAC_RESET_KEYS prctl */
425#define PAC_RESET_KEYS(tsk, arg)	ptrauth_prctl_reset_keys(tsk, arg)
426
427/* PR_PAC_{SET,GET}_ENABLED_KEYS prctl */
428#define PAC_SET_ENABLED_KEYS(tsk, keys, enabled)				\
429	ptrauth_set_enabled_keys(tsk, keys, enabled)
430#define PAC_GET_ENABLED_KEYS(tsk) ptrauth_get_enabled_keys(tsk)
431
432#ifdef CONFIG_ARM64_TAGGED_ADDR_ABI
433/* PR_{SET,GET}_TAGGED_ADDR_CTRL prctl */
434long set_tagged_addr_ctrl(struct task_struct *task, unsigned long arg);
435long get_tagged_addr_ctrl(struct task_struct *task);
436#define SET_TAGGED_ADDR_CTRL(arg)	set_tagged_addr_ctrl(current, arg)
437#define GET_TAGGED_ADDR_CTRL()		get_tagged_addr_ctrl(current)
438#endif
439
440int get_tsc_mode(unsigned long adr);
441int set_tsc_mode(unsigned int val);
442#define GET_TSC_CTL(adr)        get_tsc_mode((adr))
443#define SET_TSC_CTL(val)        set_tsc_mode((val))
444
445#endif /* __ASSEMBLER__ */
446#endif /* __ASM_PROCESSOR_H */