k3-j722s-ti-ipc-firmware.dtsi

  1// SPDX-License-Identifier: GPL-2.0-only OR MIT
  2/**
  3 * Device Tree Source for enabling IPC using TI SDK firmware on J722S SoCs
  4 *
  5 * Copyright (C) 2024-2025 Texas Instruments Incorporated - https://www.ti.com/
  6 */
  7
  8&reserved_memory {
  9	mcu_r5fss0_core0_dma_memory_region: memory@a1000000 {
 10		compatible = "shared-dma-pool";
 11		reg = <0x00 0xa1000000 0x00 0x100000>;
 12		no-map;
 13	};
 14
 15	mcu_r5fss0_core0_memory_region: memory@a1100000 {
 16		compatible = "shared-dma-pool";
 17		reg = <0x00 0xa1100000 0x00 0xf00000>;
 18		no-map;
 19	};
 20
 21	main_r5fss0_core0_dma_memory_region: memory@a2000000 {
 22		compatible = "shared-dma-pool";
 23		reg = <0x00 0xa2000000 0x00 0x100000>;
 24		no-map;
 25	};
 26
 27	main_r5fss0_core0_memory_region: memory@a2100000 {
 28		compatible = "shared-dma-pool";
 29		reg = <0x00 0xa2100000 0x00 0xf00000>;
 30		no-map;
 31	};
 32
 33	c7x_0_dma_memory_region: memory@a3000000 {
 34		compatible = "shared-dma-pool";
 35		reg = <0x00 0xa3000000 0x00 0x100000>;
 36		no-map;
 37	};
 38
 39	c7x_0_memory_region: memory@a3100000 {
 40		compatible = "shared-dma-pool";
 41		reg = <0x00 0xa3100000 0x00 0xf00000>;
 42		no-map;
 43	};
 44
 45	c7x_1_dma_memory_region: memory@a4000000 {
 46		compatible = "shared-dma-pool";
 47		reg = <0x00 0xa4000000 0x00 0x100000>;
 48		no-map;
 49	};
 50
 51	c7x_1_memory_region: memory@a4100000 {
 52		compatible = "shared-dma-pool";
 53		reg = <0x00 0xa4100000 0x00 0xf00000>;
 54		no-map;
 55	};
 56
 57	rtos_ipc_memory_region: memory@a5000000 {
 58		reg = <0x00 0xa5000000 0x00 0x1c00000>;
 59		alignment = <0x1000>;
 60		no-map;
 61	};
 62};
 63
 64&mailbox0_cluster0 {
 65	status = "okay";
 66
 67	mbox_wkup_r5_0: mbox-wkup-r5-0 {
 68		ti,mbox-rx = <0 0 0>;
 69		ti,mbox-tx = <1 0 0>;
 70	};
 71};
 72
 73&mailbox0_cluster1 {
 74	status = "okay";
 75
 76	mbox_mcu_r5_0: mbox-mcu-r5-0 {
 77		ti,mbox-rx = <0 0 0>;
 78		ti,mbox-tx = <1 0 0>;
 79	};
 80};
 81
 82&mailbox0_cluster2 {
 83	status = "okay";
 84
 85	mbox_c7x_0: mbox-c7x-0 {
 86		ti,mbox-rx = <0 0 0>;
 87		ti,mbox-tx = <1 0 0>;
 88	};
 89};
 90
 91&mailbox0_cluster3 {
 92	status = "okay";
 93
 94	mbox_main_r5_0: mbox-main-r5-0 {
 95		ti,mbox-rx = <0 0 0>;
 96		ti,mbox-tx = <1 0 0>;
 97	};
 98
 99	mbox_c7x_1: mbox-c7x-1 {
100		ti,mbox-rx = <2 0 0>;
101		ti,mbox-tx = <3 0 0>;
102	};
103};
104
105/* Timers are used by Remoteproc firmware */
106&main_timer0 {
107	status = "reserved";
108};
109
110&main_timer1 {
111	status = "reserved";
112};
113
114&main_timer2 {
115	status = "reserved";
116};
117
118&wkup_r5fss0 {
119	status = "okay";
120};
121
122&wkup_r5fss0_core0 {
123	mboxes = <&mailbox0_cluster0 &mbox_wkup_r5_0>;
124	memory-region = <&wkup_r5fss0_core0_dma_memory_region>,
125			<&wkup_r5fss0_core0_memory_region>;
126	status = "okay";
127};
128
129&mcu_r5fss0 {
130	status = "okay";
131};
132
133&mcu_r5fss0_core0 {
134	mboxes = <&mailbox0_cluster1 &mbox_mcu_r5_0>;
135	memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
136			<&mcu_r5fss0_core0_memory_region>;
137	status = "okay";
138};
139
140&main_r5fss0 {
141	status = "okay";
142};
143
144&main_r5fss0_core0 {
145	mboxes = <&mailbox0_cluster3 &mbox_main_r5_0>;
146	memory-region = <&main_r5fss0_core0_dma_memory_region>,
147			<&main_r5fss0_core0_memory_region>;
148	status = "okay";
149};
150
151&c7x_0 {
152	mboxes = <&mailbox0_cluster2 &mbox_c7x_0>;
153	memory-region = <&c7x_0_dma_memory_region>,
154			<&c7x_0_memory_region>;
155	status = "okay";
156};
157
158&c7x_1 {
159	mboxes = <&mailbox0_cluster3 &mbox_c7x_1>;
160	memory-region = <&c7x_1_dma_memory_region>,
161			<&c7x_1_memory_region>;
162	status = "okay";
163};