k3-j721s2-som-p0.dtsi

  1// SPDX-License-Identifier: GPL-2.0-only OR MIT
  2/*
  3 * SoM: https://www.ti.com/lit/zip/sprr439
  4 *
  5 * Copyright (C) 2021-2024 Texas Instruments Incorporated - https://www.ti.com/
  6 */
  7
  8/dts-v1/;
  9
 10#include "k3-j721s2.dtsi"
 11#include <dt-bindings/gpio/gpio.h>
 12
 13/ {
 14	memory@80000000 {
 15		device_type = "memory";
 16		bootph-all;
 17		/* 16 GB RAM */
 18		reg = <0x00000000 0x80000000 0x00000000 0x80000000>,
 19		      <0x00000008 0x80000000 0x00000003 0x80000000>;
 20	};
 21
 22	/* Reserving memory regions still pending */
 23	reserved_memory: reserved-memory {
 24		#address-cells = <2>;
 25		#size-cells = <2>;
 26		ranges;
 27
 28		secure_ddr: optee@9e800000 {
 29			reg = <0x00 0x9e800000 0x00 0x01800000>;
 30			alignment = <0x1000>;
 31			no-map;
 32		};
 33
 34		mcu_r5fss0_core0_dma_memory_region: memory@a0000000 {
 35			compatible = "shared-dma-pool";
 36			reg = <0x00 0xa0000000 0x00 0x100000>;
 37			no-map;
 38		};
 39
 40		mcu_r5fss0_core0_memory_region: memory@a0100000 {
 41			compatible = "shared-dma-pool";
 42			reg = <0x00 0xa0100000 0x00 0xf00000>;
 43			no-map;
 44		};
 45	};
 46
 47	mux0: mux-controller-0 {
 48		compatible = "gpio-mux";
 49		#mux-state-cells = <1>;
 50		mux-gpios = <&exp_som 1 GPIO_ACTIVE_HIGH>;
 51	};
 52
 53	mux1: mux-controller-1 {
 54		compatible = "gpio-mux";
 55		#mux-state-cells = <1>;
 56		mux-gpios = <&exp_som 2 GPIO_ACTIVE_HIGH>;
 57	};
 58
 59	transceiver0: can-phy0 {
 60		/* standby pin has been grounded by default */
 61		compatible = "ti,tcan1042";
 62		#phy-cells = <0>;
 63		max-bitrate = <5000000>;
 64	};
 65
 66	vsys_io_1v8: regulator-vsys-io-1v8 {
 67		compatible = "regulator-fixed";
 68		regulator-name = "vsys_io_1v8";
 69		regulator-min-microvolt = <1800000>;
 70		regulator-max-microvolt = <1800000>;
 71		regulator-always-on;
 72		regulator-boot-on;
 73	};
 74
 75	vsys_io_1v2: regulator-vsys-io-1v2 {
 76		compatible = "regulator-fixed";
 77		regulator-name = "vsys_io_1v2";
 78		regulator-min-microvolt = <1200000>;
 79		regulator-max-microvolt = <1200000>;
 80		regulator-always-on;
 81		regulator-boot-on;
 82	};
 83
 84	edp1_refclk: clock-edp1-refclk {
 85		compatible = "fixed-clock";
 86		clock-frequency = <19200000>;
 87		#clock-cells = <0>;
 88	};
 89};
 90
 91&wkup_pmx0 {
 92	mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-default-pins {
 93		pinctrl-single,pins = <
 94			J721S2_WKUP_IOPAD(0x000, PIN_OUTPUT, 0) /* (D19) MCU_OSPI0_CLK */
 95			J721S2_WKUP_IOPAD(0x02c, PIN_OUTPUT, 0) /* (F15) MCU_OSPI0_CSn0 */
 96			J721S2_WKUP_IOPAD(0x00c, PIN_INPUT, 0) /* (C19) MCU_OSPI0_D0 */
 97			J721S2_WKUP_IOPAD(0x010, PIN_INPUT, 0) /* (F16) MCU_OSPI0_D1 */
 98			J721S2_WKUP_IOPAD(0x014, PIN_INPUT, 0) /* (G15) MCU_OSPI0_D2 */
 99			J721S2_WKUP_IOPAD(0x018, PIN_INPUT, 0) /* (F18) MCU_OSPI0_D3 */
100			J721S2_WKUP_IOPAD(0x01c, PIN_INPUT, 0) /* (E19) MCU_OSPI0_D4 */
101			J721S2_WKUP_IOPAD(0x020, PIN_INPUT, 0) /* (G19) MCU_OSPI0_D5 */
102			J721S2_WKUP_IOPAD(0x024, PIN_INPUT, 0) /* (F19) MCU_OSPI0_D6 */
103			J721S2_WKUP_IOPAD(0x028, PIN_INPUT, 0) /* (F20) MCU_OSPI0_D7 */
104			J721S2_WKUP_IOPAD(0x008, PIN_INPUT, 0) /* (E18) MCU_OSPI0_DQS */
105			J721S2_WKUP_IOPAD(0x004, PIN_INPUT, 0) /* (E20) MCU_OSPI0_LBCLKO */
106		>;
107		bootph-all;
108	};
109};
110
111&wkup_pmx1 {
112	pmic_irq_pins_default: pmic-irq-default-pins {
113		pinctrl-single,pins = <
114			/* (C21) MCU_OSPI1_CSn1.WKUP_GPIO0_39 */
115			J721S2_WKUP_IOPAD(0x028, PIN_INPUT, 7)
116		>;
117	};
118};
119
120&wkup_pmx2 {
121	wkup_i2c0_pins_default: wkup-i2c0-default-pins {
122		pinctrl-single,pins = <
123			J721S2_WKUP_IOPAD(0x98, PIN_INPUT, 0) /* (H24) WKUP_I2C0_SCL */
124			J721S2_WKUP_IOPAD(0x9c, PIN_INPUT, 0) /* (H27) WKUP_I2C0_SDA */
125		>;
126		bootph-pre-ram;
127	};
128};
129
130&main_pmx0 {
131	main_i2c0_pins_default: main-i2c0-default-pins {
132		pinctrl-single,pins = <
133			J721S2_IOPAD(0x0e0, PIN_INPUT_PULLUP, 0) /* (AH25) I2C0_SCL */
134			J721S2_IOPAD(0x0e4, PIN_INPUT_PULLUP, 0) /* (AE24) I2C0_SDA */
135		>;
136	};
137
138	main_mcan16_pins_default: main-mcan16-default-pins {
139		pinctrl-single,pins = <
140			J721S2_IOPAD(0x028, PIN_INPUT, 0) /* (AB24) MCAN16_RX */
141			J721S2_IOPAD(0x024, PIN_OUTPUT, 0) /* (Y28) MCAN16_TX */
142		>;
143	};
144};
145
146&wkup_i2c0 {
147	status = "okay";
148	pinctrl-names = "default";
149	pinctrl-0 = <&wkup_i2c0_pins_default>;
150	clock-frequency = <400000>;
151
152	eeprom@50 {
153		/* CAV24C256WE-GT3 */
154		compatible = "atmel,24c256";
155		reg = <0x50>;
156	};
157
158	tps659411: pmic@48 {
159		compatible = "ti,tps6594-q1";
160		reg = <0x48>;
161		system-power-controller;
162		pinctrl-names = "default";
163		pinctrl-0 = <&pmic_irq_pins_default>;
164		interrupt-parent = <&wkup_gpio0>;
165		interrupts = <39 IRQ_TYPE_EDGE_FALLING>;
166		gpio-controller;
167		#gpio-cells = <2>;
168		ti,primary-pmic;
169		buck1234-supply = <&vsys_3v3>;
170		buck5-supply = <&vsys_3v3>;
171		ldo1-supply = <&vsys_3v3>;
172		ldo2-supply = <&vsys_3v3>;
173		ldo3-supply = <&vsys_3v3>;
174		ldo4-supply = <&vsys_3v3>;
175
176		regulators {
177			bucka1234: buck1234 {
178				regulator-name = "vdd_cpu_avs";
179				regulator-min-microvolt = <600000>;
180				regulator-max-microvolt = <900000>;
181				regulator-boot-on;
182				regulator-always-on;
183				bootph-pre-ram;
184			};
185
186			bucka5: buck5 {
187				regulator-name = "vdd_mcu_0v85";
188				regulator-min-microvolt = <850000>;
189				regulator-max-microvolt = <850000>;
190				regulator-boot-on;
191				regulator-always-on;
192			};
193
194			ldoa1: ldo1 {
195				regulator-name = "vdd_mcuwk_0v8";
196				regulator-min-microvolt = <800000>;
197				regulator-max-microvolt = <800000>;
198				regulator-boot-on;
199				regulator-always-on;
200			};
201
202			ldoa2: ldo2 {
203				regulator-name = "vdd_mcu_gpioret_3v3";
204				regulator-min-microvolt = <3300000>;
205				regulator-max-microvolt = <3300000>;
206				regulator-boot-on;
207				regulator-always-on;
208			};
209
210			ldoa3: ldo3 {
211				regulator-name = "vdd_mcuio_1v8";
212				regulator-min-microvolt = <1800000>;
213				regulator-max-microvolt = <1800000>;
214				regulator-boot-on;
215				regulator-always-on;
216			};
217
218			ldoa4: ldo4 {
219				regulator-name = "vda_mcu_1v8";
220				regulator-min-microvolt = <1800000>;
221				regulator-max-microvolt = <1800000>;
222				regulator-boot-on;
223				regulator-always-on;
224			};
225		};
226	};
227
228	tps659414: pmic@4c {
229		compatible = "ti,tps6594-q1";
230		reg = <0x4c>;
231		system-power-controller;
232		interrupt-parent = <&wkup_gpio0>;
233		interrupts = <39 IRQ_TYPE_EDGE_FALLING>;
234		gpio-controller;
235		#gpio-cells = <2>;
236		buck1-supply = <&vsys_3v3>;
237		buck2-supply = <&vsys_3v3>;
238		buck3-supply = <&vsys_3v3>;
239		buck4-supply = <&vsys_3v3>;
240		buck5-supply = <&vsys_3v3>;
241		ldo1-supply = <&vsys_3v3>;
242		ldo2-supply = <&vsys_3v3>;
243		ldo3-supply = <&vsys_3v3>;
244		ldo4-supply = <&vsys_3v3>;
245
246		regulators {
247			buckb1: buck1 {
248				regulator-name = "vdd_io_1v8_reg";
249				regulator-min-microvolt = <1800000>;
250				regulator-max-microvolt = <1800000>;
251				regulator-always-on;
252				regulator-boot-on;
253			};
254
255			buckb2: buck2 {
256				regulator-name = "vdd_fpd_1v1";
257				regulator-min-microvolt = <1100000>;
258				regulator-max-microvolt = <1100000>;
259				regulator-boot-on;
260				regulator-always-on;
261			};
262
263			buckb3: buck3 {
264				regulator-name = "vdd_phy_1v8";
265				regulator-min-microvolt = <1800000>;
266				regulator-max-microvolt = <1800000>;
267				regulator-boot-on;
268				regulator-always-on;
269			};
270
271			buckb4: buck4 {
272				regulator-name = "vdd_ddr_1v1";
273				regulator-min-microvolt = <1100000>;
274				regulator-max-microvolt = <1100000>;
275				regulator-boot-on;
276				regulator-always-on;
277			};
278
279			buckb5: buck5 {
280				regulator-name = "vdd_ram_0v85";
281				regulator-min-microvolt = <850000>;
282				regulator-max-microvolt = <850000>;
283				regulator-boot-on;
284				regulator-always-on;
285			};
286
287			ldob1: ldo1 {
288				regulator-name = "vdd_wk_0v8";
289				regulator-min-microvolt = <800000>;
290				regulator-max-microvolt = <800000>;
291				regulator-boot-on;
292				regulator-always-on;
293			};
294
295			ldob2: ldo2 {
296				regulator-name = "vdd_gpioret_3v3";
297				regulator-min-microvolt = <3300000>;
298				regulator-max-microvolt = <3300000>;
299				regulator-boot-on;
300				regulator-always-on;
301			};
302
303			ldob3: ldo3 {
304				regulator-name = "vda_dll_0v8";
305				regulator-min-microvolt = <800000>;
306				regulator-max-microvolt = <800000>;
307				regulator-boot-on;
308				regulator-always-on;
309			};
310
311			ldob4: ldo4 {
312				regulator-name = "vda_pll_1v8";
313				regulator-min-microvolt = <1800000>;
314				regulator-max-microvolt = <1800000>;
315				regulator-boot-on;
316				regulator-always-on;
317			};
318		};
319	};
320
321	lp876411: pmic@58 {
322		compatible = "ti,lp8764-q1";
323		reg = <0x58>;
324		system-power-controller;
325		interrupt-parent = <&wkup_gpio0>;
326		interrupts = <39 IRQ_TYPE_EDGE_FALLING>;
327		gpio-controller;
328		#gpio-cells = <2>;
329		buck1234-supply = <&vsys_3v3>;
330
331		regulators {
332			buckc1234: buck1234 {
333				regulator-name = "vdd_core_0v8";
334				regulator-min-microvolt = <800000>;
335				regulator-max-microvolt = <800000>;
336				regulator-boot-on;
337				regulator-always-on;
338			};
339		};
340	};
341};
342
343&main_i2c0 {
344	status = "okay";
345	pinctrl-names = "default";
346	pinctrl-0 = <&main_i2c0_pins_default>;
347	clock-frequency = <400000>;
348
349	exp_som: gpio@21 {
350		compatible = "ti,tca6408";
351		reg = <0x21>;
352		gpio-controller;
353		#gpio-cells = <2>;
354		gpio-line-names = "USB2.0_MUX_SEL", "CANUART_MUX1_SEL0",
355				  "CANUART_MUX2_SEL0", "CANUART_MUX_SEL1",
356				  "GPIO_RGMII1_RST", "GPIO_eDP_ENABLE",
357				   "GPIO_LIN_EN", "CAN_STB";
358	};
359};
360
361&main_mcan16 {
362	status = "okay";
363	pinctrl-0 = <&main_mcan16_pins_default>;
364	pinctrl-names = "default";
365	phys = <&transceiver0>;
366};
367
368&ospi0 {
369	status = "okay";
370	pinctrl-names = "default";
371	pinctrl-0 = <&mcu_fss0_ospi0_pins_default>;
372
373	flash@0 {
374		compatible = "jedec,spi-nor";
375		reg = <0x0>;
376		spi-tx-bus-width = <8>;
377		spi-rx-bus-width = <8>;
378		spi-max-frequency = <25000000>;
379		bootph-all;
380		cdns,tshsl-ns = <60>;
381		cdns,tsd2d-ns = <60>;
382		cdns,tchsh-ns = <60>;
383		cdns,tslch-ns = <60>;
384		cdns,read-delay = <4>;
385
386		partitions {
387			compatible = "fixed-partitions";
388			#address-cells = <1>;
389			#size-cells = <1>;
390
391			partition@0 {
392				label = "ospi.tiboot3";
393				reg = <0x0 0x80000>;
394			};
395
396			partition@80000 {
397				label = "ospi.tispl";
398				reg = <0x80000 0x200000>;
399			};
400
401			partition@280000 {
402				label = "ospi.u-boot";
403				reg = <0x280000 0x400000>;
404			};
405
406			partition@680000 {
407				label = "ospi.env";
408				reg = <0x680000 0x40000>;
409			};
410
411			partition@6c0000 {
412				label = "ospi.env.backup";
413				reg = <0x6c0000 0x40000>;
414			};
415
416			partition@800000 {
417				label = "ospi.rootfs";
418				reg = <0x800000 0x37c0000>;
419			};
420
421			partition@3fc0000 {
422				label = "ospi.phypattern";
423				reg = <0x3fc0000 0x40000>;
424			};
425		};
426	};
427};
428
429&main_i2c4 {
430	bridge_dsi_edp: bridge-dsi-edp@2c {
431		compatible = "ti,sn65dsi86";
432		reg = <0x2c>;
433		clock-names = "refclk";
434		clocks = <&edp1_refclk>;
435		enable-gpios = <&exp_som 5 0>;
436		vpll-supply = <&vsys_io_1v8>;
437		vccio-supply = <&vsys_io_1v8>;
438		vcca-supply = <&vsys_io_1v2>;
439		vcc-supply = <&vsys_io_1v2>;
440
441		dsi_edp_bridge_ports: ports {
442			#address-cells = <1>;
443			#size-cells = <0>;
444
445			port@0 {
446				reg = <0>;
447			};
448
449			port@1 {
450				reg = <1>;
451			};
452		};
453	};
454};
455
456#include "k3-j721s2-ti-ipc-firmware.dtsi"