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k3-j7200-ti-ipc-firmware.dtsi

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linux-6.19.14/arch/arm64/boot/dts/ti/k3-j7200-ti-ipc-firmware.dtsi DEVICETREE
  1// SPDX-License-Identifier: GPL-2.0-only OR MIT
  2/**
  3 * Device Tree Source for enabling IPC using TI SDK firmware on J7200 SoCs
  4 *
  5 * Copyright (C) 2020-2025 Texas Instruments Incorporated - https://www.ti.com/
  6 */
  7
  8&reserved_memory {
  9	mcu_r5fss0_core1_dma_memory_region: memory@a1000000 {
 10		compatible = "shared-dma-pool";
 11		reg = <0x00 0xa1000000 0x00 0x100000>;
 12		no-map;
 13	};
 14
 15	mcu_r5fss0_core1_memory_region: memory@a1100000 {
 16		compatible = "shared-dma-pool";
 17		reg = <0x00 0xa1100000 0x00 0xf00000>;
 18		no-map;
 19	};
 20
 21	main_r5fss0_core0_dma_memory_region: memory@a2000000 {
 22		compatible = "shared-dma-pool";
 23		reg = <0x00 0xa2000000 0x00 0x100000>;
 24		no-map;
 25	};
 26
 27	main_r5fss0_core0_memory_region: memory@a2100000 {
 28		compatible = "shared-dma-pool";
 29		reg = <0x00 0xa2100000 0x00 0xf00000>;
 30		no-map;
 31	};
 32
 33	main_r5fss0_core1_dma_memory_region: memory@a3000000 {
 34		compatible = "shared-dma-pool";
 35		reg = <0x00 0xa3000000 0x00 0x100000>;
 36		no-map;
 37	};
 38
 39	main_r5fss0_core1_memory_region: memory@a3100000 {
 40		compatible = "shared-dma-pool";
 41		reg = <0x00 0xa3100000 0x00 0xf00000>;
 42		no-map;
 43	};
 44
 45	rtos_ipc_memory_region: memory@a4000000 {
 46		reg = <0x00 0xa4000000 0x00 0x00800000>;
 47		alignment = <0x1000>;
 48		no-map;
 49	};
 50};
 51
 52&mailbox0_cluster0 {
 53	status = "okay";
 54	interrupts = <436>;
 55
 56	mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 {
 57		ti,mbox-rx = <0 0 0>;
 58		ti,mbox-tx = <1 0 0>;
 59	};
 60
 61	mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 {
 62		ti,mbox-rx = <2 0 0>;
 63		ti,mbox-tx = <3 0 0>;
 64	};
 65};
 66
 67&mailbox0_cluster1 {
 68	status = "okay";
 69	interrupts = <432>;
 70
 71	mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 {
 72		ti,mbox-rx = <0 0 0>;
 73		ti,mbox-tx = <1 0 0>;
 74	};
 75
 76	mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 {
 77		ti,mbox-rx = <2 0 0>;
 78		ti,mbox-tx = <3 0 0>;
 79	};
 80};
 81
 82/* Timers are used by Remoteproc firmware */
 83&main_timer0 {
 84	status = "reserved";
 85};
 86
 87&main_timer1 {
 88	status = "reserved";
 89};
 90
 91&main_timer2 {
 92	status = "reserved";
 93};
 94
 95&mcu_r5fss0 {
 96	status = "okay";
 97};
 98
 99&mcu_r5fss0_core0 {
100	mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>;
101	memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
102			<&mcu_r5fss0_core0_memory_region>;
103	status = "okay";
104};
105
106&mcu_r5fss0_core1 {
107	mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core1>;
108	memory-region = <&mcu_r5fss0_core1_dma_memory_region>,
109			<&mcu_r5fss0_core1_memory_region>;
110	status = "okay";
111};
112
113&main_r5fss0 {
114	ti,cluster-mode = <0>;
115	status = "okay";
116};
117
118&main_r5fss0_core0 {
119	mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core0>;
120	memory-region = <&main_r5fss0_core0_dma_memory_region>,
121			<&main_r5fss0_core0_memory_region>;
122	status = "okay";
123};
124
125&main_r5fss0_core1 {
126	mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core1>;
127	memory-region = <&main_r5fss0_core1_dma_memory_region>,
128			<&main_r5fss0_core1_memory_region>;
129	status = "okay";
130};
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