k3-am642-evm-nand.dtso

  1// SPDX-License-Identifier: GPL-2.0-only OR MIT
  2/**
  3 * DT overlay for HSE NAND expansion card on AM642 EVM
  4 *
  5 * Copyright (C) 2021-2024 Texas Instruments Incorporated - https://www.ti.com/
  6 */
  7
  8/dts-v1/;
  9/plugin/;
 10#include <dt-bindings/gpio/gpio.h>
 11#include <dt-bindings/interrupt-controller/irq.h>
 12#include "k3-pinctrl.h"
 13
 14&main_pmx0 {
 15	gpmc0_default_pins: gpmc0-default-pins {
 16		bootph-all;
 17		pinctrl-single,pins = <
 18			AM64X_IOPAD(0x0094, PIN_INPUT, 7) /* (T19) GPMC0_BE1n.GPIO0_36 */
 19			AM64X_IOPAD(0x003c, PIN_INPUT, 0) /* (T20) GPMC0_AD0 */
 20			AM64X_IOPAD(0x0040, PIN_INPUT, 0) /* (U21) GPMC0_AD1 */
 21			AM64X_IOPAD(0x0064, PIN_INPUT, 0) /* (R16) GPMC0_AD10 */
 22			AM64X_IOPAD(0x0068, PIN_INPUT, 0) /* (W20) GPMC0_AD11 */
 23			AM64X_IOPAD(0x006c, PIN_INPUT, 0) /* (W21) GPMC0_AD12 */
 24			AM64X_IOPAD(0x0070, PIN_INPUT, 0) /* (V18) GPMC0_AD13 */
 25			AM64X_IOPAD(0x0074, PIN_INPUT, 0) /* (Y21) GPMC0_AD14 */
 26			AM64X_IOPAD(0x0078, PIN_INPUT, 0) /* (Y20) GPMC0_AD15 */
 27			AM64X_IOPAD(0x0044, PIN_INPUT, 0) /* (T18) GPMC0_AD2 */
 28			AM64X_IOPAD(0x0048, PIN_INPUT, 0) /* (U20) GPMC0_AD3 */
 29			AM64X_IOPAD(0x004c, PIN_INPUT, 0) /* (U18) GPMC0_AD4 */
 30			AM64X_IOPAD(0x0050, PIN_INPUT, 0) /* (U19) GPMC0_AD5 */
 31			AM64X_IOPAD(0x0054, PIN_INPUT, 0) /* (V20) GPMC0_AD6 */
 32			AM64X_IOPAD(0x0058, PIN_INPUT, 0) /* (V21) GPMC0_AD7 */
 33			AM64X_IOPAD(0x005c, PIN_INPUT, 0) /* (V19) GPMC0_AD8 */
 34			AM64X_IOPAD(0x0060, PIN_INPUT, 0) /* (T17) GPMC0_AD9 */
 35			AM64X_IOPAD(0x0098, PIN_INPUT_PULLUP, 0) /* (W19) GPMC0_WAIT0 */
 36			AM64X_IOPAD(0x009c, PIN_INPUT_PULLUP, 0) /* (Y18) GPMC0_WAIT1 */
 37			AM64X_IOPAD(0x00a8, PIN_OUTPUT_PULLUP, 0) /* (R19) GPMC0_CSn0 */
 38			AM64X_IOPAD(0x00ac, PIN_OUTPUT_PULLUP, 0) /* (R20) GPMC0_CSn1 */
 39			AM64X_IOPAD(0x00b0, PIN_OUTPUT_PULLUP, 0) /* (P19) GPMC0_CSn2 */
 40			AM64X_IOPAD(0x00b4, PIN_OUTPUT_PULLUP, 0) /* (R21) GPMC0_CSn3 */
 41			AM64X_IOPAD(0x007c, PIN_OUTPUT, 0) /* (R17) GPMC0_CLK */
 42			AM64X_IOPAD(0x0084, PIN_OUTPUT, 0) /* (P16) GPMC0_ADVn_ALE */
 43			AM64X_IOPAD(0x0088, PIN_OUTPUT, 0) /* (R18) GPMC0_OEn_REn */
 44			AM64X_IOPAD(0x008c, PIN_OUTPUT, 0) /* (T21) GPMC0_WEn */
 45			AM64X_IOPAD(0x0090, PIN_OUTPUT, 0) /* (P17) GPMC0_BE0n_CLE */
 46			AM64X_IOPAD(0x00a0, PIN_OUTPUT_PULLUP, 0) /* (N16) GPMC0_WPn */
 47			AM64X_IOPAD(0x00a4, PIN_OUTPUT, 0) /* (N17) GPMC0_DIR */
 48		>;
 49	};
 50};
 51
 52&main_gpio0 {
 53	gpmc0-hog {
 54		bootph-all;
 55		gpio-hog;
 56		gpios = <36 0>;
 57		input;
 58		line-name = "GPMC0_MUX_DIR";
 59	};
 60};
 61
 62&elm0 {
 63	bootph-all;
 64	status = "okay";
 65};
 66
 67&gpmc0 {
 68	status = "okay";
 69	pinctrl-names = "default";
 70	pinctrl-0 = <&gpmc0_default_pins>;
 71	#address-cells = <2>;
 72	#size-cells = <1>;
 73
 74	nand@0,0 {
 75		compatible = "ti,am64-nand";
 76		reg = <0 0 64>;		/* device IO registers */
 77		interrupt-parent = <&gpmc0>;
 78		interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
 79			     <1 IRQ_TYPE_NONE>;	/* termcount */
 80		rb-gpios = <&gpmc0 0 GPIO_ACTIVE_HIGH>;	/* gpmc_wait0 */
 81		ti,nand-xfer-type = "prefetch-polled";
 82		ti,nand-ecc-opt = "bch8";	/* BCH8: Bootrom limitation */
 83		ti,elm-id = <&elm0>;
 84		nand-bus-width = <8>;
 85		gpmc,device-width = <1>;
 86		gpmc,sync-clk-ps = <0>;
 87		gpmc,cs-on-ns = <0>;
 88		gpmc,cs-rd-off-ns = <40>;
 89		gpmc,cs-wr-off-ns = <40>;
 90		gpmc,adv-on-ns = <0>;
 91		gpmc,adv-rd-off-ns = <25>;
 92		gpmc,adv-wr-off-ns = <25>;
 93		gpmc,we-on-ns = <0>;
 94		gpmc,we-off-ns = <20>;
 95		gpmc,oe-on-ns = <3>;
 96		gpmc,oe-off-ns = <30>;
 97		gpmc,access-ns = <30>;
 98		gpmc,rd-cycle-ns = <40>;
 99		gpmc,wr-cycle-ns = <40>;
100		gpmc,bus-turnaround-ns = <0>;
101		gpmc,cycle2cycle-delay-ns = <0>;
102		gpmc,clk-activation-ns = <0>;
103		gpmc,wr-access-ns = <40>;
104		gpmc,wr-data-mux-bus-ns = <0>;
105
106		partitions {
107			compatible = "fixed-partitions";
108			#address-cells = <1>;
109			#size-cells = <1>;
110
111			partition@0 {
112				bootph-all;
113				label = "NAND.tiboot3";
114				reg = <0x00000000 0x00200000>;	/* 2M */
115			};
116			partition@200000 {
117				bootph-all;
118				label = "NAND.tispl";
119				reg = <0x00200000 0x00200000>;	/* 2M */
120			};
121			partition@400000 {
122				bootph-all;
123				label = "NAND.tiboot3.backup";	/* 2M */
124				reg = <0x00400000 0x00200000>;	/* BootROM looks at 4M */
125			};
126			partition@600000 {
127				bootph-all;
128				label = "NAND.u-boot";
129				reg = <0x00600000 0x00400000>;	/* 4M */
130			};
131			partition@a00000 {
132				bootph-all;
133				label = "NAND.u-boot-env";
134				reg = <0x00a00000 0x00040000>;	/* 256K */
135			};
136			partition@a40000 {
137				bootph-all;
138				label = "NAND.u-boot-env.backup";
139				reg = <0x00a40000 0x00040000>;	/* 256K */
140			};
141			partition@a80000 {
142				bootph-all;
143				label = "NAND.file-system";
144				reg = <0x00a80000 0x3f580000>;
145			};
146		};
147	};
148};