k3-am64-phycore-som.dtsi

  1// SPDX-License-Identifier: GPL-2.0-only OR MIT
  2/*
  3 * Copyright (C) 2021-2024 PHYTEC America, LLC - https://www.phytec.com
  4 * Author: Matt McKee <mmckee@phytec.com>
  5 *
  6 * Copyright (C) 2022-2024 PHYTEC Messtechnik GmbH
  7 * Author: Wadim Egorov <w.egorov@phytec.de>
  8 *
  9 * Product homepage:
 10 * https://www.phytec.com/product/phycore-am64x
 11 */
 12
 13#include <dt-bindings/gpio/gpio.h>
 14#include <dt-bindings/leds/common.h>
 15#include <dt-bindings/net/ti-dp83867.h>
 16
 17/ {
 18	model = "PHYTEC phyCORE-AM64x";
 19	compatible = "phytec,am64-phycore-som", "ti,am642";
 20
 21	aliases {
 22		ethernet0 = &cpsw_port1;
 23		mmc0 = &sdhci0;
 24		rtc0 = &i2c_som_rtc;
 25	};
 26
 27	memory@80000000 {
 28		device_type = "memory";
 29		reg = <0x00000000 0x80000000 0x00000000 0x80000000>;
 30		bootph-all;
 31	};
 32
 33	reserved_memory: reserved-memory {
 34		#address-cells = <2>;
 35		#size-cells = <2>;
 36		ranges;
 37
 38		secure_ddr: optee@9e800000 {
 39			reg = <0x00 0x9e800000 0x00 0x01800000>; /* for OP-TEE */
 40			alignment = <0x1000>;
 41			no-map;
 42		};
 43
 44		main_r5fss0_core0_dma_memory_region: memory@a0000000 {
 45			compatible = "shared-dma-pool";
 46			reg = <0x00 0xa0000000 0x00 0x100000>;
 47			no-map;
 48		};
 49
 50		main_r5fss0_core0_memory_region: memory@a0100000 {
 51			compatible = "shared-dma-pool";
 52			reg = <0x00 0xa0100000 0x00 0xf00000>;
 53			no-map;
 54		};
 55	};
 56
 57	leds {
 58		compatible = "gpio-leds";
 59		pinctrl-names = "default";
 60		pinctrl-0 = <&leds_pins_default>;
 61
 62		led-0 {
 63			color = <LED_COLOR_ID_GREEN>;
 64			gpios = <&main_gpio0 12 GPIO_ACTIVE_HIGH>;
 65			linux,default-trigger = "heartbeat";
 66			function = LED_FUNCTION_HEARTBEAT;
 67		};
 68	};
 69
 70	vcc_5v0_som: regulator-vcc-5v0-som {
 71		/* VIN / VCC_5V0_SOM */
 72		compatible = "regulator-fixed";
 73		regulator-name = "VCC_5V0_SOM";
 74		regulator-min-microvolt = <5000000>;
 75		regulator-max-microvolt = <5000000>;
 76		regulator-always-on;
 77		regulator-boot-on;
 78	};
 79};
 80
 81&main_pmx0 {
 82	cpsw_mdio_pins_default: cpsw-mdio-default-pins {
 83		pinctrl-single,pins = <
 84			AM64X_IOPAD(0x01f8, PIN_INPUT, 4)	/* (P5) PRG0_PRU1_GPO18.MDIO0_MDIO */
 85			AM64X_IOPAD(0x01fc, PIN_OUTPUT, 4)	/* (R2) PRG0_PRU1_GPO19.MDIO0_MDC */
 86			AM64X_IOPAD(0x0100, PIN_OUTPUT, 7)	/* (V7) PRG1_PRU0_GPO18.GPIO0_63 */
 87		>;
 88		bootph-all;
 89	};
 90
 91	cpsw_rgmii1_pins_default: cpsw-rgmii1-default-pins {
 92		pinctrl-single,pins = <
 93			AM64X_IOPAD(0x0184, PIN_INPUT, 4)	/* (W6) PRG0_PRU0_GPO9.RGMII1_RX_CTL */
 94			AM64X_IOPAD(0x0188, PIN_INPUT, 4)	/* (AA5) PRG0_PRU0_GPO10.RGMII1_RXC */
 95			AM64X_IOPAD(0x00dc, PIN_OUTPUT, 4)	/* (U15) PRG1_PRU0_GPO9.RGMII1_TX_CTL */
 96			AM64X_IOPAD(0x00e0, PIN_OUTPUT, 4)	/* (U14) PRG1_PRU0_GPO10.RGMII1_TXC */
 97			AM64X_IOPAD(0x01cc, PIN_INPUT, 4)	/* (W5) PRG0_PRU1_GPO7.RGMII1_RD0 */
 98			AM64X_IOPAD(0x0124, PIN_OUTPUT, 4)	/* (V15) PRG1_PRU1_GPO7.RGMII1_TD0 */
 99			AM64X_IOPAD(0x01d4, PIN_INPUT, 4)	/* (Y5) PRG0_PRU1_GPO9.RGMII1_RD1 */
100			AM64X_IOPAD(0x012c, PIN_OUTPUT, 4)	/* (V14) PRG1_PRU1_GPO9.RGMII1_TD1 */
101			AM64X_IOPAD(0x01d8, PIN_INPUT, 4)	/* (V6) PRG0_PRU1_GPO10.RGMII1_RD2 */
102			AM64X_IOPAD(0x0130, PIN_OUTPUT, 4)	/* (W14) PRG1_PRU1_GPO10.RGMII1_TD2 */
103			AM64X_IOPAD(0x01f4, PIN_INPUT, 4)	/* (V5) PRG0_PRU1_GPO17.RGMII1_RD3 */
104			AM64X_IOPAD(0x014c, PIN_OUTPUT, 4)	/* (AA14) PRG1_PRU1_GPO17.RGMII1_TD3 */
105			AM64X_IOPAD(0x0154, PIN_INPUT, 7)	/* (V12) PRG1_PRU1_GPO19.GPIO0_84 */
106		>;
107		bootph-all;
108	};
109
110	eeprom_wp_pins_default: eeprom-wp-default-pins {
111		pinctrl-single,pins = <
112			AM64X_IOPAD(0x0208, PIN_OUTPUT, 7)	/* (D12) SPI0_CS0.GPIO1_42 */
113		>;
114	};
115
116	leds_pins_default: leds-default-pins {
117		pinctrl-single,pins = <
118			AM64X_IOPAD(0x0030, PIN_OUTPUT, 7)	/* (L18) OSPI0_CSn1.GPIO0_12 */
119		>;
120	};
121
122	main_i2c0_pins_default: main-i2c0-default-pins {
123		pinctrl-single,pins = <
124			AM64X_IOPAD(0x0260, PIN_INPUT, 0)	/* (A18) I2C0_SCL */
125			AM64X_IOPAD(0x0264, PIN_INPUT, 0)	/* (B18) I2C0_SDA */
126		>;
127		bootph-all;
128	};
129
130	ospi0_pins_default: ospi0-default-pins {
131		pinctrl-single,pins = <
132			AM64X_IOPAD(0x0000, PIN_OUTPUT, 0)	/* (N20) OSPI0_CLK */
133			AM64X_IOPAD(0x0008, PIN_INPUT, 0)	/* (N19) OSPI0_DQS */
134			AM64X_IOPAD(0x000c, PIN_INPUT, 0)	/* (M19) OSPI0_D0 */
135			AM64X_IOPAD(0x0010, PIN_INPUT, 0)	/* (M18) OSPI0_D1 */
136			AM64X_IOPAD(0x0014, PIN_INPUT, 0)	/* (M20) OSPI0_D2 */
137			AM64X_IOPAD(0x0018, PIN_INPUT, 0)	/* (M21) OSPI0_D3 */
138			AM64X_IOPAD(0x001c, PIN_INPUT, 0)	/* (P21) OSPI0_D4 */
139			AM64X_IOPAD(0x0020, PIN_INPUT, 0)	/* (P20) OSPI0_D5 */
140			AM64X_IOPAD(0x0024, PIN_INPUT, 0)	/* (N18) OSPI0_D6 */
141			AM64X_IOPAD(0x0028, PIN_INPUT, 0)	/* (M17) OSPI0_D7 */
142			AM64X_IOPAD(0x002c, PIN_OUTPUT, 0)	/* (L19) OSPI0_CSn0 */
143		>;
144		bootph-all;
145	};
146
147	rtc_pins_default: rtc-defaults-pins {
148		pinctrl-single,pins = <
149			AM64X_IOPAD(0x0278, PIN_INPUT, 7)	/* (C19) EXTINTn.GPIO1_70 */
150		>;
151	};
152};
153
154&cpsw3g {
155	pinctrl-names = "default";
156	pinctrl-0 = <&cpsw_rgmii1_pins_default>;
157	status = "okay";
158};
159
160&cpsw3g_mdio {
161	pinctrl-names = "default";
162	pinctrl-0 = <&cpsw_mdio_pins_default>;
163	bootph-all;
164	status = "okay";
165
166	cpsw3g_phy1: ethernet-phy@1 {
167		compatible = "ethernet-phy-id2000.a231", "ethernet-phy-ieee802.3-c22";
168		reg = <1>;
169		interrupt-parent = <&main_gpio0>;
170		interrupts = <84 IRQ_TYPE_EDGE_FALLING>;
171		reset-gpios = <&main_gpio0 63 GPIO_ACTIVE_LOW>;
172		reset-assert-us = <1000>;
173		reset-deassert-us = <1000>;
174		bootph-all;
175		ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
176		ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
177	};
178};
179
180&cpsw_port1 {
181	phy-mode = "rgmii-id";
182	phy-handle = <&cpsw3g_phy1>;
183	bootph-all;
184	status = "okay";
185};
186
187&main_i2c0 {
188	pinctrl-names = "default";
189	pinctrl-0 = <&main_i2c0_pins_default>;
190	clock-frequency = <400000>;
191	bootph-all;
192	status = "okay";
193
194	eeprom@50 {
195		compatible = "atmel,24c32";
196		pinctrl-names = "default";
197		pinctrl-0 = <&eeprom_wp_pins_default>;
198		pagesize = <32>;
199		reg = <0x50>;
200	};
201
202	i2c_som_rtc: rtc@52 {
203		compatible = "microcrystal,rv3028";
204		reg = <0x52>;
205		pinctrl-names = "default";
206		pinctrl-0 = <&rtc_pins_default>;
207		interrupt-parent = <&main_gpio1>;
208		interrupts = <70 IRQ_TYPE_EDGE_FALLING>;
209		wakeup-source;
210	};
211
212	pmic@61 {
213		compatible = "ti,lp8733";
214		reg = <0x61>;
215
216		buck0-in-supply = <&vcc_5v0_som>;
217		buck1-in-supply = <&vcc_5v0_som>;
218		ldo0-in-supply = <&vdd_3v3>;
219		ldo1-in-supply = <&vdd_3v3>;
220
221		regulators {
222			vdd_core: buck0 {
223				regulator-name = "VDD_CORE";
224				regulator-min-microvolt = <750000>;
225				regulator-max-microvolt = <750000>;
226				regulator-always-on;
227				regulator-boot-on;
228			};
229
230			vdd_3v3: buck1 {
231				regulator-name = "VDD_3V3";
232				regulator-min-microvolt = <3300000>;
233				regulator-max-microvolt = <3300000>;
234				regulator-always-on;
235				regulator-boot-on;
236			};
237
238			vdd_1v8_ldo0: ldo0 {
239				regulator-name = "VDD_1V8_LDO0";
240				regulator-min-microvolt = <1800000>;
241				regulator-max-microvolt = <1800000>;
242				regulator-always-on;
243				regulator-boot-on;
244			};
245
246			vdda_1v8: ldo1 {
247				regulator-name = "VDDA_1V8";
248				regulator-min-microvolt = <1800000>;
249				regulator-max-microvolt = <1800000>;
250				regulator-always-on;
251				regulator-boot-on;
252			};
253		};
254	};
255};
256
257&main_pktdma {
258	bootph-all;
259};
260
261&ospi0 {
262	pinctrl-names = "default";
263	pinctrl-0 = <&ospi0_pins_default>;
264	status = "okay";
265
266	serial_flash: flash@0 {
267		compatible = "jedec,spi-nor";
268		reg = <0x0>;
269		spi-tx-bus-width = <8>;
270		spi-rx-bus-width = <8>;
271		spi-max-frequency = <25000000>;
272		cdns,tshsl-ns = <60>;
273		cdns,tsd2d-ns = <60>;
274		cdns,tchsh-ns = <60>;
275		cdns,tslch-ns = <60>;
276		cdns,read-delay = <0>;
277		bootph-all;
278	};
279};
280
281&sdhci0 {
282	non-removable;
283	ti,driver-strength-ohm = <50>;
284	disable-wp;
285	keep-power-in-suspend;
286	bootph-all;
287	status = "okay";
288};
289
290&tscadc0 {
291	status = "okay";
292	adc {
293		ti,adc-channels = <0 1 2 3 4 5 6 7>;
294	};
295};
296
297#include "k3-am64-ti-ipc-firmware.dtsi"