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k3-am62a-phycore-som.dtsi
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linux-6.19.14/arch/arm64/boot/dts/ti/k3-am62a-phycore-som.dtsi
1// SPDX-License-Identifier: GPL-2.0-only OR MIT 2/* 3 * Copyright (C) 2023 - 2024 PHYTEC America LLC 4 * Author: Garrett Giordano <ggiordano@phytec.com> 5 * 6 * Product homepage: 7 * https://www.phytec.com/product/phycore-am62a 8 */ 9 10#include <dt-bindings/gpio/gpio.h> 11#include <dt-bindings/leds/common.h> 12#include <dt-bindings/net/ti-dp83867.h> 13 14/ { 15 model = "PHYTEC phyCORE-AM62Ax"; 16 compatible = "phytec,am62a-phycore-som", "ti,am62a7"; 17 18 aliases { 19 ethernet0 = &cpsw_port1; 20 gpio0 = &main_gpio0; 21 gpio1 = &main_gpio1; 22 i2c0 = &main_i2c0; 23 mmc0 = &sdhci0; 24 rtc0 = &i2c_som_rtc; 25 spi0 = &ospi0; 26 }; 27 28 leds { 29 compatible = "gpio-leds"; 30 pinctrl-names = "default"; 31 pinctrl-0 = <&leds_pins_default>; 32 33 led-0 { 34 color = <LED_COLOR_ID_GREEN>; 35 gpios = <&main_gpio0 13 GPIO_ACTIVE_HIGH>; 36 linux,default-trigger = "heartbeat"; 37 function = LED_FUNCTION_HEARTBEAT; 38 }; 39 }; 40 41 memory@80000000 { 42 device_type = "memory"; 43 /* 2G RAM */ 44 reg = <0x00000000 0x80000000 0x00000000 0x80000000>; 45 bootph-all; 46 }; 47 48 reserved_memory: reserved-memory { 49 #address-cells = <2>; 50 #size-cells = <2>; 51 ranges; 52 53 /* global cma region */ 54 linux,cma { 55 compatible = "shared-dma-pool"; 56 reusable; 57 size = <0x00 0x24000000>; 58 alloc-ranges = <0x00 0xc0000000 0x00 0x24000000>; 59 linux,cma-default; 60 }; 61 62 wkup_r5fss0_core0_dma_memory_region: memory@9c800000 { 63 compatible = "shared-dma-pool"; 64 reg = <0x00 0x9c800000 0x00 0x100000>; 65 no-map; 66 }; 67 68 wkup_r5fss0_core0_memory_region: memory@9c900000 { 69 compatible = "shared-dma-pool"; 70 reg = <0x00 0x9c900000 0x00 0xf00000>; 71 no-map; 72 }; 73 74 secure_tfa_ddr: tfa@9e780000 { 75 reg = <0x00 0x9e780000 0x00 0x80000>; 76 alignment = <0x1000>; 77 no-map; 78 }; 79 80 secure_ddr: optee@9e800000 { 81 reg = <0x00 0x9e800000 0x00 0x01800000>; /* for OP-TEE */ 82 alignment = <0x1000>; 83 no-map; 84 }; 85 }; 86 87 vcc_5v0_som: regulator-vcc-5v0-som { 88 compatible = "regulator-fixed"; 89 regulator-name = "VCC_5V0_SOM"; 90 regulator-min-microvolt = <5000000>; 91 regulator-max-microvolt = <5000000>; 92 regulator-always-on; 93 regulator-boot-on; 94 }; 95}; 96 97&main_pmx0 { 98 leds_pins_default: leds-default-pins { 99 pinctrl-single,pins = < 100 AM62AX_IOPAD(0x034, PIN_OUTPUT, 7) /* (K20) OSPI0_CSN2.GPIO0_13 */ 101 >; 102 }; 103 104 main_i2c0_pins_default: main-i2c0-default-pins { 105 pinctrl-single,pins = < 106 AM62AX_IOPAD(0x1e0, PIN_INPUT_PULLUP, 0) /* (D17) I2C0_SCL */ 107 AM62AX_IOPAD(0x1e4, PIN_INPUT_PULLUP, 0) /* (E16) I2C0_SDA */ 108 >; 109 bootph-all; 110 }; 111 112 main_mdio1_pins_default: main-mdio1-default-pins { 113 pinctrl-single,pins = < 114 AM62AX_IOPAD(0x160, PIN_OUTPUT, 0) /* (V12) MDIO0_MDC */ 115 AM62AX_IOPAD(0x15c, PIN_INPUT, 0) /* (V13) MDIO0_MDIO */ 116 >; 117 bootph-all; 118 }; 119 120 main_mmc0_pins_default: main-mmc0-default-pins { 121 pinctrl-single,pins = < 122 AM62AX_IOPAD(0x220, PIN_INPUT_PULLUP, 0) /* (Y6) MMC0_CMD */ 123 AM62AX_IOPAD(0x218, PIN_INPUT_PULLDOWN, 0) /* (AB7) MMC0_CLK */ 124 AM62AX_IOPAD(0x214, PIN_INPUT_PULLUP, 0) /* (AA6) MMC0_DAT0 */ 125 AM62AX_IOPAD(0x210, PIN_INPUT_PULLUP, 0) /* (AB6) MMC0_DAT1 */ 126 AM62AX_IOPAD(0x20c, PIN_INPUT_PULLUP, 0) /* (Y7) MMC0_DAT2 */ 127 AM62AX_IOPAD(0x208, PIN_INPUT_PULLUP, 0) /* (AA7) MMC0_DAT3 */ 128 AM62AX_IOPAD(0x204, PIN_INPUT_PULLUP, 0) /* (Y8) MMC0_DAT4 */ 129 AM62AX_IOPAD(0x200, PIN_INPUT_PULLUP, 0) /* (W7) MMC0_DAT5 */ 130 AM62AX_IOPAD(0x1fc, PIN_INPUT_PULLUP, 0) /* (W9) MMC0_DAT6 */ 131 AM62AX_IOPAD(0x1f8, PIN_INPUT_PULLUP, 0) /* (AB8) MMC0_DAT7 */ 132 >; 133 bootph-all; 134 }; 135 136 main_rgmii1_pins_default: main-rgmii1-default-pins { 137 pinctrl-single,pins = < 138 AM62AX_IOPAD(0x14c, PIN_INPUT, 0) /* (AB16) RGMII1_RD0 */ 139 AM62AX_IOPAD(0x150, PIN_INPUT, 0) /* (V15) RGMII1_RD1 */ 140 AM62AX_IOPAD(0x154, PIN_INPUT, 0) /* (W15) RGMII1_RD2 */ 141 AM62AX_IOPAD(0x158, PIN_INPUT, 0) /* (V14) RGMII1_RD3 */ 142 AM62AX_IOPAD(0x148, PIN_INPUT, 0) /* (AA16) RGMII1_RXC */ 143 AM62AX_IOPAD(0x144, PIN_INPUT, 0) /* (AA15) RGMII1_RX_CTL */ 144 AM62AX_IOPAD(0x134, PIN_OUTPUT, 0) /* (Y17) RGMII1_TD0 */ 145 AM62AX_IOPAD(0x138, PIN_OUTPUT, 0) /* (V16) RGMII1_TD1 */ 146 AM62AX_IOPAD(0x13c, PIN_OUTPUT, 0) /* (Y16) RGMII1_TD2 */ 147 AM62AX_IOPAD(0x140, PIN_OUTPUT, 0) /* (AA17) RGMII1_TD3 */ 148 AM62AX_IOPAD(0x130, PIN_OUTPUT, 0) /* (AB17) RGMII1_TXC */ 149 AM62AX_IOPAD(0x12c, PIN_OUTPUT, 0) /* (W16) RGMII1_TX_CTL */ 150 >; 151 bootph-all; 152 }; 153 154 ospi0_pins_default: ospi0-default-pins { 155 pinctrl-single,pins = < 156 AM62AX_IOPAD(0x000, PIN_OUTPUT, 0) /* (L22) OSPI0_CLK */ 157 AM62AX_IOPAD(0x02c, PIN_OUTPUT, 0) /* (H21) OSPI0_CSn0 */ 158 AM62AX_IOPAD(0x038, PIN_OUTPUT, 0) /* (G20) OSPI0_CSn3 */ 159 AM62AX_IOPAD(0x00c, PIN_INPUT, 0) /* (J21) OSPI0_D0 */ 160 AM62AX_IOPAD(0x010, PIN_INPUT, 0) /* (J18) OSPI0_D1 */ 161 AM62AX_IOPAD(0x014, PIN_INPUT, 0) /* (J19) OSPI0_D2 */ 162 AM62AX_IOPAD(0x018, PIN_INPUT, 0) /* (H18) OSPI0_D3 */ 163 AM62AX_IOPAD(0x01c, PIN_INPUT, 0) /* (K21) OSPI0_D4 */ 164 AM62AX_IOPAD(0x020, PIN_INPUT, 0) /* (H19) OSPI0_D5 */ 165 AM62AX_IOPAD(0x024, PIN_INPUT, 0) /* (J20) OSPI0_D6 */ 166 AM62AX_IOPAD(0x028, PIN_INPUT, 0) /* (J22) OSPI0_D7 */ 167 AM62AX_IOPAD(0x008, PIN_INPUT, 0) /* (L21) OSPI0_DQS */ 168 >; 169 bootph-all; 170 }; 171 172 pmic_irq_pins_default: pmic-irq-default-pins { 173 pinctrl-single,pins = < 174 AM62AX_IOPAD(0x1f4, PIN_INPUT, 0) /* (D16) EXTINTn */ 175 >; 176 }; 177}; 178 179&a53_opp_table { 180 /* Requires VDD_CORE at 0v85 */ 181 opp-1400000000 { 182 opp-hz = /bits/ 64 <1400000000>; 183 opp-supported-hw = <0x01 0x0004>; 184 clock-latency-ns = <6000000>; 185 }; 186}; 187 188&cpsw3g { 189 pinctrl-names = "default"; 190 pinctrl-0 = <&main_rgmii1_pins_default>; 191 status = "okay"; 192}; 193 194&cpsw_port1 { 195 phy-mode = "rgmii-id"; 196 phy-handle = <&cpsw3g_phy1>; 197 bootph-all; 198}; 199 200&cpsw3g_mdio { 201 pinctrl-names = "default"; 202 pinctrl-0 = <&main_mdio1_pins_default>; 203 204 cpsw3g_phy1: ethernet-phy@1 { 205 compatible = "ethernet-phy-id2000.a231", "ethernet-phy-ieee802.3-c22"; 206 reg = <1>; 207 bootph-all; 208 ti,clk-output-sel = <DP83867_CLK_O_SEL_OFF>; 209 ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>; 210 ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>; 211 }; 212}; 213 214&fss { 215 status = "okay"; 216}; 217 218&main_i2c0 { 219 pinctrl-names = "default"; 220 pinctrl-0 = <&main_i2c0_pins_default>; 221 clock-frequency = <400000>; 222 bootph-all; 223 status = "okay"; 224 225 pmic@30 { 226 compatible = "ti,tps65219"; 227 reg = <0x30>; 228 buck1-supply = <&vcc_5v0_som>; 229 buck2-supply = <&vcc_5v0_som>; 230 buck3-supply = <&vcc_5v0_som>; 231 ldo1-supply = <&vdd_3v3>; 232 ldo2-supply = <&vdd_1v8>; 233 ldo3-supply = <&vcc_5v0_som>; 234 ldo4-supply = <&vcc_5v0_som>; 235 236 pinctrl-names = "default"; 237 pinctrl-0 = <&pmic_irq_pins_default>; 238 interrupt-parent = <&gic500>; 239 interrupts = <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>; 240 interrupt-controller; 241 #interrupt-cells = <1>; 242 system-power-controller; 243 ti,power-button; 244 245 regulators { 246 vdd_3v3: buck1 { 247 regulator-name = "VDD_3V3"; 248 regulator-min-microvolt = <3300000>; 249 regulator-max-microvolt = <3300000>; 250 regulator-boot-on; 251 regulator-always-on; 252 }; 253 254 vdd_1v8: buck2 { 255 regulator-name = "VDD_1V8"; 256 regulator-min-microvolt = <1800000>; 257 regulator-max-microvolt = <1800000>; 258 regulator-boot-on; 259 regulator-always-on; 260 }; 261 262 vdd_lpddr4: buck3 { 263 regulator-name = "VDD_LPDDR4"; 264 regulator-min-microvolt = <1100000>; 265 regulator-max-microvolt = <1100000>; 266 regulator-boot-on; 267 regulator-always-on; 268 }; 269 270 vddshv5_sdio: ldo1 { 271 regulator-name = "VDDSHV5_SDIO"; 272 regulator-min-microvolt = <3300000>; 273 regulator-max-microvolt = <3300000>; 274 regulator-allow-bypass; 275 regulator-boot-on; 276 regulator-always-on; 277 }; 278 279 vddr_core: ldo2 { 280 regulator-name = "VDDR_CORE"; 281 regulator-min-microvolt = <850000>; 282 regulator-max-microvolt = <850000>; 283 regulator-boot-on; 284 regulator-always-on; 285 }; 286 287 vdda_1v8: ldo3 { 288 regulator-name = "VDDA_1V8"; 289 regulator-min-microvolt = <1800000>; 290 regulator-max-microvolt = <1800000>; 291 regulator-boot-on; 292 regulator-always-on; 293 }; 294 295 vdd_2v5: ldo4 { 296 regulator-name = "VDD_2V5"; 297 regulator-min-microvolt = <2500000>; 298 regulator-max-microvolt = <2500000>; 299 regulator-boot-on; 300 regulator-always-on; 301 }; 302 }; 303 }; 304 305 eeprom@50 { 306 compatible = "atmel,24c32"; 307 pagesize = <32>; 308 reg = <0x50>; 309 }; 310 311 i2c_som_rtc: rtc@52 { 312 compatible = "microcrystal,rv3028"; 313 reg = <0x52>; 314 }; 315}; 316 317&main_gpio0 { 318 status = "okay"; 319}; 320 321&main_gpio1 { 322 status = "okay"; 323}; 324 325&main_gpio_intr { 326 status = "okay"; 327}; 328 329&main_pktdma { 330 bootph-all; 331}; 332 333&ospi0 { 334 pinctrl-names = "default"; 335 pinctrl-0 = <&ospi0_pins_default>; 336 status = "okay"; 337 338 serial_flash: flash@0 { 339 compatible = "jedec,spi-nor"; 340 reg = <0x0>; 341 spi-tx-bus-width = <8>; 342 spi-rx-bus-width = <8>; 343 spi-max-frequency = <25000000>; 344 cdns,tshsl-ns = <60>; 345 cdns,tsd2d-ns = <60>; 346 cdns,tchsh-ns = <60>; 347 cdns,tslch-ns = <60>; 348 cdns,read-delay = <0>; 349 bootph-all; 350 }; 351}; 352 353&sdhci0 { 354 pinctrl-names = "default"; 355 pinctrl-0 = <&main_mmc0_pins_default>; 356 non-removable; 357 bootph-all; 358 status = "okay"; 359}; 360 361#include "k3-am62a-ti-ipc-firmware.dtsi"
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