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k3-am62-phycore-som.dtsi
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linux-6.19.14/arch/arm64/boot/dts/ti/k3-am62-phycore-som.dtsi
1// SPDX-License-Identifier: GPL-2.0-only OR MIT 2/* 3 * Copyright (C) 2022-2024 PHYTEC Messtechnik GmbH 4 * Author: Wadim Egorov <w.egorov@phytec.de> 5 * 6 * Product homepage: 7 * https://www.phytec.com/product/phycore-am62x 8 */ 9 10#include <dt-bindings/gpio/gpio.h> 11#include <dt-bindings/leds/common.h> 12#include <dt-bindings/net/ti-dp83867.h> 13 14/ { 15 model = "PHYTEC phyCORE-AM62x"; 16 compatible = "phytec,am62-phycore-som", "ti,am625"; 17 18 aliases { 19 ethernet0 = &cpsw_port1; 20 gpio0 = &main_gpio0; 21 gpio1 = &main_gpio1; 22 i2c0 = &main_i2c0; 23 mmc0 = &sdhci0; 24 rtc0 = &i2c_som_rtc; 25 rtc1 = &wkup_rtc0; 26 spi0 = &ospi0; 27 }; 28 29 memory@80000000 { 30 device_type = "memory"; 31 reg = <0x00000000 0x80000000 0x00000000 0x80000000>; 32 bootph-all; 33 }; 34 35 reserved_memory: reserved-memory { 36 #address-cells = <2>; 37 #size-cells = <2>; 38 ranges; 39 40 ramoops@9c700000 { 41 compatible = "ramoops"; 42 reg = <0x00 0x9c700000 0x00 0x00100000>; 43 record-size = <0x8000>; 44 console-size = <0x8000>; 45 ftrace-size = <0x00>; 46 pmsg-size = <0x8000>; 47 }; 48 49 rtos_ipc_memory_region: memory@9c800000 { 50 compatible = "shared-dma-pool"; 51 reg = <0x00 0x9c800000 0x00 0x00300000>; 52 no-map; 53 }; 54 55 wkup_r5fss0_core0_dma_memory_region: memory@9da00000 { 56 compatible = "shared-dma-pool"; 57 reg = <0x00 0x9da00000 0x00 0x100000>; 58 no-map; 59 }; 60 61 wkup_r5fss0_core0_memory_region: memory@9db00000 { 62 compatible = "shared-dma-pool"; 63 reg = <0x00 0x9db00000 0x00 0xc00000>; 64 no-map; 65 }; 66 67 secure_tfa_ddr: tfa@9e780000 { 68 reg = <0x00 0x9e780000 0x00 0x80000>; 69 alignment = <0x1000>; 70 no-map; 71 }; 72 73 secure_ddr: optee@9e800000 { 74 reg = <0x00 0x9e800000 0x00 0x01800000>; /* for OP-TEE */ 75 alignment = <0x1000>; 76 no-map; 77 }; 78 }; 79 80 vcc_5v0_som: regulator-vcc-5v0-som { 81 compatible = "regulator-fixed"; 82 regulator-name = "VCC_5V0_SOM"; 83 regulator-min-microvolt = <5000000>; 84 regulator-max-microvolt = <5000000>; 85 regulator-always-on; 86 regulator-boot-on; 87 }; 88 89 vdd_1v8: regulator-vdd-1v8 { 90 compatible = "regulator-fixed"; 91 regulator-name = "VDD_1V8"; 92 regulator-min-microvolt = <1800000>; 93 regulator-max-microvolt = <1800000>; 94 vin-supply = <&vcc_5v0_som>; 95 regulator-always-on; 96 regulator-boot-on; 97 }; 98 99 vddshv_3v3: regulator-vddshv-3v3 { 100 compatible = "regulator-fixed"; 101 regulator-name = "VDDSHV0"; 102 regulator-min-microvolt = <3300000>; 103 regulator-max-microvolt = <3300000>; 104 vin-supply = <&vdd_3v3>; 105 regulator-always-on; 106 regulator-boot-on; 107 }; 108 109 leds { 110 compatible = "gpio-leds"; 111 pinctrl-names = "default"; 112 pinctrl-0 = <&leds_pins_default>; 113 114 led-0 { 115 color = <LED_COLOR_ID_GREEN>; 116 gpios = <&main_gpio0 13 GPIO_ACTIVE_HIGH>; 117 linux,default-trigger = "heartbeat"; 118 function = LED_FUNCTION_HEARTBEAT; 119 }; 120 }; 121}; 122 123&main_pmx0 { 124 leds_pins_default: leds-default-pins { 125 pinctrl-single,pins = < 126 AM62X_IOPAD(0x034, PIN_OUTPUT, 7) /* (H21) OSPI0_CSN2.GPIO0_13 */ 127 >; 128 }; 129 130 main_i2c0_pins_default: main-i2c0-default-pins { 131 pinctrl-single,pins = < 132 AM62X_IOPAD(0x1e0, PIN_INPUT_PULLUP, 0) /* (B16) I2C0_SCL */ 133 AM62X_IOPAD(0x1e4, PIN_INPUT_PULLUP, 0) /* (A16) I2C0_SDA */ 134 >; 135 bootph-all; 136 }; 137 138 main_mdio1_pins_default: main-mdio1-default-pins { 139 pinctrl-single,pins = < 140 AM62X_IOPAD(0x160, PIN_OUTPUT, 0) /* (AD24) MDIO0_MDC */ 141 AM62X_IOPAD(0x15c, PIN_INPUT, 0) /* (AB22) MDIO0_MDIO */ 142 >; 143 bootph-all; 144 }; 145 146 main_mmc0_pins_default: main-mmc0-default-pins { 147 pinctrl-single,pins = < 148 AM62X_IOPAD(0x220, PIN_INPUT_PULLUP, 0) /* (Y3) MMC0_CMD */ 149 AM62X_IOPAD(0x218, PIN_INPUT_PULLDOWN, 0) /* (AB1) MMC0_CLK */ 150 AM62X_IOPAD(0x214, PIN_INPUT_PULLUP, 0) /* (AA2) MMC0_DAT0 */ 151 AM62X_IOPAD(0x210, PIN_INPUT_PULLUP, 0) /* (AA1) MMC0_DAT1 */ 152 AM62X_IOPAD(0x20c, PIN_INPUT_PULLUP, 0) /* (AA3) MMC0_DAT2 */ 153 AM62X_IOPAD(0x208, PIN_INPUT_PULLUP, 0) /* (Y4) MMC0_DAT3 */ 154 AM62X_IOPAD(0x204, PIN_INPUT_PULLUP, 0) /* (AB2) MMC0_DAT4 */ 155 AM62X_IOPAD(0x200, PIN_INPUT_PULLUP, 0) /* (AC1) MMC0_DAT5 */ 156 AM62X_IOPAD(0x1fc, PIN_INPUT_PULLUP, 0) /* (AD2) MMC0_DAT6 */ 157 AM62X_IOPAD(0x1f8, PIN_INPUT_PULLUP, 0) /* (AC2) MMC0_DAT7 */ 158 >; 159 bootph-all; 160 }; 161 162 main_rgmii1_pins_default: main-rgmii1-default-pins { 163 pinctrl-single,pins = < 164 AM62X_IOPAD(0x14c, PIN_INPUT, 0) /* (AB17) RGMII1_RD0 */ 165 AM62X_IOPAD(0x150, PIN_INPUT, 0) /* (AC17) RGMII1_RD1 */ 166 AM62X_IOPAD(0x154, PIN_INPUT, 0) /* (AB16) RGMII1_RD2 */ 167 AM62X_IOPAD(0x158, PIN_INPUT, 0) /* (AA15) RGMII1_RD3 */ 168 AM62X_IOPAD(0x148, PIN_INPUT, 0) /* (AD17) RGMII1_RXC */ 169 AM62X_IOPAD(0x144, PIN_INPUT, 0) /* (AE17) RGMII1_RX_CTL */ 170 AM62X_IOPAD(0x134, PIN_OUTPUT, 0) /* (AE20) RGMII1_TD0 */ 171 AM62X_IOPAD(0x138, PIN_OUTPUT, 0) /* (AD20) RGMII1_TD1 */ 172 AM62X_IOPAD(0x13c, PIN_OUTPUT, 0) /* (AE18) RGMII1_TD2 */ 173 AM62X_IOPAD(0x140, PIN_OUTPUT, 0) /* (AD18) RGMII1_TD3 */ 174 AM62X_IOPAD(0x130, PIN_OUTPUT, 0) /* (AE19) RGMII1_TXC */ 175 AM62X_IOPAD(0x12c, PIN_OUTPUT, 0) /* (AD19) RGMII1_TX_CTL */ 176 >; 177 bootph-all; 178 }; 179 180 ospi0_pins_default: ospi0-default-pins { 181 pinctrl-single,pins = < 182 AM62X_IOPAD(0x000, PIN_OUTPUT, 0) /* (H24) OSPI0_CLK */ 183 AM62X_IOPAD(0x02c, PIN_OUTPUT, 0) /* (F23) OSPI0_CSn0 */ 184 AM62X_IOPAD(0x00c, PIN_INPUT, 0) /* (E25) OSPI0_D0 */ 185 AM62X_IOPAD(0x010, PIN_INPUT, 0) /* (G24) OSPI0_D1 */ 186 AM62X_IOPAD(0x014, PIN_INPUT, 0) /* (F25) OSPI0_D2 */ 187 AM62X_IOPAD(0x018, PIN_INPUT, 0) /* (F24) OSPI0_D3 */ 188 AM62X_IOPAD(0x01c, PIN_INPUT, 0) /* (J23) OSPI0_D4 */ 189 AM62X_IOPAD(0x020, PIN_INPUT, 0) /* (J25) OSPI0_D5 */ 190 AM62X_IOPAD(0x024, PIN_INPUT, 0) /* (H25) OSPI0_D6 */ 191 AM62X_IOPAD(0x028, PIN_INPUT, 0) /* (J22) OSPI0_D7 */ 192 AM62X_IOPAD(0x008, PIN_INPUT, 0) /* (J24) OSPI0_DQS */ 193 >; 194 bootph-all; 195 }; 196 197 pmic_irq_pins_default: pmic-irq-default-pins { 198 pinctrl-single,pins = < 199 AM62X_IOPAD(0x01f4, PIN_INPUT, 0) /* (D16) EXTINTn */ 200 >; 201 }; 202}; 203 204&a53_opp_table { 205 opp-1400000000 { 206 opp-hz = /bits/ 64 <1400000000>; 207 opp-supported-hw = <0x01 0x0004>; 208 }; 209}; 210 211&cpsw3g { 212 pinctrl-names = "default"; 213 pinctrl-0 = <&main_rgmii1_pins_default>; 214 status = "okay"; 215}; 216 217&cpsw_port1 { 218 phy-mode = "rgmii-id"; 219 phy-handle = <&cpsw3g_phy1>; 220 bootph-all; 221}; 222 223&cpsw3g_mdio { 224 pinctrl-names = "default"; 225 pinctrl-0 = <&main_mdio1_pins_default>; 226 status = "okay"; 227 228 cpsw3g_phy1: ethernet-phy@1 { 229 compatible = "ethernet-phy-id2000.a231", "ethernet-phy-ieee802.3-c22"; 230 reg = <1>; 231 bootph-all; 232 ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>; 233 ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>; 234 }; 235}; 236 237&main_pktdma { 238 bootph-all; 239}; 240 241&main_i2c0 { 242 pinctrl-names = "default"; 243 pinctrl-0 = <&main_i2c0_pins_default>; 244 clock-frequency = <400000>; 245 bootph-all; 246 status = "okay"; 247 248 pmic@30 { 249 compatible = "ti,tps65219"; 250 reg = <0x30>; 251 buck1-supply = <&vcc_5v0_som>; 252 buck2-supply = <&vcc_5v0_som>; 253 buck3-supply = <&vcc_5v0_som>; 254 ldo1-supply = <&vdd_3v3>; 255 ldo2-supply = <&vdd_1v8>; 256 ldo3-supply = <&vcc_5v0_som>; 257 ldo4-supply = <&vcc_5v0_som>; 258 259 pinctrl-names = "default"; 260 pinctrl-0 = <&pmic_irq_pins_default>; 261 interrupt-parent = <&gic500>; 262 interrupts = <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>; 263 interrupt-controller; 264 #interrupt-cells = <1>; 265 266 ti,power-button; 267 system-power-controller; 268 269 regulators { 270 vdd_core: buck1 { 271 regulator-name = "VDD_CORE"; 272 regulator-min-microvolt = <850000>; 273 regulator-max-microvolt = <850000>; 274 regulator-boot-on; 275 regulator-always-on; 276 }; 277 278 vdd_3v3: buck2 { 279 regulator-name = "VDD_3V3"; 280 regulator-min-microvolt = <3300000>; 281 regulator-max-microvolt = <3300000>; 282 regulator-boot-on; 283 regulator-always-on; 284 }; 285 286 vdd_ddr4: buck3 { 287 regulator-name = "VDD_DDR4"; 288 regulator-min-microvolt = <1200000>; 289 regulator-max-microvolt = <1200000>; 290 regulator-boot-on; 291 regulator-always-on; 292 }; 293 294 vddshv5_sdio: ldo1 { 295 regulator-name = "VDDSHV5_SDIO"; 296 regulator-min-microvolt = <3300000>; 297 regulator-max-microvolt = <3300000>; 298 regulator-allow-bypass; 299 regulator-boot-on; 300 regulator-always-on; 301 }; 302 303 vddr_core: ldo2 { 304 regulator-name = "VDDR_CORE"; 305 regulator-min-microvolt = <850000>; 306 regulator-max-microvolt = <850000>; 307 regulator-boot-on; 308 regulator-always-on; 309 }; 310 311 vdda_1v8: ldo3 { 312 regulator-name = "VDDA_1V8"; 313 regulator-min-microvolt = <1800000>; 314 regulator-max-microvolt = <1800000>; 315 regulator-boot-on; 316 regulator-always-on; 317 }; 318 319 vdd_2v5: ldo4 { 320 regulator-name = "VDD_2V5"; 321 regulator-min-microvolt = <2500000>; 322 regulator-max-microvolt = <2500000>; 323 regulator-boot-on; 324 regulator-always-on; 325 }; 326 }; 327 }; 328 329 eeprom@50 { 330 compatible = "atmel,24c32"; 331 pagesize = <32>; 332 reg = <0x50>; 333 vcc-supply = <&vddshv_3v3>; 334 }; 335 336 i2c_som_rtc: rtc@52 { 337 compatible = "microcrystal,rv3028"; 338 reg = <0x52>; 339 }; 340}; 341 342&ospi0 { 343 pinctrl-names = "default"; 344 pinctrl-0 = <&ospi0_pins_default>; 345 status = "okay"; 346 347 serial_flash: flash@0 { 348 compatible = "jedec,spi-nor"; 349 reg = <0x0>; 350 spi-tx-bus-width = <8>; 351 spi-rx-bus-width = <8>; 352 spi-max-frequency = <25000000>; 353 cdns,tshsl-ns = <60>; 354 cdns,tsd2d-ns = <60>; 355 cdns,tchsh-ns = <60>; 356 cdns,tslch-ns = <60>; 357 cdns,read-delay = <0>; 358 bootph-all; 359 }; 360}; 361 362&sdhci0 { 363 pinctrl-names = "default"; 364 pinctrl-0 = <&main_mmc0_pins_default>; 365 non-removable; 366 bootph-all; 367 status = "okay"; 368}; 369 370#include "k3-am62-ti-ipc-firmware.dtsi"
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