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rk3588s-orangepi-5.dtsi
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linux-6.19.14/arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dtsi
1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2 3/dts-v1/; 4 5#include <dt-bindings/gpio/gpio.h> 6#include <dt-bindings/leds/common.h> 7#include <dt-bindings/input/input.h> 8#include <dt-bindings/pinctrl/rockchip.h> 9#include <dt-bindings/soc/rockchip,vop2.h> 10#include <dt-bindings/usb/pd.h> 11#include "rk3588s.dtsi" 12 13/ { 14 aliases { 15 ethernet0 = &gmac1; 16 mmc0 = &sdmmc; 17 }; 18 19 chosen { 20 stdout-path = "serial2:1500000n8"; 21 }; 22 23 adc-keys { 24 compatible = "adc-keys"; 25 io-channels = <&saradc 1>; 26 io-channel-names = "buttons"; 27 keyup-threshold-microvolt = <1800000>; 28 poll-interval = <100>; 29 30 button-recovery { 31 label = "Recovery"; 32 linux,code = <KEY_VENDOR>; 33 press-threshold-microvolt = <1800>; 34 }; 35 }; 36 37 analog-sound { 38 compatible = "simple-audio-card"; 39 pinctrl-names = "default"; 40 pinctrl-0 = <&hp_detect>; 41 simple-audio-card,name = "rockchip,es8388"; 42 simple-audio-card,bitclock-master = <&masterdai>; 43 simple-audio-card,format = "i2s"; 44 simple-audio-card,frame-master = <&masterdai>; 45 simple-audio-card,hp-det-gpios = <&gpio1 RK_PD5 GPIO_ACTIVE_HIGH>; 46 simple-audio-card,mclk-fs = <256>; 47 simple-audio-card,routing = 48 "Headphones", "LOUT1", 49 "Headphones", "ROUT1", 50 "LINPUT1", "Microphone Jack", 51 "RINPUT1", "Microphone Jack", 52 "LINPUT2", "Onboard Microphone", 53 "RINPUT2", "Onboard Microphone"; 54 simple-audio-card,widgets = 55 "Microphone", "Microphone Jack", 56 "Microphone", "Onboard Microphone", 57 "Headphone", "Headphones"; 58 59 simple-audio-card,cpu { 60 sound-dai = <&i2s1_8ch>; 61 }; 62 63 masterdai: simple-audio-card,codec { 64 sound-dai = <&es8388>; 65 system-clock-frequency = <12288000>; 66 }; 67 }; 68 69 hdmi0-con { 70 compatible = "hdmi-connector"; 71 type = "a"; 72 73 port { 74 hdmi0_con_in: endpoint { 75 remote-endpoint = <&hdmi0_out_con>; 76 }; 77 }; 78 }; 79 80 pwm-leds { 81 compatible = "pwm-leds"; 82 83 led { 84 color = <LED_COLOR_ID_GREEN>; 85 function = LED_FUNCTION_STATUS; 86 linux,default-trigger = "heartbeat"; 87 max-brightness = <255>; 88 pwms = <&pwm0 0 25000 0>; 89 }; 90 }; 91 92 vbus_typec: regulator-vbus-typec { 93 compatible = "regulator-fixed"; 94 enable-active-high; 95 gpio = <&gpio3 RK_PC0 GPIO_ACTIVE_HIGH>; 96 pinctrl-names = "default"; 97 pinctrl-0 = <&typec5v_pwren>; 98 regulator-name = "vbus_typec"; 99 regulator-min-microvolt = <5000000>; 100 regulator-max-microvolt = <5000000>; 101 vin-supply = <&vcc5v0_sys>; 102 }; 103 104 vcc5v0_sys: regulator-vcc5v0-sys { 105 compatible = "regulator-fixed"; 106 regulator-name = "vcc5v0_sys"; 107 regulator-always-on; 108 regulator-boot-on; 109 regulator-min-microvolt = <5000000>; 110 regulator-max-microvolt = <5000000>; 111 }; 112 113 vcc_3v3_sd_s0: regulator-vcc-3v3-sd-s0 { 114 compatible = "regulator-fixed"; 115 gpios = <&gpio4 RK_PB5 GPIO_ACTIVE_LOW>; 116 regulator-name = "vcc_3v3_sd_s0"; 117 regulator-boot-on; 118 regulator-min-microvolt = <3300000>; 119 regulator-max-microvolt = <3300000>; 120 vin-supply = <&vcc_3v3_s3>; 121 }; 122}; 123 124&combphy0_ps { 125 status = "okay"; 126}; 127 128&combphy2_psu { 129 status = "okay"; 130}; 131 132&cpu_b0 { 133 cpu-supply = <&vdd_cpu_big0_s0>; 134}; 135 136&cpu_b1 { 137 cpu-supply = <&vdd_cpu_big0_s0>; 138}; 139 140&cpu_b2 { 141 cpu-supply = <&vdd_cpu_big1_s0>; 142}; 143 144&cpu_b3 { 145 cpu-supply = <&vdd_cpu_big1_s0>; 146}; 147 148&cpu_l0 { 149 cpu-supply = <&vdd_cpu_lit_s0>; 150}; 151 152&cpu_l1 { 153 cpu-supply = <&vdd_cpu_lit_s0>; 154}; 155 156&cpu_l2 { 157 cpu-supply = <&vdd_cpu_lit_s0>; 158}; 159 160&cpu_l3 { 161 cpu-supply = <&vdd_cpu_lit_s0>; 162}; 163 164&gmac1 { 165 clock_in_out = "output"; 166 phy-handle = <&rgmii_phy1>; 167 phy-mode = "rgmii-rxid"; 168 pinctrl-0 = <&gmac1_miim 169 &gmac1_tx_bus2 170 &gmac1_rx_bus2 171 &gmac1_rgmii_clk 172 &gmac1_rgmii_bus>; 173 pinctrl-names = "default"; 174 tx_delay = <0x42>; 175 status = "okay"; 176}; 177 178&gpu { 179 mali-supply = <&vdd_gpu_s0>; 180 status = "okay"; 181}; 182 183&hdmi0 { 184 status = "okay"; 185}; 186 187&hdmi0_in { 188 hdmi0_in_vp0: endpoint { 189 remote-endpoint = <&vp0_out_hdmi0>; 190 }; 191}; 192 193&hdmi0_out { 194 hdmi0_out_con: endpoint { 195 remote-endpoint = <&hdmi0_con_in>; 196 }; 197}; 198 199&hdmi0_sound { 200 status = "okay"; 201}; 202 203&hdptxphy0 { 204 status = "okay"; 205}; 206 207&i2c0 { 208 pinctrl-names = "default"; 209 pinctrl-0 = <&i2c0m2_xfer>; 210 status = "okay"; 211 212 vdd_cpu_big0_s0: regulator@42 { 213 compatible = "rockchip,rk8602"; 214 reg = <0x42>; 215 fcs,suspend-voltage-selector = <1>; 216 regulator-name = "vdd_cpu_big0_s0"; 217 regulator-always-on; 218 regulator-boot-on; 219 regulator-min-microvolt = <550000>; 220 regulator-max-microvolt = <1050000>; 221 regulator-ramp-delay = <2300>; 222 vin-supply = <&vcc5v0_sys>; 223 224 regulator-state-mem { 225 regulator-off-in-suspend; 226 }; 227 }; 228 229 vdd_cpu_big1_s0: regulator@43 { 230 compatible = "rockchip,rk8603", "rockchip,rk8602"; 231 reg = <0x43>; 232 fcs,suspend-voltage-selector = <1>; 233 regulator-name = "vdd_cpu_big1_s0"; 234 regulator-always-on; 235 regulator-boot-on; 236 regulator-min-microvolt = <550000>; 237 regulator-max-microvolt = <1050000>; 238 regulator-ramp-delay = <2300>; 239 vin-supply = <&vcc5v0_sys>; 240 241 regulator-state-mem { 242 regulator-off-in-suspend; 243 }; 244 }; 245}; 246 247&i2c2 { 248 status = "okay"; 249 250 vdd_npu_s0: regulator@42 { 251 compatible = "rockchip,rk8602"; 252 reg = <0x42>; 253 fcs,suspend-voltage-selector = <1>; 254 regulator-name = "vdd_npu_s0"; 255 regulator-always-on; 256 regulator-boot-on; 257 regulator-min-microvolt = <550000>; 258 regulator-max-microvolt = <950000>; 259 regulator-ramp-delay = <2300>; 260 vin-supply = <&vcc5v0_sys>; 261 262 regulator-state-mem { 263 regulator-off-in-suspend; 264 }; 265 }; 266}; 267 268&i2c6 { 269 pinctrl-names = "default"; 270 pinctrl-0 = <&i2c6m3_xfer>; 271 status = "okay"; 272 273 es8388: audio-codec@10 { 274 compatible = "everest,es8388", "everest,es8328"; 275 reg = <0x10>; 276 clocks = <&cru I2S1_8CH_MCLKOUT>; 277 AVDD-supply = <&vcc_3v3_s0>; 278 DVDD-supply = <&vcc_1v8_s0>; 279 HPVDD-supply = <&vcc_3v3_s0>; 280 PVDD-supply = <&vcc_3v3_s0>; 281 assigned-clocks = <&cru I2S1_8CH_MCLKOUT>; 282 assigned-clock-rates = <12288000>; 283 #sound-dai-cells = <0>; 284 }; 285 286 usbc0: usb-typec@22 { 287 compatible = "fcs,fusb302"; 288 reg = <0x22>; 289 interrupt-parent = <&gpio0>; 290 interrupts = <RK_PD3 IRQ_TYPE_LEVEL_LOW>; 291 pinctrl-names = "default"; 292 pinctrl-0 = <&usbc0_int>; 293 vbus-supply = <&vbus_typec>; 294 status = "okay"; 295 296 usb_con: connector { 297 compatible = "usb-c-connector"; 298 label = "USB-C"; 299 data-role = "dual"; 300 op-sink-microwatt = <1000000>; 301 power-role = "dual"; 302 sink-pdos = 303 <PDO_FIXED(5000, 1000, PDO_FIXED_USB_COMM)>; 304 source-pdos = 305 <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>; 306 try-power-role = "source"; 307 308 ports { 309 #address-cells = <1>; 310 #size-cells = <0>; 311 312 port@0 { 313 reg = <0>; 314 usbc0_hs: endpoint { 315 remote-endpoint = <&usb_host0_xhci_drd_sw>; 316 }; 317 }; 318 319 port@1 { 320 reg = <1>; 321 usbc0_ss: endpoint { 322 remote-endpoint = <&usbdp_phy0_typec_ss>; 323 }; 324 }; 325 326 port@2 { 327 reg = <2>; 328 usbc0_sbu: endpoint { 329 remote-endpoint = <&usbdp_phy0_typec_sbu>; 330 }; 331 }; 332 }; 333 }; 334 }; 335 336 hym8563: rtc@51 { 337 compatible = "haoyu,hym8563"; 338 reg = <0x51>; 339 #clock-cells = <0>; 340 clock-output-names = "hym8563"; 341 pinctrl-names = "default"; 342 pinctrl-0 = <&hym8563_int>; 343 interrupt-parent = <&gpio0>; 344 interrupts = <RK_PB0 IRQ_TYPE_LEVEL_LOW>; 345 wakeup-source; 346 }; 347}; 348 349&i2s1_8ch { 350 rockchip,i2s-tx-route = <3 2 1 0>; 351 rockchip,i2s-rx-route = <1 3 2 0>; 352 pinctrl-names = "default"; 353 pinctrl-0 = <&i2s1m0_sclk 354 &i2s1m0_mclk 355 &i2s1m0_lrck 356 &i2s1m0_sdi1 357 &i2s1m0_sdo3>; 358 status = "okay"; 359}; 360 361&i2s5_8ch { 362 status = "okay"; 363}; 364 365&mdio1 { 366 rgmii_phy1: ethernet-phy@1 { 367 compatible = "ethernet-phy-ieee802.3-c22"; 368 reg = <0x1>; 369 reset-assert-us = <20000>; 370 reset-deassert-us = <100000>; 371 reset-gpios = <&gpio3 RK_PB2 GPIO_ACTIVE_LOW>; 372 }; 373}; 374 375&pd_gpu { 376 domain-supply = <&vdd_gpu_s0>; 377}; 378 379&pd_npu { 380 domain-supply = <&vdd_npu_s0>; 381}; 382 383&pinctrl { 384 hym8563 { 385 hym8563_int: hym8563-int { 386 rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; 387 }; 388 }; 389 390 sound { 391 hp_detect: hp-detect { 392 rockchip,pins = <1 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>; 393 }; 394 }; 395 396 usb-typec { 397 usbc0_int: usbc0-int { 398 rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>; 399 }; 400 401 typec5v_pwren: typec5v-pwren { 402 rockchip,pins = <3 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>; 403 }; 404 }; 405}; 406 407&pwm0 { 408 pinctrl-0 = <&pwm0m2_pins>; 409 pinctrl-names = "default"; 410 status = "okay"; 411}; 412 413&rknn_core_0 { 414 npu-supply = <&vdd_npu_s0>; 415 sram-supply = <&vdd_npu_s0>; 416 status = "okay"; 417}; 418 419&rknn_core_1 { 420 npu-supply = <&vdd_npu_s0>; 421 sram-supply = <&vdd_npu_s0>; 422 status = "okay"; 423}; 424 425&rknn_core_2 { 426 npu-supply = <&vdd_npu_s0>; 427 sram-supply = <&vdd_npu_s0>; 428 status = "okay"; 429}; 430 431&rknn_mmu_0 { 432 status = "okay"; 433}; 434 435&rknn_mmu_1 { 436 status = "okay"; 437}; 438 439&rknn_mmu_2 { 440 status = "okay"; 441}; 442 443&saradc { 444 vref-supply = <&avcc_1v8_s0>; 445 status = "okay"; 446}; 447 448&sdhci { 449 bus-width = <8>; 450 no-sdio; 451 no-sd; 452 non-removable; 453 max-frequency = <200000000>; 454 mmc-hs400-1_8v; 455 mmc-hs400-enhanced-strobe; 456 status = "disabled"; 457}; 458 459&sdmmc { 460 bus-width = <4>; 461 cap-sd-highspeed; 462 disable-wp; 463 max-frequency = <150000000>; 464 no-mmc; 465 no-sdio; 466 sd-uhs-sdr104; 467 vmmc-supply = <&vcc_3v3_sd_s0>; 468 vqmmc-supply = <&vccio_sd_s0>; 469 status = "okay"; 470}; 471 472&sfc { 473 pinctrl-names = "default"; 474 pinctrl-0 = <&fspim0_pins>; 475 status = "disabled"; 476 477 flash@0 { 478 compatible = "jedec,spi-nor"; 479 reg = <0x0>; 480 spi-max-frequency = <100000000>; 481 spi-rx-bus-width = <4>; 482 spi-tx-bus-width = <1>; 483 }; 484}; 485 486&spi2 { 487 status = "okay"; 488 assigned-clocks = <&cru CLK_SPI2>; 489 assigned-clock-rates = <200000000>; 490 num-cs = <1>; 491 pinctrl-names = "default"; 492 pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>; 493 494 pmic@0 { 495 compatible = "rockchip,rk806"; 496 reg = <0x0>; 497 interrupt-parent = <&gpio0>; 498 interrupts = <7 IRQ_TYPE_LEVEL_LOW>; 499 pinctrl-names = "default"; 500 pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>, 501 <&rk806_dvs2_null>, <&rk806_dvs3_null>; 502 spi-max-frequency = <1000000>; 503 system-power-controller; 504 505 vcc1-supply = <&vcc5v0_sys>; 506 vcc2-supply = <&vcc5v0_sys>; 507 vcc3-supply = <&vcc5v0_sys>; 508 vcc4-supply = <&vcc5v0_sys>; 509 vcc5-supply = <&vcc5v0_sys>; 510 vcc6-supply = <&vcc5v0_sys>; 511 vcc7-supply = <&vcc5v0_sys>; 512 vcc8-supply = <&vcc5v0_sys>; 513 vcc9-supply = <&vcc5v0_sys>; 514 vcc10-supply = <&vcc5v0_sys>; 515 vcc11-supply = <&vcc_2v0_pldo_s3>; 516 vcc12-supply = <&vcc5v0_sys>; 517 vcc13-supply = <&vcc_1v1_nldo_s3>; 518 vcc14-supply = <&vcc_1v1_nldo_s3>; 519 vcca-supply = <&vcc5v0_sys>; 520 521 gpio-controller; 522 #gpio-cells = <2>; 523 524 rk806_dvs1_null: dvs1-null-pins { 525 pins = "gpio_pwrctrl1"; 526 function = "pin_fun0"; 527 }; 528 529 rk806_dvs2_null: dvs2-null-pins { 530 pins = "gpio_pwrctrl2"; 531 function = "pin_fun0"; 532 }; 533 534 rk806_dvs3_null: dvs3-null-pins { 535 pins = "gpio_pwrctrl3"; 536 function = "pin_fun0"; 537 }; 538 539 regulators { 540 vdd_gpu_s0: dcdc-reg1 { 541 regulator-name = "vdd_gpu_s0"; 542 regulator-boot-on; 543 regulator-min-microvolt = <550000>; 544 regulator-max-microvolt = <950000>; 545 regulator-ramp-delay = <12500>; 546 regulator-enable-ramp-delay = <400>; 547 548 regulator-state-mem { 549 regulator-off-in-suspend; 550 }; 551 }; 552 553 vdd_cpu_lit_s0: dcdc-reg2 { 554 regulator-name = "vdd_cpu_lit_s0"; 555 regulator-always-on; 556 regulator-boot-on; 557 regulator-min-microvolt = <550000>; 558 regulator-max-microvolt = <950000>; 559 regulator-ramp-delay = <12500>; 560 561 regulator-state-mem { 562 regulator-off-in-suspend; 563 }; 564 }; 565 566 vdd_log_s0: dcdc-reg3 { 567 regulator-name = "vdd_log_s0"; 568 regulator-always-on; 569 regulator-boot-on; 570 regulator-min-microvolt = <675000>; 571 regulator-max-microvolt = <750000>; 572 regulator-ramp-delay = <12500>; 573 574 regulator-state-mem { 575 regulator-off-in-suspend; 576 regulator-suspend-microvolt = <750000>; 577 }; 578 }; 579 580 vdd_vdenc_s0: dcdc-reg4 { 581 regulator-name = "vdd_vdenc_s0"; 582 regulator-always-on; 583 regulator-boot-on; 584 regulator-min-microvolt = <550000>; 585 regulator-max-microvolt = <950000>; 586 regulator-ramp-delay = <12500>; 587 588 regulator-state-mem { 589 regulator-off-in-suspend; 590 }; 591 }; 592 593 vdd_ddr_s0: dcdc-reg5 { 594 regulator-name = "vdd_ddr_s0"; 595 regulator-always-on; 596 regulator-boot-on; 597 regulator-min-microvolt = <675000>; 598 regulator-max-microvolt = <900000>; 599 regulator-ramp-delay = <12500>; 600 601 regulator-state-mem { 602 regulator-off-in-suspend; 603 regulator-suspend-microvolt = <850000>; 604 }; 605 }; 606 607 vcc_1v1_nldo_s3: vdd2_ddr_s3: dcdc-reg6 { 608 regulator-name = "vdd2_ddr_s3"; 609 regulator-always-on; 610 regulator-boot-on; 611 regulator-max-microvolt = <1100000>; 612 regulator-min-microvolt = <1100000>; 613 614 regulator-state-mem { 615 regulator-on-in-suspend; 616 }; 617 }; 618 619 vcc_2v0_pldo_s3: dcdc-reg7 { 620 regulator-name = "vdd_2v0_pldo_s3"; 621 regulator-always-on; 622 regulator-boot-on; 623 regulator-min-microvolt = <2000000>; 624 regulator-max-microvolt = <2000000>; 625 regulator-ramp-delay = <12500>; 626 627 regulator-state-mem { 628 regulator-on-in-suspend; 629 regulator-suspend-microvolt = <2000000>; 630 }; 631 }; 632 633 vcc_3v3_s3: dcdc-reg8 { 634 regulator-name = "vcc_3v3_s3"; 635 regulator-always-on; 636 regulator-boot-on; 637 regulator-min-microvolt = <3300000>; 638 regulator-max-microvolt = <3300000>; 639 640 regulator-state-mem { 641 regulator-on-in-suspend; 642 regulator-suspend-microvolt = <3300000>; 643 }; 644 }; 645 646 vddq_ddr_s0: dcdc-reg9 { 647 regulator-name = "vddq_ddr_s0"; 648 regulator-always-on; 649 regulator-boot-on; 650 651 regulator-state-mem { 652 regulator-off-in-suspend; 653 }; 654 }; 655 656 vcc_1v8_s3: dcdc-reg10 { 657 regulator-name = "vcc_1v8_s3"; 658 regulator-always-on; 659 regulator-boot-on; 660 regulator-min-microvolt = <1800000>; 661 regulator-max-microvolt = <1800000>; 662 663 regulator-state-mem { 664 regulator-on-in-suspend; 665 regulator-suspend-microvolt = <1800000>; 666 }; 667 }; 668 669 avcc_1v8_s0: pldo-reg1 { 670 regulator-name = "avcc_1v8_s0"; 671 regulator-always-on; 672 regulator-boot-on; 673 regulator-min-microvolt = <1800000>; 674 regulator-max-microvolt = <1800000>; 675 676 regulator-state-mem { 677 regulator-off-in-suspend; 678 }; 679 }; 680 681 vcc_1v8_s0: pldo-reg2 { 682 regulator-name = "vcc_1v8_s0"; 683 regulator-always-on; 684 regulator-boot-on; 685 regulator-min-microvolt = <1800000>; 686 regulator-max-microvolt = <1800000>; 687 688 regulator-state-mem { 689 regulator-off-in-suspend; 690 regulator-suspend-microvolt = <1800000>; 691 }; 692 }; 693 694 avdd_1v2_s0: pldo-reg3 { 695 regulator-name = "avdd_1v2_s0"; 696 regulator-always-on; 697 regulator-boot-on; 698 regulator-min-microvolt = <1200000>; 699 regulator-max-microvolt = <1200000>; 700 701 regulator-state-mem { 702 regulator-off-in-suspend; 703 }; 704 }; 705 706 vcc_3v3_s0: pldo-reg4 { 707 regulator-name = "vcc_3v3_s0"; 708 regulator-always-on; 709 regulator-boot-on; 710 regulator-min-microvolt = <3300000>; 711 regulator-max-microvolt = <3300000>; 712 regulator-ramp-delay = <12500>; 713 714 regulator-state-mem { 715 regulator-off-in-suspend; 716 }; 717 }; 718 719 vccio_sd_s0: pldo-reg5 { 720 regulator-name = "vccio_sd_s0"; 721 regulator-always-on; 722 regulator-boot-on; 723 regulator-min-microvolt = <1800000>; 724 regulator-max-microvolt = <3300000>; 725 regulator-ramp-delay = <12500>; 726 727 regulator-state-mem { 728 regulator-off-in-suspend; 729 }; 730 }; 731 732 pldo6_s3: pldo-reg6 { 733 regulator-name = "pldo6_s3"; 734 regulator-always-on; 735 regulator-boot-on; 736 regulator-min-microvolt = <1800000>; 737 regulator-max-microvolt = <1800000>; 738 739 regulator-state-mem { 740 regulator-on-in-suspend; 741 regulator-suspend-microvolt = <1800000>; 742 }; 743 }; 744 745 vdd_0v75_s3: nldo-reg1 { 746 regulator-name = "vdd_0v75_s3"; 747 regulator-always-on; 748 regulator-boot-on; 749 regulator-min-microvolt = <750000>; 750 regulator-max-microvolt = <750000>; 751 752 regulator-state-mem { 753 regulator-on-in-suspend; 754 regulator-suspend-microvolt = <750000>; 755 }; 756 }; 757 758 vdd_ddr_pll_s0: nldo-reg2 { 759 regulator-name = "vdd_ddr_pll_s0"; 760 regulator-always-on; 761 regulator-boot-on; 762 regulator-min-microvolt = <850000>; 763 regulator-max-microvolt = <850000>; 764 765 regulator-state-mem { 766 regulator-off-in-suspend; 767 regulator-suspend-microvolt = <850000>; 768 }; 769 }; 770 771 avdd_0v75_s0: nldo-reg3 { 772 regulator-name = "avdd_0v75_s0"; 773 regulator-always-on; 774 regulator-boot-on; 775 regulator-min-microvolt = <750000>; 776 regulator-max-microvolt = <750000>; 777 778 regulator-state-mem { 779 regulator-off-in-suspend; 780 }; 781 }; 782 783 vdd_0v85_s0: nldo-reg4 { 784 regulator-name = "vdd_0v85_s0"; 785 regulator-always-on; 786 regulator-boot-on; 787 regulator-min-microvolt = <850000>; 788 regulator-max-microvolt = <850000>; 789 790 regulator-state-mem { 791 regulator-off-in-suspend; 792 }; 793 }; 794 795 vdd_0v75_s0: nldo-reg5 { 796 regulator-name = "vdd_0v75_s0"; 797 regulator-always-on; 798 regulator-boot-on; 799 regulator-min-microvolt = <750000>; 800 regulator-max-microvolt = <750000>; 801 802 regulator-state-mem { 803 regulator-off-in-suspend; 804 }; 805 }; 806 }; 807 }; 808}; 809 810&tsadc { 811 status = "okay"; 812}; 813 814&u2phy0 { 815 status = "okay"; 816}; 817 818&u2phy0_otg { 819 status = "okay"; 820}; 821 822&u2phy2 { 823 status = "okay"; 824}; 825 826&u2phy2_host { 827 status = "okay"; 828}; 829 830&u2phy3 { 831 status = "okay"; 832}; 833 834&u2phy3_host { 835 status = "okay"; 836}; 837 838&uart2 { 839 pinctrl-0 = <&uart2m0_xfer>; 840 status = "okay"; 841}; 842 843&usbdp_phy0 { 844 mode-switch; 845 orientation-switch; 846 sbu1-dc-gpios = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>; 847 sbu2-dc-gpios = <&gpio4 RK_PA7 GPIO_ACTIVE_HIGH>; 848 status = "okay"; 849 850 port { 851 #address-cells = <1>; 852 #size-cells = <0>; 853 854 usbdp_phy0_typec_ss: endpoint@0 { 855 reg = <0>; 856 remote-endpoint = <&usbc0_ss>; 857 }; 858 859 usbdp_phy0_typec_sbu: endpoint@1 { 860 reg = <1>; 861 remote-endpoint = <&usbc0_sbu>; 862 }; 863 }; 864}; 865 866&usb_host0_ehci { 867 status = "okay"; 868}; 869 870&usb_host0_ohci { 871 status = "okay"; 872}; 873 874&usb_host0_xhci { 875 dr_mode = "otg"; 876 usb-role-switch; 877 status = "okay"; 878 879 port { 880 usb_host0_xhci_drd_sw: endpoint { 881 remote-endpoint = <&usbc0_hs>; 882 }; 883 }; 884}; 885 886&usb_host1_ehci { 887 status = "okay"; 888}; 889 890&usb_host1_ohci { 891 status = "okay"; 892}; 893 894&usb_host2_xhci { 895 status = "okay"; 896}; 897 898&vop_mmu { 899 status = "okay"; 900}; 901 902&vop { 903 status = "okay"; 904}; 905 906&vp0 { 907 vp0_out_hdmi0: endpoint@ROCKCHIP_VOP2_EP_HDMI0 { 908 reg = <ROCKCHIP_VOP2_EP_HDMI0>; 909 remote-endpoint = <&hdmi0_in_vp0>; 910 }; 911};
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