rk3588j.dtsi

  1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
  2/*
  3 * Copyright (c) 2022 Rockchip Electronics Co., Ltd.
  4 *
  5 */
  6
  7#include "rk3588-extra.dtsi"
  8
  9/ {
 10	cluster0_opp_table: opp-table-cluster0 {
 11		compatible = "operating-points-v2";
 12		opp-shared;
 13
 14		opp-1200000000 {
 15			opp-hz = /bits/ 64 <1200000000>;
 16			opp-microvolt = <750000 750000 950000>;
 17			clock-latency-ns = <40000>;
 18			opp-suspend;
 19		};
 20		opp-1296000000 {
 21			opp-hz = /bits/ 64 <1296000000>;
 22			opp-microvolt = <775000 775000 950000>;
 23			clock-latency-ns = <40000>;
 24		};
 25	};
 26
 27	cluster1_opp_table: opp-table-cluster1 {
 28		compatible = "operating-points-v2";
 29		opp-shared;
 30
 31		opp-1200000000 {
 32			opp-hz = /bits/ 64 <1200000000>;
 33			opp-microvolt = <750000 750000 950000>;
 34			clock-latency-ns = <40000>;
 35		};
 36		opp-1416000000 {
 37			opp-hz = /bits/ 64 <1416000000>;
 38			opp-microvolt = <762500 762500 950000>;
 39			clock-latency-ns = <40000>;
 40		};
 41		opp-1608000000 {
 42			opp-hz = /bits/ 64 <1608000000>;
 43			opp-microvolt = <787500 787500 950000>;
 44			clock-latency-ns = <40000>;
 45		};
 46	};
 47
 48	cluster2_opp_table: opp-table-cluster2 {
 49		compatible = "operating-points-v2";
 50		opp-shared;
 51
 52		opp-1200000000 {
 53			opp-hz = /bits/ 64 <1200000000>;
 54			opp-microvolt = <750000 750000 950000>;
 55			clock-latency-ns = <40000>;
 56		};
 57		opp-1416000000 {
 58			opp-hz = /bits/ 64 <1416000000>;
 59			opp-microvolt = <762500 762500 950000>;
 60			clock-latency-ns = <40000>;
 61		};
 62		opp-1608000000 {
 63			opp-hz = /bits/ 64 <1608000000>;
 64			opp-microvolt = <787500 787500 950000>;
 65			clock-latency-ns = <40000>;
 66		};
 67	};
 68
 69	gpu_opp_table: opp-table-gpu {
 70		compatible = "operating-points-v2";
 71
 72		opp-300000000 {
 73			opp-hz = /bits/ 64 <300000000>;
 74			opp-microvolt = <750000 750000 850000>;
 75		};
 76		opp-400000000 {
 77			opp-hz = /bits/ 64 <400000000>;
 78			opp-microvolt = <750000 750000 850000>;
 79		};
 80		opp-500000000 {
 81			opp-hz = /bits/ 64 <500000000>;
 82			opp-microvolt = <750000 750000 850000>;
 83		};
 84		opp-600000000 {
 85			opp-hz = /bits/ 64 <600000000>;
 86			opp-microvolt = <750000 750000 850000>;
 87		};
 88		opp-700000000 {
 89			opp-hz = /bits/ 64 <700000000>;
 90			opp-microvolt = <750000 750000 850000>;
 91		};
 92	};
 93};
 94
 95&cpu_b0 {
 96	operating-points-v2 = <&cluster1_opp_table>;
 97};
 98
 99&cpu_b1 {
100	operating-points-v2 = <&cluster1_opp_table>;
101};
102
103&cpu_b2 {
104	operating-points-v2 = <&cluster2_opp_table>;
105};
106
107&cpu_b3 {
108	operating-points-v2 = <&cluster2_opp_table>;
109};
110
111&cpu_l0 {
112	operating-points-v2 = <&cluster0_opp_table>;
113};
114
115&cpu_l1 {
116	operating-points-v2 = <&cluster0_opp_table>;
117};
118
119&cpu_l2 {
120	operating-points-v2 = <&cluster0_opp_table>;
121};
122
123&cpu_l3 {
124	operating-points-v2 = <&cluster0_opp_table>;
125};
126
127&gpu {
128	operating-points-v2 = <&gpu_opp_table>;
129};