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rk3588-rock-5b-5bp-5t.dtsi
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linux-6.19.14/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-5bp-5t.dtsi
1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2 3/dts-v1/; 4 5#include <dt-bindings/gpio/gpio.h> 6#include <dt-bindings/leds/common.h> 7#include <dt-bindings/soc/rockchip,vop2.h> 8#include <dt-bindings/usb/pd.h> 9#include "rk3588.dtsi" 10 11/ { 12 aliases { 13 mmc0 = &sdhci; 14 mmc1 = &sdmmc; 15 mmc2 = &sdio; 16 }; 17 18 chosen { 19 stdout-path = "serial2:1500000n8"; 20 }; 21 22 hdmi0-con { 23 compatible = "hdmi-connector"; 24 type = "a"; 25 26 port { 27 hdmi0_con_in: endpoint { 28 remote-endpoint = <&hdmi0_out_con>; 29 }; 30 }; 31 }; 32 33 hdmi1-con { 34 compatible = "hdmi-connector"; 35 type = "a"; 36 37 port { 38 hdmi1_con_in: endpoint { 39 remote-endpoint = <&hdmi1_out_con>; 40 }; 41 }; 42 }; 43 44 fan: pwm-fan { 45 compatible = "pwm-fan"; 46 cooling-levels = <0 120 150 180 210 240 255>; 47 fan-supply = <&vcc5v0_sys>; 48 pwms = <&pwm1 0 50000 0>; 49 #cooling-cells = <2>; 50 }; 51 52 rfkill-bt { 53 compatible = "rfkill-gpio"; 54 label = "rfkill-m2-bt"; 55 radio-type = "bluetooth"; 56 shutdown-gpios = <&gpio3 RK_PD5 GPIO_ACTIVE_HIGH>; 57 }; 58 59 vbus5v0_typec: vbus5v0-typec { 60 compatible = "regulator-fixed"; 61 enable-active-high; 62 gpio = <&gpio2 RK_PB6 GPIO_ACTIVE_HIGH>; 63 pinctrl-names = "default"; 64 pinctrl-0 = <&vbus5v0_typec_en>; 65 regulator-name = "vbus5v0_typec"; 66 regulator-min-microvolt = <5000000>; 67 regulator-max-microvolt = <5000000>; 68 vin-supply = <&vcc5v0_sys>; 69 }; 70 71 vcc3v3_pcie2x1l0: regulator-vcc3v3-pcie2x1l0 { 72 compatible = "regulator-fixed"; 73 enable-active-high; 74 regulator-name = "vcc3v3_pcie2x1l0"; 75 regulator-always-on; 76 regulator-boot-on; 77 regulator-min-microvolt = <3300000>; 78 regulator-max-microvolt = <3300000>; 79 startup-delay-us = <50000>; 80 vin-supply = <&vcc5v0_sys>; 81 status = "disabled"; 82 }; 83 84 vcc3v3_pcie2x1l2: regulator-vcc3v3-pcie2x1l2 { 85 compatible = "regulator-fixed"; 86 regulator-name = "vcc3v3_pcie2x1l2"; 87 regulator-min-microvolt = <3300000>; 88 regulator-max-microvolt = <3300000>; 89 startup-delay-us = <5000>; 90 vin-supply = <&vcc_3v3_s3>; 91 }; 92 93 vcc3v3_pcie30: regulator-vcc3v3-pcie30 { 94 compatible = "regulator-fixed"; 95 enable-active-high; 96 gpios = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>; 97 pinctrl-names = "default"; 98 pinctrl-0 = <&pcie3_vcc3v3_en>; 99 regulator-name = "vcc3v3_pcie30"; 100 regulator-min-microvolt = <3300000>; 101 regulator-max-microvolt = <3300000>; 102 startup-delay-us = <5000>; 103 vin-supply = <&vcc5v0_sys>; 104 }; 105 106 vcc5v0_host: regulator-vcc5v0-host { 107 compatible = "regulator-fixed"; 108 regulator-name = "vcc5v0_host"; 109 regulator-boot-on; 110 regulator-always-on; 111 regulator-min-microvolt = <5000000>; 112 regulator-max-microvolt = <5000000>; 113 vin-supply = <&vcc5v0_sys>; 114 }; 115 116 vcc5v0_sys: regulator-vcc5v0-sys { 117 compatible = "regulator-fixed"; 118 regulator-name = "vcc5v0_sys"; 119 regulator-always-on; 120 regulator-boot-on; 121 regulator-min-microvolt = <5000000>; 122 regulator-max-microvolt = <5000000>; 123 }; 124 125 vcc_1v1_nldo_s3: regulator-vcc-1v1-nldo-s3 { 126 compatible = "regulator-fixed"; 127 regulator-name = "vcc_1v1_nldo_s3"; 128 regulator-always-on; 129 regulator-boot-on; 130 regulator-min-microvolt = <1100000>; 131 regulator-max-microvolt = <1100000>; 132 vin-supply = <&vcc5v0_sys>; 133 }; 134}; 135 136&combphy0_ps { 137 status = "okay"; 138}; 139 140&combphy1_ps { 141 status = "okay"; 142}; 143 144&combphy2_psu { 145 status = "okay"; 146}; 147 148&cpu_b0 { 149 cpu-supply = <&vdd_cpu_big0_s0>; 150}; 151 152&cpu_b1 { 153 cpu-supply = <&vdd_cpu_big0_s0>; 154}; 155 156&cpu_b2 { 157 cpu-supply = <&vdd_cpu_big1_s0>; 158}; 159 160&cpu_b3 { 161 cpu-supply = <&vdd_cpu_big1_s0>; 162}; 163 164&cpu_l0 { 165 cpu-supply = <&vdd_cpu_lit_s0>; 166}; 167 168&cpu_l1 { 169 cpu-supply = <&vdd_cpu_lit_s0>; 170}; 171 172&cpu_l2 { 173 cpu-supply = <&vdd_cpu_lit_s0>; 174}; 175 176&cpu_l3 { 177 cpu-supply = <&vdd_cpu_lit_s0>; 178}; 179 180&gpu { 181 mali-supply = <&vdd_gpu_s0>; 182 status = "okay"; 183}; 184 185&hdmi0 { 186 status = "okay"; 187}; 188 189&hdmi0_in { 190 hdmi0_in_vp0: endpoint { 191 remote-endpoint = <&vp0_out_hdmi0>; 192 }; 193}; 194 195&hdmi0_out { 196 hdmi0_out_con: endpoint { 197 remote-endpoint = <&hdmi0_con_in>; 198 }; 199}; 200 201&hdmi0_sound { 202 status = "okay"; 203}; 204 205&hdmi1 { 206 pinctrl-0 = <&hdmim0_tx1_cec &hdmim0_tx1_hpd 207 &hdmim1_tx1_scl &hdmim1_tx1_sda>; 208 status = "okay"; 209}; 210 211&hdmi1_in { 212 hdmi1_in_vp1: endpoint { 213 remote-endpoint = <&vp1_out_hdmi1>; 214 }; 215}; 216 217&hdmi1_out { 218 hdmi1_out_con: endpoint { 219 remote-endpoint = <&hdmi1_con_in>; 220 }; 221}; 222 223&hdmi1_sound { 224 status = "okay"; 225}; 226 227&hdmi_receiver_cma { 228 status = "okay"; 229}; 230 231&hdmi_receiver { 232 pinctrl-0 = <&hdmim1_rx_cec &hdmim1_rx_hpdin &hdmim1_rx_scl &hdmim1_rx_sda &hdmirx_hpd>; 233 pinctrl-names = "default"; 234}; 235 236&hdptxphy0 { 237 status = "okay"; 238}; 239 240&hdptxphy1 { 241 status = "okay"; 242}; 243 244&i2c0 { 245 pinctrl-names = "default"; 246 pinctrl-0 = <&i2c0m2_xfer>; 247 status = "okay"; 248 249 vdd_cpu_big0_s0: regulator@42 { 250 compatible = "rockchip,rk8602"; 251 reg = <0x42>; 252 fcs,suspend-voltage-selector = <1>; 253 regulator-name = "vdd_cpu_big0_s0"; 254 regulator-always-on; 255 regulator-boot-on; 256 regulator-min-microvolt = <550000>; 257 regulator-max-microvolt = <1050000>; 258 regulator-ramp-delay = <2300>; 259 vin-supply = <&vcc5v0_sys>; 260 261 regulator-state-mem { 262 regulator-off-in-suspend; 263 }; 264 }; 265 266 vdd_cpu_big1_s0: regulator@43 { 267 compatible = "rockchip,rk8603", "rockchip,rk8602"; 268 reg = <0x43>; 269 fcs,suspend-voltage-selector = <1>; 270 regulator-name = "vdd_cpu_big1_s0"; 271 regulator-always-on; 272 regulator-boot-on; 273 regulator-min-microvolt = <550000>; 274 regulator-max-microvolt = <1050000>; 275 regulator-ramp-delay = <2300>; 276 vin-supply = <&vcc5v0_sys>; 277 278 regulator-state-mem { 279 regulator-off-in-suspend; 280 }; 281 }; 282}; 283 284&i2c1 { 285 pinctrl-names = "default"; 286 pinctrl-0 = <&i2c1m2_xfer>; 287 status = "okay"; 288 289 vdd_npu_s0: regulator@42 { 290 compatible = "rockchip,rk8602"; 291 reg = <0x42>; 292 fcs,suspend-voltage-selector = <1>; 293 regulator-name = "vdd_npu_s0"; 294 regulator-boot-on; 295 regulator-enable-ramp-delay = <500>; 296 regulator-min-microvolt = <550000>; 297 regulator-max-microvolt = <950000>; 298 regulator-ramp-delay = <2300>; 299 vin-supply = <&vcc5v0_sys>; 300 301 regulator-state-mem { 302 regulator-off-in-suspend; 303 }; 304 }; 305}; 306 307&i2c4 { 308 pinctrl-names = "default"; 309 pinctrl-0 = <&i2c4m1_xfer>; 310 status = "okay"; 311 312 usbc0: usb-typec@22 { 313 compatible = "fcs,fusb302"; 314 reg = <0x22>; 315 interrupt-parent = <&gpio3>; 316 interrupts = <RK_PB4 IRQ_TYPE_LEVEL_LOW>; 317 pinctrl-names = "default"; 318 pinctrl-0 = <&usbc0_int>; 319 vbus-supply = <&vbus5v0_typec>; 320 /* 321 * When the board is starting to send power-delivery messages 322 * too late (5 seconds according to the specification), the 323 * power-supply reacts with a hard-reset. That removes the 324 * power from VBUS for some time, which resets te whole board. 325 */ 326 status = "fail"; 327 328 usb_con: connector { 329 compatible = "usb-c-connector"; 330 label = "USB-C"; 331 data-role = "dual"; 332 /* fusb302 supports PD Rev 2.0 Ver 1.2 */ 333 pd-revision = /bits/ 8 <0x2 0x0 0x1 0x2>; 334 op-sink-microwatt = <1000000>; 335 sink-pdos = 336 <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>, 337 <PDO_VAR(5000, 20000, 5000)>; 338 source-pdos = 339 <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>; 340 341 altmodes { 342 displayport { 343 svid = /bits/ 16 <0xff01>; 344 vdo = <0xffffffff>; 345 }; 346 }; 347 348 ports { 349 #address-cells = <1>; 350 #size-cells = <0>; 351 352 port@0 { 353 reg = <0>; 354 usbc0_hs: endpoint { 355 remote-endpoint = <&usb_host0_xhci_to_usbc0>; 356 }; 357 }; 358 359 port@1 { 360 reg = <1>; 361 usbc0_ss: endpoint { 362 remote-endpoint = <&usbdp_phy0_ss>; 363 }; 364 }; 365 366 port@2 { 367 reg = <2>; 368 usbc0_sbu: endpoint { 369 remote-endpoint = <&usbdp_phy0_sbu>; 370 }; 371 }; 372 }; 373 }; 374 }; 375}; 376 377&i2c6 { 378 status = "okay"; 379 380 hym8563: rtc@51 { 381 compatible = "haoyu,hym8563"; 382 reg = <0x51>; 383 #clock-cells = <0>; 384 clock-output-names = "hym8563"; 385 pinctrl-names = "default"; 386 pinctrl-0 = <&hym8563_int>; 387 interrupt-parent = <&gpio0>; 388 interrupts = <RK_PB0 IRQ_TYPE_LEVEL_LOW>; 389 wakeup-source; 390 }; 391}; 392 393&i2c7 { 394 status = "okay"; 395 396 es8316: audio-codec@11 { 397 compatible = "everest,es8316"; 398 reg = <0x11>; 399 clocks = <&cru I2S0_8CH_MCLKOUT>; 400 clock-names = "mclk"; 401 assigned-clocks = <&cru I2S0_8CH_MCLKOUT>; 402 assigned-clock-rates = <12288000>; 403 #sound-dai-cells = <0>; 404 405 port { 406 es8316_p0_0: endpoint { 407 remote-endpoint = <&i2s0_8ch_p0_0>; 408 }; 409 }; 410 }; 411}; 412 413&i2s0_8ch { 414 pinctrl-names = "default"; 415 pinctrl-0 = <&i2s0_lrck 416 &i2s0_mclk 417 &i2s0_sclk 418 &i2s0_sdi0 419 &i2s0_sdo0>; 420 status = "okay"; 421 422 i2s0_8ch_p0: port { 423 i2s0_8ch_p0_0: endpoint { 424 dai-format = "i2s"; 425 mclk-fs = <256>; 426 remote-endpoint = <&es8316_p0_0>; 427 }; 428 }; 429}; 430 431&i2s5_8ch { 432 status = "okay"; 433}; 434 435&i2s6_8ch { 436 status = "okay"; 437}; 438 439&package_thermal { 440 polling-delay = <1000>; 441 442 trips { 443 package_fan0: package-fan0 { 444 temperature = <55000>; 445 hysteresis = <2000>; 446 type = "active"; 447 }; 448 449 package_fan1: package-fan1 { 450 temperature = <65000>; 451 hysteresis = <2000>; 452 type = "active"; 453 }; 454 }; 455 456 cooling-maps { 457 map0 { 458 trip = <&package_fan0>; 459 cooling-device = <&fan THERMAL_NO_LIMIT 1>; 460 }; 461 462 map1 { 463 trip = <&package_fan1>; 464 cooling-device = <&fan 2 THERMAL_NO_LIMIT>; 465 }; 466 }; 467}; 468 469&pcie2x1l0 { 470 pinctrl-names = "default"; 471 pinctrl-0 = <&pcie2_0_rst>; 472 reset-gpios = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>; 473 vpcie3v3-supply = <&vcc3v3_pcie2x1l0>; 474 status = "okay"; 475}; 476 477&pcie2x1l2 { 478 pinctrl-names = "default"; 479 pinctrl-0 = <&pcie2_2_rst>; 480 reset-gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_HIGH>; 481 vpcie3v3-supply = <&vcc3v3_pcie2x1l2>; 482 status = "okay"; 483}; 484 485&pcie30phy { 486 status = "okay"; 487}; 488 489&pcie3x4 { 490 pinctrl-names = "default"; 491 pinctrl-0 = <&pcie3_rst>; 492 reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>; 493 vpcie3v3-supply = <&vcc3v3_pcie30>; 494 status = "okay"; 495}; 496 497&pd_gpu { 498 domain-supply = <&vdd_gpu_s0>; 499}; 500 501&pd_npu { 502 domain-supply = <&vdd_npu_s0>; 503}; 504 505&pinctrl { 506 hym8563 { 507 hym8563_int: hym8563-int { 508 rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; 509 }; 510 }; 511 512 mmc { 513 sdmmc_det_pin: sdmmc-det-pin { 514 rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; 515 }; 516 }; 517 518 pcie2 { 519 pcie2_0_rst: pcie2-0-rst { 520 rockchip,pins = <4 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; 521 }; 522 523 pcie2_2_rst: pcie2-2-rst { 524 rockchip,pins = <3 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; 525 }; 526 }; 527 528 pcie3 { 529 pcie3_rst: pcie3-rst { 530 rockchip,pins = <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>; 531 }; 532 533 pcie3_vcc3v3_en: pcie3-vcc3v3-en { 534 rockchip,pins = <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; 535 }; 536 }; 537 538 usb { 539 usbc0_int: usbc0-int { 540 rockchip,pins = <3 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>; 541 }; 542 543 vbus5v0_typec_en: vbus5v0-typec-en { 544 rockchip,pins = <2 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>; 545 }; 546 }; 547}; 548 549&pwm1 { 550 status = "okay"; 551}; 552 553&rknn_core_0 { 554 npu-supply = <&vdd_npu_s0>; 555 sram-supply = <&vdd_npu_s0>; 556 status = "okay"; 557}; 558 559&rknn_core_1 { 560 npu-supply = <&vdd_npu_s0>; 561 sram-supply = <&vdd_npu_s0>; 562 status = "okay"; 563}; 564 565&rknn_core_2 { 566 npu-supply = <&vdd_npu_s0>; 567 sram-supply = <&vdd_npu_s0>; 568 status = "okay"; 569}; 570 571&rknn_mmu_0 { 572 status = "okay"; 573}; 574 575&rknn_mmu_1 { 576 status = "okay"; 577}; 578 579&rknn_mmu_2 { 580 status = "okay"; 581}; 582 583&saradc { 584 vref-supply = <&avcc_1v8_s0>; 585 status = "okay"; 586}; 587 588&sdhci { 589 bus-width = <8>; 590 no-sdio; 591 no-sd; 592 non-removable; 593 mmc-hs400-1_8v; 594 mmc-hs400-enhanced-strobe; 595 status = "okay"; 596}; 597 598&sdmmc { 599 no-sdio; 600 no-mmc; 601 bus-width = <4>; 602 cap-mmc-highspeed; 603 cap-sd-highspeed; 604 cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>; 605 disable-wp; 606 pinctrl-names = "default"; 607 pinctrl-0 = <&sdmmc_bus4 &sdmmc_clk &sdmmc_cmd &sdmmc_det_pin>; 608 sd-uhs-sdr104; 609 vmmc-supply = <&vcc_3v3_s3>; 610 vqmmc-supply = <&vccio_sd_s0>; 611 status = "okay"; 612}; 613 614&sfc { 615 pinctrl-names = "default"; 616 pinctrl-0 = <&fspim2_pins>; 617 status = "okay"; 618 619 flash@0 { 620 compatible = "jedec,spi-nor"; 621 reg = <0>; 622 spi-max-frequency = <104000000>; 623 spi-rx-bus-width = <4>; 624 spi-tx-bus-width = <1>; 625 vcc-supply = <&vcc_3v3_s3>; 626 }; 627}; 628 629&spi2 { 630 status = "okay"; 631 assigned-clocks = <&cru CLK_SPI2>; 632 assigned-clock-rates = <200000000>; 633 pinctrl-names = "default"; 634 pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>; 635 num-cs = <1>; 636 637 pmic@0 { 638 compatible = "rockchip,rk806"; 639 spi-max-frequency = <1000000>; 640 reg = <0x0>; 641 642 interrupt-parent = <&gpio0>; 643 interrupts = <7 IRQ_TYPE_LEVEL_LOW>; 644 645 pinctrl-names = "default"; 646 pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>, 647 <&rk806_dvs2_null>, <&rk806_dvs3_null>; 648 649 system-power-controller; 650 651 vcc1-supply = <&vcc5v0_sys>; 652 vcc2-supply = <&vcc5v0_sys>; 653 vcc3-supply = <&vcc5v0_sys>; 654 vcc4-supply = <&vcc5v0_sys>; 655 vcc5-supply = <&vcc5v0_sys>; 656 vcc6-supply = <&vcc5v0_sys>; 657 vcc7-supply = <&vcc5v0_sys>; 658 vcc8-supply = <&vcc5v0_sys>; 659 vcc9-supply = <&vcc5v0_sys>; 660 vcc10-supply = <&vcc5v0_sys>; 661 vcc11-supply = <&vcc_2v0_pldo_s3>; 662 vcc12-supply = <&vcc5v0_sys>; 663 vcc13-supply = <&vcc_1v1_nldo_s3>; 664 vcc14-supply = <&vcc_1v1_nldo_s3>; 665 vcca-supply = <&vcc5v0_sys>; 666 667 gpio-controller; 668 #gpio-cells = <2>; 669 670 rk806_dvs1_null: dvs1-null-pins { 671 pins = "gpio_pwrctrl1"; 672 function = "pin_fun0"; 673 }; 674 675 rk806_dvs2_null: dvs2-null-pins { 676 pins = "gpio_pwrctrl2"; 677 function = "pin_fun0"; 678 }; 679 680 rk806_dvs3_null: dvs3-null-pins { 681 pins = "gpio_pwrctrl3"; 682 function = "pin_fun0"; 683 }; 684 685 regulators { 686 vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 { 687 regulator-boot-on; 688 regulator-min-microvolt = <550000>; 689 regulator-max-microvolt = <950000>; 690 regulator-ramp-delay = <12500>; 691 regulator-name = "vdd_gpu_s0"; 692 regulator-enable-ramp-delay = <400>; 693 694 regulator-state-mem { 695 regulator-off-in-suspend; 696 }; 697 }; 698 699 vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 { 700 regulator-always-on; 701 regulator-boot-on; 702 regulator-min-microvolt = <550000>; 703 regulator-max-microvolt = <950000>; 704 regulator-ramp-delay = <12500>; 705 regulator-name = "vdd_cpu_lit_s0"; 706 707 regulator-state-mem { 708 regulator-off-in-suspend; 709 }; 710 }; 711 712 vdd_log_s0: dcdc-reg3 { 713 regulator-always-on; 714 regulator-boot-on; 715 regulator-min-microvolt = <675000>; 716 regulator-max-microvolt = <750000>; 717 regulator-ramp-delay = <12500>; 718 regulator-name = "vdd_log_s0"; 719 720 regulator-state-mem { 721 regulator-off-in-suspend; 722 regulator-suspend-microvolt = <750000>; 723 }; 724 }; 725 726 vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 { 727 regulator-always-on; 728 regulator-boot-on; 729 regulator-min-microvolt = <550000>; 730 regulator-max-microvolt = <950000>; 731 regulator-ramp-delay = <12500>; 732 regulator-name = "vdd_vdenc_s0"; 733 734 regulator-state-mem { 735 regulator-off-in-suspend; 736 }; 737 }; 738 739 vdd_ddr_s0: dcdc-reg5 { 740 regulator-always-on; 741 regulator-boot-on; 742 regulator-min-microvolt = <675000>; 743 regulator-max-microvolt = <900000>; 744 regulator-ramp-delay = <12500>; 745 regulator-name = "vdd_ddr_s0"; 746 747 regulator-state-mem { 748 regulator-off-in-suspend; 749 regulator-suspend-microvolt = <850000>; 750 }; 751 }; 752 753 vdd2_ddr_s3: dcdc-reg6 { 754 regulator-always-on; 755 regulator-boot-on; 756 regulator-name = "vdd2_ddr_s3"; 757 758 regulator-state-mem { 759 regulator-on-in-suspend; 760 }; 761 }; 762 763 vcc_2v0_pldo_s3: dcdc-reg7 { 764 regulator-always-on; 765 regulator-boot-on; 766 regulator-min-microvolt = <2000000>; 767 regulator-max-microvolt = <2000000>; 768 regulator-ramp-delay = <12500>; 769 regulator-name = "vdd_2v0_pldo_s3"; 770 771 regulator-state-mem { 772 regulator-on-in-suspend; 773 regulator-suspend-microvolt = <2000000>; 774 }; 775 }; 776 777 vcc_3v3_s3: dcdc-reg8 { 778 regulator-always-on; 779 regulator-boot-on; 780 regulator-min-microvolt = <3300000>; 781 regulator-max-microvolt = <3300000>; 782 regulator-name = "vcc_3v3_s3"; 783 784 regulator-state-mem { 785 regulator-on-in-suspend; 786 regulator-suspend-microvolt = <3300000>; 787 }; 788 }; 789 790 vddq_ddr_s0: dcdc-reg9 { 791 regulator-always-on; 792 regulator-boot-on; 793 regulator-name = "vddq_ddr_s0"; 794 795 regulator-state-mem { 796 regulator-off-in-suspend; 797 }; 798 }; 799 800 vcc_1v8_s3: dcdc-reg10 { 801 regulator-always-on; 802 regulator-boot-on; 803 regulator-min-microvolt = <1800000>; 804 regulator-max-microvolt = <1800000>; 805 regulator-name = "vcc_1v8_s3"; 806 807 regulator-state-mem { 808 regulator-on-in-suspend; 809 regulator-suspend-microvolt = <1800000>; 810 }; 811 }; 812 813 avcc_1v8_s0: pldo-reg1 { 814 regulator-always-on; 815 regulator-boot-on; 816 regulator-min-microvolt = <1800000>; 817 regulator-max-microvolt = <1800000>; 818 regulator-name = "avcc_1v8_s0"; 819 820 regulator-state-mem { 821 regulator-off-in-suspend; 822 }; 823 }; 824 825 vcc_1v8_s0: pldo-reg2 { 826 regulator-always-on; 827 regulator-boot-on; 828 regulator-min-microvolt = <1800000>; 829 regulator-max-microvolt = <1800000>; 830 regulator-name = "vcc_1v8_s0"; 831 832 regulator-state-mem { 833 regulator-off-in-suspend; 834 regulator-suspend-microvolt = <1800000>; 835 }; 836 }; 837 838 avdd_1v2_s0: pldo-reg3 { 839 regulator-always-on; 840 regulator-boot-on; 841 regulator-min-microvolt = <1200000>; 842 regulator-max-microvolt = <1200000>; 843 regulator-name = "avdd_1v2_s0"; 844 845 regulator-state-mem { 846 regulator-off-in-suspend; 847 }; 848 }; 849 850 vcc_3v3_s0: pldo-reg4 { 851 regulator-always-on; 852 regulator-boot-on; 853 regulator-min-microvolt = <3300000>; 854 regulator-max-microvolt = <3300000>; 855 regulator-ramp-delay = <12500>; 856 regulator-name = "vcc_3v3_s0"; 857 858 regulator-state-mem { 859 regulator-off-in-suspend; 860 }; 861 }; 862 863 vccio_sd_s0: pldo-reg5 { 864 regulator-always-on; 865 regulator-boot-on; 866 regulator-min-microvolt = <1800000>; 867 regulator-max-microvolt = <3300000>; 868 regulator-ramp-delay = <12500>; 869 regulator-name = "vccio_sd_s0"; 870 871 regulator-state-mem { 872 regulator-off-in-suspend; 873 }; 874 }; 875 876 pldo6_s3: pldo-reg6 { 877 regulator-always-on; 878 regulator-boot-on; 879 regulator-min-microvolt = <1800000>; 880 regulator-max-microvolt = <1800000>; 881 regulator-name = "pldo6_s3"; 882 883 regulator-state-mem { 884 regulator-on-in-suspend; 885 regulator-suspend-microvolt = <1800000>; 886 }; 887 }; 888 889 vdd_0v75_s3: nldo-reg1 { 890 regulator-always-on; 891 regulator-boot-on; 892 regulator-min-microvolt = <750000>; 893 regulator-max-microvolt = <750000>; 894 regulator-name = "vdd_0v75_s3"; 895 896 regulator-state-mem { 897 regulator-on-in-suspend; 898 regulator-suspend-microvolt = <750000>; 899 }; 900 }; 901 902 vdd_ddr_pll_s0: nldo-reg2 { 903 regulator-always-on; 904 regulator-boot-on; 905 regulator-min-microvolt = <850000>; 906 regulator-max-microvolt = <850000>; 907 regulator-name = "vdd_ddr_pll_s0"; 908 909 regulator-state-mem { 910 regulator-off-in-suspend; 911 regulator-suspend-microvolt = <850000>; 912 }; 913 }; 914 915 avdd_0v75_s0: nldo-reg3 { 916 regulator-always-on; 917 regulator-boot-on; 918 regulator-min-microvolt = <750000>; 919 regulator-max-microvolt = <750000>; 920 regulator-name = "avdd_0v75_s0"; 921 922 regulator-state-mem { 923 regulator-off-in-suspend; 924 }; 925 }; 926 927 vdd_0v85_s0: nldo-reg4 { 928 regulator-always-on; 929 regulator-boot-on; 930 regulator-min-microvolt = <850000>; 931 regulator-max-microvolt = <850000>; 932 regulator-name = "vdd_0v85_s0"; 933 934 regulator-state-mem { 935 regulator-off-in-suspend; 936 }; 937 }; 938 939 vdd_0v75_s0: nldo-reg5 { 940 regulator-always-on; 941 regulator-boot-on; 942 regulator-min-microvolt = <750000>; 943 regulator-max-microvolt = <750000>; 944 regulator-name = "vdd_0v75_s0"; 945 946 regulator-state-mem { 947 regulator-off-in-suspend; 948 }; 949 }; 950 }; 951 }; 952}; 953 954&tsadc { 955 status = "okay"; 956}; 957 958&uart2 { 959 pinctrl-0 = <&uart2m0_xfer>; 960 status = "okay"; 961}; 962 963&u2phy0 { 964 status = "okay"; 965}; 966 967&u2phy0_otg { 968 status = "okay"; 969}; 970 971&u2phy1 { 972 status = "okay"; 973}; 974 975&u2phy1_otg { 976 status = "okay"; 977}; 978 979&u2phy2 { 980 status = "okay"; 981}; 982 983&u2phy2_host { 984 /* connected to USB hub, which is powered by vcc5v0_sys */ 985 phy-supply = <&vcc5v0_sys>; 986 status = "okay"; 987}; 988 989&u2phy3 { 990 status = "okay"; 991}; 992 993&u2phy3_host { 994 phy-supply = <&vcc5v0_host>; 995 status = "okay"; 996}; 997 998&usbdp_phy0 { 999 mode-switch; 1000 orientation-switch; 1001 status = "okay"; 1002 1003 port { 1004 #address-cells = <1>; 1005 #size-cells = <0>; 1006 1007 usbdp_phy0_ss: endpoint@0 { 1008 reg = <0>; 1009 remote-endpoint = <&usbc0_ss>; 1010 }; 1011 1012 usbdp_phy0_sbu: endpoint@1 { 1013 reg = <1>; 1014 remote-endpoint = <&usbc0_sbu>; 1015 }; 1016 }; 1017}; 1018 1019&usbdp_phy1 { 1020 status = "okay"; 1021}; 1022 1023&usb_host0_ehci { 1024 status = "okay"; 1025}; 1026 1027&usb_host0_ohci { 1028 status = "okay"; 1029}; 1030 1031&usb_host0_xhci { 1032 usb-role-switch; 1033 status = "okay"; 1034 1035 port { 1036 usb_host0_xhci_to_usbc0: endpoint { 1037 remote-endpoint = <&usbc0_hs>; 1038 }; 1039 }; 1040}; 1041 1042&usb_host1_ehci { 1043 status = "okay"; 1044}; 1045 1046&usb_host1_ohci { 1047 status = "okay"; 1048}; 1049 1050&usb_host1_xhci { 1051 dr_mode = "host"; 1052 status = "okay"; 1053}; 1054 1055&vop { 1056 status = "okay"; 1057}; 1058 1059&vop_mmu { 1060 status = "okay"; 1061}; 1062 1063&vp0 { 1064 vp0_out_hdmi0: endpoint@ROCKCHIP_VOP2_EP_HDMI0 { 1065 reg = <ROCKCHIP_VOP2_EP_HDMI0>; 1066 remote-endpoint = <&hdmi0_in_vp0>; 1067 }; 1068}; 1069 1070&vp1 { 1071 vp1_out_hdmi1: endpoint@ROCKCHIP_VOP2_EP_HDMI1 { 1072 reg = <ROCKCHIP_VOP2_EP_HDMI1>; 1073 remote-endpoint = <&hdmi1_in_vp1>; 1074 }; 1075};
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