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rk3588-nanopc-t6.dtsi
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linux-6.19.14/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi
1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2021 Rockchip Electronics Co., Ltd. 4 * Copyright (c) 2023 Thomas McKahan 5 * 6 */ 7 8/dts-v1/; 9 10#include <dt-bindings/gpio/gpio.h> 11#include <dt-bindings/input/input.h> 12#include <dt-bindings/pinctrl/rockchip.h> 13#include <dt-bindings/soc/rockchip,vop2.h> 14#include <dt-bindings/usb/pd.h> 15#include "rk3588.dtsi" 16 17/ { 18 model = "FriendlyElec NanoPC-T6"; 19 compatible = "friendlyarm,nanopc-t6", "rockchip,rk3588"; 20 21 aliases { 22 mmc0 = &sdhci; 23 mmc1 = &sdmmc; 24 }; 25 26 adc-keys-0 { 27 compatible = "adc-keys"; 28 io-channels = <&saradc 0>; 29 io-channel-names = "buttons"; 30 keyup-threshold-microvolt = <1800000>; 31 poll-interval = <100>; 32 33 button-maskrom { 34 label = "Mask Rom"; 35 linux,code = <KEY_SETUP>; 36 press-threshold-microvolt = <2000>; 37 }; 38 }; 39 40 chosen { 41 stdout-path = "serial2:1500000n8"; 42 }; 43 44 hdmi0-con { 45 compatible = "hdmi-connector"; 46 type = "a"; 47 48 port { 49 hdmi0_con_in: endpoint { 50 remote-endpoint = <&hdmi0_out_con>; 51 }; 52 }; 53 }; 54 55 hdmi1-con { 56 compatible = "hdmi-connector"; 57 type = "a"; 58 59 port { 60 hdmi1_con_in: endpoint { 61 remote-endpoint = <&hdmi1_out_con>; 62 }; 63 }; 64 }; 65 66 ir-receiver { 67 compatible = "gpio-ir-receiver"; 68 gpios = <&gpio0 RK_PD4 GPIO_ACTIVE_LOW>; 69 pinctrl-names = "default"; 70 pinctrl-0 = <&ir_receiver_pin>; 71 }; 72 73 leds { 74 compatible = "gpio-leds"; 75 76 sys_led: led-0 { 77 gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>; 78 label = "system-led"; 79 linux,default-trigger = "heartbeat"; 80 pinctrl-names = "default"; 81 pinctrl-0 = <&sys_led_pin>; 82 }; 83 84 usr_led: led-1 { 85 gpios = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>; 86 label = "user-led"; 87 pinctrl-names = "default"; 88 pinctrl-0 = <&usr_led_pin>; 89 }; 90 }; 91 92 sound { 93 compatible = "simple-audio-card"; 94 pinctrl-names = "default"; 95 pinctrl-0 = <&hp_det>; 96 97 simple-audio-card,name = "realtek,rt5616-codec"; 98 simple-audio-card,format = "i2s"; 99 simple-audio-card,mclk-fs = <256>; 100 101 simple-audio-card,hp-det-gpios = <&gpio1 RK_PC4 GPIO_ACTIVE_LOW>; 102 103 simple-audio-card,widgets = 104 "Headphone", "Headphones", 105 "Microphone", "Microphone Jack"; 106 simple-audio-card,routing = 107 "Headphones", "HPOL", 108 "Headphones", "HPOR", 109 "MIC1", "Microphone Jack", 110 "Microphone Jack", "micbias1"; 111 112 simple-audio-card,cpu { 113 sound-dai = <&i2s0_8ch>; 114 }; 115 simple-audio-card,codec { 116 sound-dai = <&rt5616>; 117 }; 118 }; 119 120 vcc12v_dcin: regulator-vcc12v-dcin { 121 compatible = "regulator-fixed"; 122 regulator-name = "vcc12v_dcin"; 123 regulator-always-on; 124 regulator-boot-on; 125 regulator-min-microvolt = <12000000>; 126 regulator-max-microvolt = <12000000>; 127 }; 128 129 /* vcc5v0_sys powers peripherals */ 130 vcc5v0_sys: regulator-vcc5v0-sys { 131 compatible = "regulator-fixed"; 132 regulator-name = "vcc5v0_sys"; 133 regulator-always-on; 134 regulator-boot-on; 135 regulator-min-microvolt = <5000000>; 136 regulator-max-microvolt = <5000000>; 137 vin-supply = <&vcc12v_dcin>; 138 }; 139 140 /* vcc4v0_sys powers the RK806, RK860's */ 141 vcc4v0_sys: regulator-vcc4v0-sys { 142 compatible = "regulator-fixed"; 143 regulator-name = "vcc4v0_sys"; 144 regulator-always-on; 145 regulator-boot-on; 146 regulator-min-microvolt = <4000000>; 147 regulator-max-microvolt = <4000000>; 148 vin-supply = <&vcc12v_dcin>; 149 }; 150 151 vcc_1v1_nldo_s3: regulator-vcc-1v1-nldo-s3 { 152 compatible = "regulator-fixed"; 153 regulator-name = "vcc-1v1-nldo-s3"; 154 regulator-always-on; 155 regulator-boot-on; 156 regulator-min-microvolt = <1100000>; 157 regulator-max-microvolt = <1100000>; 158 vin-supply = <&vcc4v0_sys>; 159 }; 160 161 vcc_3v3_pcie20: regulator-vcc3v3-pcie20 { 162 compatible = "regulator-fixed"; 163 regulator-name = "vcc_3v3_pcie20"; 164 regulator-always-on; 165 regulator-boot-on; 166 regulator-min-microvolt = <3300000>; 167 regulator-max-microvolt = <3300000>; 168 vin-supply = <&vcc_3v3_s3>; 169 }; 170 171 vbus5v0_typec: regulator-vbus5v0-typec { 172 compatible = "regulator-fixed"; 173 enable-active-high; 174 gpio = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>; 175 pinctrl-names = "default"; 176 pinctrl-0 = <&typec5v_pwren>; 177 regulator-name = "vbus5v0_typec"; 178 regulator-min-microvolt = <5000000>; 179 regulator-max-microvolt = <5000000>; 180 vin-supply = <&vcc5v0_sys>; 181 }; 182 183 vbus5v0_usb: regulator-vbus5v0-usb { 184 compatible = "regulator-fixed"; 185 enable-active-high; 186 gpio = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>; 187 pinctrl-names = "default"; 188 pinctrl-0 = <&usb5v_pwren>; 189 regulator-name = "vbus5v0_usb"; 190 regulator-min-microvolt = <5000000>; 191 regulator-max-microvolt = <5000000>; 192 vin-supply = <&vcc5v0_sys>; 193 }; 194 195 vcc3v3_pcie2x1l0: regulator-vcc3v3-pcie2x1l0 { 196 compatible = "regulator-fixed"; 197 enable-active-high; 198 gpio = <&gpio4 RK_PC2 GPIO_ACTIVE_HIGH>; 199 pinctrl-names = "default"; 200 pinctrl-0 = <&pcie_m2_1_pwren>; 201 regulator-name = "vcc3v3_pcie2x1l0"; 202 regulator-min-microvolt = <3300000>; 203 regulator-max-microvolt = <3300000>; 204 vin-supply = <&vcc5v0_sys>; 205 }; 206 207 vcc3v3_pcie30: regulator-vcc3v3-pcie30 { 208 compatible = "regulator-fixed"; 209 enable-active-high; 210 gpios = <&gpio2 RK_PC5 GPIO_ACTIVE_HIGH>; 211 pinctrl-names = "default"; 212 pinctrl-0 = <&pcie_m2_0_pwren>; 213 regulator-name = "vcc3v3_pcie30"; 214 regulator-min-microvolt = <3300000>; 215 regulator-max-microvolt = <3300000>; 216 vin-supply = <&vcc5v0_sys>; 217 }; 218 219 vcc3v3_sd_s0: regulator-vcc3v3-sd-s0 { 220 compatible = "regulator-fixed"; 221 gpio = <&gpio4 RK_PA5 GPIO_ACTIVE_LOW>; 222 regulator-boot-on; 223 regulator-max-microvolt = <3300000>; 224 regulator-min-microvolt = <3300000>; 225 regulator-name = "vcc3v3_sd_s0"; 226 vin-supply = <&vcc_3v3_s3>; 227 }; 228}; 229 230&combphy0_ps { 231 status = "okay"; 232}; 233 234&combphy1_ps { 235 status = "okay"; 236}; 237 238&combphy2_psu { 239 status = "okay"; 240}; 241 242&cpu_l0 { 243 cpu-supply = <&vdd_cpu_lit_s0>; 244}; 245 246&cpu_l1 { 247 cpu-supply = <&vdd_cpu_lit_s0>; 248}; 249 250&cpu_l2 { 251 cpu-supply = <&vdd_cpu_lit_s0>; 252}; 253 254&cpu_l3 { 255 cpu-supply = <&vdd_cpu_lit_s0>; 256}; 257 258&cpu_b0 { 259 cpu-supply = <&vdd_cpu_big0_s0>; 260}; 261 262&cpu_b1 { 263 cpu-supply = <&vdd_cpu_big0_s0>; 264}; 265 266&cpu_b2 { 267 cpu-supply = <&vdd_cpu_big1_s0>; 268}; 269 270&cpu_b3 { 271 cpu-supply = <&vdd_cpu_big1_s0>; 272}; 273 274&gpio0 { 275 gpio-line-names = /* GPIO0 A0-A7 */ 276 "", "", "", "", 277 "", "", "", "", 278 /* GPIO0 B0-B7 */ 279 "", "", "", "", 280 "", "", "", "", 281 /* GPIO0 C0-C7 */ 282 "", "", "", "", 283 "HEADER_10", "HEADER_08", "HEADER_32", "", 284 /* GPIO0 D0-D7 */ 285 "", "", "", "", 286 "IR receiver [PWM3_IR_M0]", "", "", ""; 287}; 288 289&gpio1 { 290 gpio-line-names = /* GPIO1 A0-A7 */ 291 "HEADER_27", "HEADER_28", "", "", 292 "", "", "", "HEADER_15", 293 /* GPIO1 B0-B7 */ 294 "HEADER_26", "HEADER_21", "HEADER_19", "HEADER_23", 295 "HEADER_24", "HEADER_22", "", "", 296 /* GPIO1 C0-C7 */ 297 "", "", "", "", 298 "", "", "", "", 299 /* GPIO1 D0-D7 */ 300 "", "", "", "", 301 "", "", "HEADER_05", "HEADER_03"; 302}; 303 304&gpio2 { 305 gpio-line-names = /* GPIO2 A0-A7 */ 306 "", "", "", "", 307 "", "", "", "", 308 /* GPIO2 B0-B7 */ 309 "", "", "", "", 310 "", "", "", "", 311 /* GPIO2 C0-C7 */ 312 "", "CSI1_11", "CSI1_12", "", 313 "", "", "", "", 314 /* GPIO2 D0-D7 */ 315 "", "", "", "", 316 "", "", "", ""; 317}; 318 319&gpio3 { 320 gpio-line-names = /* GPIO3 A0-A7 */ 321 "HEADER_35", "HEADER_38", "HEADER_40", "HEADER_36", 322 "HEADER_37", "", "DSI0_12", "", 323 /* GPIO3 B0-B7 */ 324 "HEADER_33", "DSI0_10", "HEADER_07", "HEADER_16", 325 "HEADER_18", "HEADER_29", "HEADER_31", "HEADER_12", 326 /* GPIO3 C0-C7 */ 327 "DSI0_08", "DSI0_14", "HEADER_11", "HEADER_13", 328 "", "", "", "", 329 /* GPIO3 D0-D7 */ 330 "", "", "", "", 331 "", "DSI1_10", "", ""; 332}; 333 334&gpio4 { 335 gpio-line-names = /* GPIO4 A0-A7 */ 336 "DSI1_08", "DSI1_14", "", "DSI1_12", 337 "", "", "", "", 338 /* GPIO4 B0-B7 */ 339 "", "", "", "", 340 "", "", "", "", 341 /* GPIO4 C0-C7 */ 342 "", "", "", "", 343 "CSI0_11", "CSI0_12", "", "", 344 /* GPIO4 D0-D7 */ 345 "", "", "", "", 346 "", "", "", ""; 347}; 348 349&gpu { 350 mali-supply = <&vdd_gpu_s0>; 351 status = "okay"; 352}; 353 354&hdmi0 { 355 status = "okay"; 356}; 357 358&hdmi0_in { 359 hdmi0_in_vp0: endpoint { 360 remote-endpoint = <&vp0_out_hdmi0>; 361 }; 362}; 363 364&hdmi0_out { 365 hdmi0_out_con: endpoint { 366 remote-endpoint = <&hdmi0_con_in>; 367 }; 368}; 369 370&hdmi0_sound { 371 status = "okay"; 372}; 373 374&hdmi1 { 375 status = "okay"; 376}; 377 378&hdmi1_in { 379 hdmi1_in_vp1: endpoint { 380 remote-endpoint = <&vp1_out_hdmi1>; 381 }; 382}; 383 384&hdmi1_out { 385 hdmi1_out_con: endpoint { 386 remote-endpoint = <&hdmi1_con_in>; 387 }; 388}; 389 390&hdmi1_sound { 391 status = "okay"; 392}; 393 394&hdmi_receiver_cma { 395 status = "okay"; 396}; 397 398&hdmi_receiver { 399 hpd-gpios = <&gpio1 RK_PD5 GPIO_ACTIVE_LOW>; 400 pinctrl-0 = <&hdmim1_rx_cec &hdmim1_rx_hpdin &hdmim1_rx_scl &hdmim1_rx_sda &hdmirx_hpd>; 401 pinctrl-names = "default"; 402 status = "okay"; 403}; 404 405&hdptxphy0 { 406 status = "okay"; 407}; 408 409&hdptxphy1 { 410 status = "okay"; 411}; 412 413&i2c0 { 414 pinctrl-names = "default"; 415 pinctrl-0 = <&i2c0m2_xfer>; 416 status = "okay"; 417 418 vdd_cpu_big0_s0: regulator@42 { 419 compatible = "rockchip,rk8602"; 420 reg = <0x42>; 421 fcs,suspend-voltage-selector = <1>; 422 regulator-name = "vdd_cpu_big0_s0"; 423 regulator-always-on; 424 regulator-boot-on; 425 regulator-min-microvolt = <550000>; 426 regulator-max-microvolt = <1050000>; 427 regulator-ramp-delay = <2300>; 428 vin-supply = <&vcc4v0_sys>; 429 430 regulator-state-mem { 431 regulator-off-in-suspend; 432 }; 433 }; 434 435 vdd_cpu_big1_s0: regulator@43 { 436 compatible = "rockchip,rk8603", "rockchip,rk8602"; 437 reg = <0x43>; 438 fcs,suspend-voltage-selector = <1>; 439 regulator-name = "vdd_cpu_big1_s0"; 440 regulator-always-on; 441 regulator-boot-on; 442 regulator-min-microvolt = <550000>; 443 regulator-max-microvolt = <1050000>; 444 regulator-ramp-delay = <2300>; 445 vin-supply = <&vcc4v0_sys>; 446 447 regulator-state-mem { 448 regulator-off-in-suspend; 449 }; 450 }; 451}; 452 453&i2c2 { 454 status = "okay"; 455 456 vdd_npu_s0: regulator@42 { 457 compatible = "rockchip,rk8602"; 458 reg = <0x42>; 459 fcs,suspend-voltage-selector = <1>; 460 regulator-name = "vdd_npu_s0"; 461 regulator-always-on; 462 regulator-boot-on; 463 regulator-min-microvolt = <550000>; 464 regulator-max-microvolt = <950000>; 465 regulator-ramp-delay = <2300>; 466 vin-supply = <&vcc4v0_sys>; 467 468 regulator-state-mem { 469 regulator-off-in-suspend; 470 }; 471 }; 472}; 473 474&i2c6 { 475 status = "okay"; 476 477 usbc0: usb-typec@22 { 478 compatible = "fcs,fusb302"; 479 reg = <0x22>; 480 interrupt-parent = <&gpio0>; 481 interrupts = <RK_PD3 IRQ_TYPE_LEVEL_LOW>; 482 pinctrl-names = "default"; 483 pinctrl-0 = <&usbc0_int>; 484 vbus-supply = <&vbus5v0_typec>; 485 status = "okay"; 486 487 connector { 488 compatible = "usb-c-connector"; 489 data-role = "dual"; 490 label = "USB-C"; 491 op-sink-microwatt = <1000000>; 492 /* fusb302 supports PD Rev 2.0 Ver 1.2 */ 493 pd-revision = /bits/ 8 <0x2 0x0 0x1 0x2>; 494 power-role = "dual"; 495 sink-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>; 496 source-pdos = <PDO_FIXED(5000, 2000, PDO_FIXED_USB_COMM)>; 497 try-power-role = "source"; 498 typec-power-opmode = "1.5A"; 499 500 ports { 501 #address-cells = <1>; 502 #size-cells = <0>; 503 504 port@0 { 505 reg = <0>; 506 usbc0_hs: endpoint { 507 remote-endpoint = <&usb_host0_xhci_drd_sw>; 508 }; 509 }; 510 511 port@1 { 512 reg = <1>; 513 usbc0_ss: endpoint { 514 remote-endpoint = <&usbdp_phy0_typec_ss>; 515 }; 516 }; 517 518 port@2 { 519 reg = <2>; 520 usbc0_sbu: endpoint { 521 remote-endpoint = <&usbdp_phy0_typec_sbu>; 522 }; 523 }; 524 }; 525 }; 526 }; 527 528 hym8563: rtc@51 { 529 compatible = "haoyu,hym8563"; 530 reg = <0x51>; 531 #clock-cells = <0>; 532 clock-output-names = "hym8563"; 533 pinctrl-names = "default"; 534 pinctrl-0 = <&hym8563_int>; 535 interrupt-parent = <&gpio0>; 536 interrupts = <RK_PB0 IRQ_TYPE_LEVEL_LOW>; 537 wakeup-source; 538 }; 539}; 540 541&i2c7 { 542 clock-frequency = <200000>; 543 status = "okay"; 544 545 rt5616: codec@1b { 546 compatible = "realtek,rt5616"; 547 reg = <0x1b>; 548 clocks = <&cru I2S0_8CH_MCLKOUT>; 549 clock-names = "mclk"; 550 #sound-dai-cells = <0>; 551 assigned-clocks = <&cru I2S0_8CH_MCLKOUT>; 552 assigned-clock-rates = <12288000>; 553 554 port { 555 rt5616_p0_0: endpoint { 556 remote-endpoint = <&i2s0_8ch_p0_0>; 557 }; 558 }; 559 }; 560 561 /* connected with MIPI-CSI1 */ 562}; 563 564&i2c8 { 565 pinctrl-0 = <&i2c8m2_xfer>; 566}; 567 568&i2s0_8ch { 569 pinctrl-names = "default"; 570 pinctrl-0 = <&i2s0_lrck 571 &i2s0_mclk 572 &i2s0_sclk 573 &i2s0_sdi0 574 &i2s0_sdo0>; 575 status = "okay"; 576 577 i2s0_8ch_p0: port { 578 i2s0_8ch_p0_0: endpoint { 579 dai-format = "i2s"; 580 mclk-fs = <256>; 581 remote-endpoint = <&rt5616_p0_0>; 582 }; 583 }; 584}; 585 586&i2s5_8ch { 587 status = "okay"; 588}; 589 590&i2s6_8ch { 591 status = "okay"; 592}; 593 594&pcie2x1l0 { 595 reset-gpios = <&gpio4 RK_PB3 GPIO_ACTIVE_HIGH>; 596 vpcie3v3-supply = <&vcc_3v3_pcie20>; 597 pinctrl-names = "default"; 598 pinctrl-0 = <&pcie2_0_rst>; 599 status = "okay"; 600}; 601 602&pcie2x1l1 { 603 reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>; 604 vpcie3v3-supply = <&vcc3v3_pcie2x1l0>; 605 pinctrl-names = "default"; 606 pinctrl-0 = <&pcie2_1_rst>; 607 status = "okay"; 608}; 609 610&pcie2x1l2 { 611 reset-gpios = <&gpio4 RK_PA4 GPIO_ACTIVE_HIGH>; 612 vpcie3v3-supply = <&vcc_3v3_pcie20>; 613 pinctrl-names = "default"; 614 pinctrl-0 = <&pcie2_2_rst>; 615 status = "okay"; 616}; 617 618&pcie30phy { 619 status = "okay"; 620}; 621 622&pcie3x4 { 623 reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>; 624 vpcie3v3-supply = <&vcc3v3_pcie30>; 625 status = "okay"; 626}; 627 628&pd_gpu { 629 domain-supply = <&vdd_gpu_s0>; 630}; 631 632&pinctrl { 633 gpio-leds { 634 sys_led_pin: sys-led-pin { 635 rockchip,pins = <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; 636 }; 637 638 usr_led_pin: usr-led-pin { 639 rockchip,pins = <2 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>; 640 }; 641 }; 642 643 hdmirx { 644 hdmirx_hpd: hdmirx-5v-detection { 645 rockchip,pins = <1 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>; 646 }; 647 }; 648 649 headphone { 650 hp_det: hp-det { 651 rockchip,pins = <1 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>; 652 }; 653 }; 654 655 hym8563 { 656 hym8563_int: hym8563-int { 657 rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>; 658 }; 659 }; 660 661 ir-receiver { 662 ir_receiver_pin: ir-receiver-pin { 663 rockchip,pins = <0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>; 664 }; 665 }; 666 667 pcie { 668 pcie2_0_rst: pcie2-0-rst { 669 rockchip,pins = <4 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>; 670 }; 671 672 pcie2_1_rst: pcie2-1-rst { 673 rockchip,pins = <4 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; 674 }; 675 676 pcie2_2_rst: pcie2-2-rst { 677 rockchip,pins = <4 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; 678 }; 679 680 pcie_m2_0_pwren: pcie-m20-pwren { 681 rockchip,pins = <2 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>; 682 }; 683 684 pcie_m2_1_pwren: pcie-m21-pwren { 685 rockchip,pins = <4 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; 686 }; 687 }; 688 689 usb { 690 typec5v_pwren: typec5v-pwren { 691 rockchip,pins = <1 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>; 692 }; 693 694 usb5v_pwren: usb5v_pwren { 695 rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; 696 }; 697 698 usbc0_int: usbc0-int { 699 rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>; 700 }; 701 }; 702}; 703 704&pwm1 { 705 pinctrl-0 = <&pwm1m1_pins>; 706 status = "okay"; 707}; 708 709&saradc { 710 vref-supply = <&avcc_1v8_s0>; 711 status = "okay"; 712}; 713 714&sdhci { 715 bus-width = <8>; 716 no-sdio; 717 no-sd; 718 non-removable; 719 max-frequency = <200000000>; 720 mmc-hs400-1_8v; 721 mmc-hs400-enhanced-strobe; 722 status = "okay"; 723}; 724 725&sdmmc { 726 bus-width = <4>; 727 cap-mmc-highspeed; 728 cap-sd-highspeed; 729 cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>; 730 disable-wp; 731 no-mmc; 732 no-sdio; 733 sd-uhs-sdr104; 734 vmmc-supply = <&vcc3v3_sd_s0>; 735 vqmmc-supply = <&vccio_sd_s0>; 736 status = "okay"; 737}; 738 739/* optional on non-LTS, populated on LTS version */ 740&sfc { 741 pinctrl-names = "default"; 742 pinctrl-0 = <&fspim1_pins>; 743 status = "okay"; 744 745 flash@0 { 746 compatible = "jedec,spi-nor"; 747 reg = <0>; 748 spi-max-frequency = <104000000>; 749 spi-rx-bus-width = <4>; 750 spi-tx-bus-width = <1>; 751 vcc-supply = <&vcc_1v8_s3>; 752 }; 753}; 754 755&spi2 { 756 status = "okay"; 757 assigned-clocks = <&cru CLK_SPI2>; 758 assigned-clock-rates = <200000000>; 759 pinctrl-names = "default"; 760 pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>; 761 num-cs = <1>; 762 763 pmic@0 { 764 compatible = "rockchip,rk806"; 765 spi-max-frequency = <1000000>; 766 reg = <0x0>; 767 768 interrupt-parent = <&gpio0>; 769 interrupts = <7 IRQ_TYPE_LEVEL_LOW>; 770 771 pinctrl-names = "default"; 772 pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>, 773 <&rk806_dvs2_null>, <&rk806_dvs3_null>; 774 775 system-power-controller; 776 777 vcc1-supply = <&vcc4v0_sys>; 778 vcc2-supply = <&vcc4v0_sys>; 779 vcc3-supply = <&vcc4v0_sys>; 780 vcc4-supply = <&vcc4v0_sys>; 781 vcc5-supply = <&vcc4v0_sys>; 782 vcc6-supply = <&vcc4v0_sys>; 783 vcc7-supply = <&vcc4v0_sys>; 784 vcc8-supply = <&vcc4v0_sys>; 785 vcc9-supply = <&vcc4v0_sys>; 786 vcc10-supply = <&vcc4v0_sys>; 787 vcc11-supply = <&vcc_2v0_pldo_s3>; 788 vcc12-supply = <&vcc4v0_sys>; 789 vcc13-supply = <&vcc_1v1_nldo_s3>; 790 vcc14-supply = <&vcc_1v1_nldo_s3>; 791 vcca-supply = <&vcc4v0_sys>; 792 793 gpio-controller; 794 #gpio-cells = <2>; 795 796 rk806_dvs1_null: dvs1-null-pins { 797 pins = "gpio_pwrctrl1"; 798 function = "pin_fun0"; 799 }; 800 801 rk806_dvs2_null: dvs2-null-pins { 802 pins = "gpio_pwrctrl2"; 803 function = "pin_fun0"; 804 }; 805 806 rk806_dvs3_null: dvs3-null-pins { 807 pins = "gpio_pwrctrl3"; 808 function = "pin_fun0"; 809 }; 810 811 regulators { 812 vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 { 813 regulator-boot-on; 814 regulator-min-microvolt = <550000>; 815 regulator-max-microvolt = <950000>; 816 regulator-ramp-delay = <12500>; 817 regulator-name = "vdd_gpu_s0"; 818 regulator-enable-ramp-delay = <400>; 819 820 regulator-state-mem { 821 regulator-off-in-suspend; 822 }; 823 }; 824 825 vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 { 826 regulator-always-on; 827 regulator-boot-on; 828 regulator-min-microvolt = <550000>; 829 regulator-max-microvolt = <950000>; 830 regulator-ramp-delay = <12500>; 831 regulator-name = "vdd_cpu_lit_s0"; 832 833 regulator-state-mem { 834 regulator-off-in-suspend; 835 }; 836 }; 837 838 vdd_log_s0: dcdc-reg3 { 839 regulator-always-on; 840 regulator-boot-on; 841 regulator-min-microvolt = <675000>; 842 regulator-max-microvolt = <750000>; 843 regulator-ramp-delay = <12500>; 844 regulator-name = "vdd_log_s0"; 845 846 regulator-state-mem { 847 regulator-off-in-suspend; 848 regulator-suspend-microvolt = <750000>; 849 }; 850 }; 851 852 vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 { 853 regulator-always-on; 854 regulator-boot-on; 855 regulator-min-microvolt = <550000>; 856 regulator-max-microvolt = <950000>; 857 regulator-ramp-delay = <12500>; 858 regulator-name = "vdd_vdenc_s0"; 859 860 regulator-state-mem { 861 regulator-off-in-suspend; 862 }; 863 }; 864 865 vdd_ddr_s0: dcdc-reg5 { 866 regulator-always-on; 867 regulator-boot-on; 868 regulator-min-microvolt = <675000>; 869 regulator-max-microvolt = <900000>; 870 regulator-ramp-delay = <12500>; 871 regulator-name = "vdd_ddr_s0"; 872 873 regulator-state-mem { 874 regulator-off-in-suspend; 875 regulator-suspend-microvolt = <850000>; 876 }; 877 }; 878 879 vdd2_ddr_s3: dcdc-reg6 { 880 regulator-always-on; 881 regulator-boot-on; 882 regulator-name = "vdd2_ddr_s3"; 883 884 regulator-state-mem { 885 regulator-on-in-suspend; 886 }; 887 }; 888 889 vcc_2v0_pldo_s3: dcdc-reg7 { 890 regulator-always-on; 891 regulator-boot-on; 892 regulator-min-microvolt = <2000000>; 893 regulator-max-microvolt = <2000000>; 894 regulator-ramp-delay = <12500>; 895 regulator-name = "vdd_2v0_pldo_s3"; 896 897 regulator-state-mem { 898 regulator-on-in-suspend; 899 regulator-suspend-microvolt = <2000000>; 900 }; 901 }; 902 903 vcc_3v3_s3: dcdc-reg8 { 904 regulator-always-on; 905 regulator-boot-on; 906 regulator-min-microvolt = <3300000>; 907 regulator-max-microvolt = <3300000>; 908 regulator-name = "vcc_3v3_s3"; 909 910 regulator-state-mem { 911 regulator-on-in-suspend; 912 regulator-suspend-microvolt = <3300000>; 913 }; 914 }; 915 916 vddq_ddr_s0: dcdc-reg9 { 917 regulator-always-on; 918 regulator-boot-on; 919 regulator-name = "vddq_ddr_s0"; 920 921 regulator-state-mem { 922 regulator-off-in-suspend; 923 }; 924 }; 925 926 vcc_1v8_s3: dcdc-reg10 { 927 regulator-always-on; 928 regulator-boot-on; 929 regulator-min-microvolt = <1800000>; 930 regulator-max-microvolt = <1800000>; 931 regulator-name = "vcc_1v8_s3"; 932 933 regulator-state-mem { 934 regulator-on-in-suspend; 935 regulator-suspend-microvolt = <1800000>; 936 }; 937 }; 938 939 avcc_1v8_s0: pldo-reg1 { 940 regulator-always-on; 941 regulator-boot-on; 942 regulator-min-microvolt = <1800000>; 943 regulator-max-microvolt = <1800000>; 944 regulator-name = "avcc_1v8_s0"; 945 946 regulator-state-mem { 947 regulator-off-in-suspend; 948 }; 949 }; 950 951 vcc_1v8_s0: pldo-reg2 { 952 regulator-always-on; 953 regulator-boot-on; 954 regulator-min-microvolt = <1800000>; 955 regulator-max-microvolt = <1800000>; 956 regulator-name = "vcc_1v8_s0"; 957 958 regulator-state-mem { 959 regulator-off-in-suspend; 960 regulator-suspend-microvolt = <1800000>; 961 }; 962 }; 963 964 avdd_1v2_s0: pldo-reg3 { 965 regulator-always-on; 966 regulator-boot-on; 967 regulator-min-microvolt = <1200000>; 968 regulator-max-microvolt = <1200000>; 969 regulator-name = "avdd_1v2_s0"; 970 971 regulator-state-mem { 972 regulator-off-in-suspend; 973 }; 974 }; 975 976 vcc_3v3_s0: pldo-reg4 { 977 regulator-always-on; 978 regulator-boot-on; 979 regulator-min-microvolt = <3300000>; 980 regulator-max-microvolt = <3300000>; 981 regulator-ramp-delay = <12500>; 982 regulator-name = "vcc_3v3_s0"; 983 984 regulator-state-mem { 985 regulator-off-in-suspend; 986 }; 987 }; 988 989 vccio_sd_s0: pldo-reg5 { 990 regulator-always-on; 991 regulator-boot-on; 992 regulator-min-microvolt = <1800000>; 993 regulator-max-microvolt = <3300000>; 994 regulator-ramp-delay = <12500>; 995 regulator-name = "vccio_sd_s0"; 996 997 regulator-state-mem { 998 regulator-off-in-suspend; 999 }; 1000 }; 1001 1002 pldo6_s3: pldo-reg6 { 1003 regulator-always-on; 1004 regulator-boot-on; 1005 regulator-min-microvolt = <1800000>; 1006 regulator-max-microvolt = <1800000>; 1007 regulator-name = "pldo6_s3"; 1008 1009 regulator-state-mem { 1010 regulator-on-in-suspend; 1011 regulator-suspend-microvolt = <1800000>; 1012 }; 1013 }; 1014 1015 vdd_0v75_s3: nldo-reg1 { 1016 regulator-always-on; 1017 regulator-boot-on; 1018 regulator-min-microvolt = <750000>; 1019 regulator-max-microvolt = <750000>; 1020 regulator-name = "vdd_0v75_s3"; 1021 1022 regulator-state-mem { 1023 regulator-on-in-suspend; 1024 regulator-suspend-microvolt = <750000>; 1025 }; 1026 }; 1027 1028 vdd_ddr_pll_s0: nldo-reg2 { 1029 regulator-always-on; 1030 regulator-boot-on; 1031 regulator-min-microvolt = <850000>; 1032 regulator-max-microvolt = <850000>; 1033 regulator-name = "vdd_ddr_pll_s0"; 1034 1035 regulator-state-mem { 1036 regulator-off-in-suspend; 1037 regulator-suspend-microvolt = <850000>; 1038 }; 1039 }; 1040 1041 avdd_0v75_s0: nldo-reg3 { 1042 regulator-always-on; 1043 regulator-boot-on; 1044 regulator-min-microvolt = <750000>; 1045 regulator-max-microvolt = <750000>; 1046 regulator-name = "avdd_0v75_s0"; 1047 1048 regulator-state-mem { 1049 regulator-off-in-suspend; 1050 }; 1051 }; 1052 1053 vdd_0v85_s0: nldo-reg4 { 1054 regulator-always-on; 1055 regulator-boot-on; 1056 regulator-min-microvolt = <850000>; 1057 regulator-max-microvolt = <850000>; 1058 regulator-name = "vdd_0v85_s0"; 1059 1060 regulator-state-mem { 1061 regulator-off-in-suspend; 1062 }; 1063 }; 1064 1065 vdd_0v75_s0: nldo-reg5 { 1066 regulator-always-on; 1067 regulator-boot-on; 1068 regulator-min-microvolt = <750000>; 1069 regulator-max-microvolt = <750000>; 1070 regulator-name = "vdd_0v75_s0"; 1071 1072 regulator-state-mem { 1073 regulator-off-in-suspend; 1074 }; 1075 }; 1076 }; 1077 }; 1078}; 1079 1080&tsadc { 1081 status = "okay"; 1082}; 1083 1084&uart2 { 1085 pinctrl-0 = <&uart2m0_xfer>; 1086 status = "okay"; 1087}; 1088 1089&u2phy0 { 1090 status = "okay"; 1091}; 1092 1093&u2phy0_otg { 1094 status = "okay"; 1095}; 1096 1097&u2phy1 { 1098 status = "okay"; 1099}; 1100 1101&u2phy1_otg { 1102 status = "okay"; 1103}; 1104 1105&u2phy2_host { 1106 status = "okay"; 1107}; 1108 1109&u2phy3_host { 1110 status = "okay"; 1111}; 1112 1113&u2phy2 { 1114 status = "okay"; 1115}; 1116 1117&u2phy3 { 1118 status = "okay"; 1119}; 1120 1121&usbdp_phy0 { 1122 mode-switch; 1123 orientation-switch; 1124 sbu1-dc-gpios = <&gpio4 RK_PA6 GPIO_ACTIVE_HIGH>; 1125 sbu2-dc-gpios = <&gpio4 RK_PA7 GPIO_ACTIVE_HIGH>; 1126 status = "okay"; 1127 1128 port { 1129 #address-cells = <1>; 1130 #size-cells = <0>; 1131 1132 usbdp_phy0_typec_ss: endpoint@0 { 1133 reg = <0>; 1134 remote-endpoint = <&usbc0_ss>; 1135 }; 1136 1137 usbdp_phy0_typec_sbu: endpoint@1 { 1138 reg = <1>; 1139 remote-endpoint = <&usbc0_sbu>; 1140 }; 1141 }; 1142}; 1143 1144&usbdp_phy1 { 1145 phy-supply = <&vbus5v0_usb>; 1146 status = "okay"; 1147}; 1148 1149&usb_host0_ehci { 1150 status = "okay"; 1151}; 1152 1153&usb_host0_ohci { 1154 status = "okay"; 1155}; 1156 1157&usb_host0_xhci { 1158 usb-role-switch; 1159 status = "okay"; 1160 1161 port { 1162 usb_host0_xhci_drd_sw: endpoint { 1163 remote-endpoint = <&usbc0_hs>; 1164 }; 1165 }; 1166}; 1167 1168&usb_host1_xhci { 1169 dr_mode = "host"; 1170 status = "okay"; 1171}; 1172 1173&usb_host1_ehci { 1174 status = "okay"; 1175}; 1176 1177&usb_host1_ohci { 1178 status = "okay"; 1179}; 1180 1181&vop_mmu { 1182 status = "okay"; 1183}; 1184 1185&vop { 1186 status = "okay"; 1187}; 1188 1189&vp0 { 1190 vp0_out_hdmi0: endpoint@ROCKCHIP_VOP2_EP_HDMI0 { 1191 reg = <ROCKCHIP_VOP2_EP_HDMI0>; 1192 remote-endpoint = <&hdmi0_in_vp0>; 1193 }; 1194}; 1195 1196&vp1 { 1197 vp1_out_hdmi1: endpoint@ROCKCHIP_VOP2_EP_HDMI1 { 1198 reg = <ROCKCHIP_VOP2_EP_HDMI1>; 1199 remote-endpoint = <&hdmi1_in_vp1>; 1200 }; 1201};
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