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rk3588-firefly-icore-3588q.dtsi
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linux-6.19.14/arch/arm64/boot/dts/rockchip/rk3588-firefly-icore-3588q.dtsi
1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2 3#include <dt-bindings/gpio/gpio.h> 4#include <dt-bindings/pinctrl/rockchip.h> 5 6#include "rk3588.dtsi" 7 8/ { 9 compatible = "firefly,icore-3588q", "rockchip,rk3588"; 10 11 aliases { 12 mmc0 = &sdhci; 13 }; 14}; 15 16&cpu_b0 { 17 cpu-supply = <&vdd_cpu_big0_s0>; 18}; 19 20&cpu_b1 { 21 cpu-supply = <&vdd_cpu_big0_s0>; 22}; 23 24&cpu_b2 { 25 cpu-supply = <&vdd_cpu_big1_s0>; 26}; 27 28&cpu_b3 { 29 cpu-supply = <&vdd_cpu_big1_s0>; 30}; 31 32&cpu_l0 { 33 cpu-supply = <&vdd_cpu_lit_s0>; 34}; 35 36&cpu_l1 { 37 cpu-supply = <&vdd_cpu_lit_s0>; 38}; 39 40&cpu_l2 { 41 cpu-supply = <&vdd_cpu_lit_s0>; 42}; 43 44&cpu_l3 { 45 cpu-supply = <&vdd_cpu_lit_s0>; 46}; 47 48&i2c0 { 49 pinctrl-names = "default"; 50 pinctrl-0 = <&i2c0m2_xfer>; 51 status = "okay"; 52 53 vdd_cpu_big0_s0: regulator@42 { 54 compatible = "rockchip,rk8602"; 55 reg = <0x42>; 56 fcs,suspend-voltage-selector = <1>; 57 regulator-always-on; 58 regulator-boot-on; 59 regulator-min-microvolt = <550000>; 60 regulator-max-microvolt = <1050000>; 61 regulator-name = "vdd_cpu_big0_s0"; 62 regulator-ramp-delay = <2300>; 63 vin-supply = <&vcc5v0_sys>; 64 65 regulator-state-mem { 66 regulator-off-in-suspend; 67 }; 68 }; 69 70 vdd_cpu_big1_s0: regulator@43 { 71 compatible = "rockchip,rk8603", "rockchip,rk8602"; 72 reg = <0x43>; 73 fcs,suspend-voltage-selector = <1>; 74 regulator-always-on; 75 regulator-boot-on; 76 regulator-min-microvolt = <550000>; 77 regulator-max-microvolt = <1050000>; 78 regulator-name = "vdd_cpu_big1_s0"; 79 regulator-ramp-delay = <2300>; 80 vin-supply = <&vcc5v0_sys>; 81 82 regulator-state-mem { 83 regulator-off-in-suspend; 84 }; 85 }; 86}; 87 88&i2c1 { 89 pinctrl-names = "default"; 90 pinctrl-0 = <&i2c1m2_xfer>; 91 status = "okay"; 92 93 vdd_npu_s0: vdd_npu_mem_s0: regulator@42 { 94 compatible = "rockchip,rk8602"; 95 reg = <0x42>; 96 fcs,suspend-voltage-selector = <1>; 97 regulator-always-on; 98 regulator-boot-on; 99 regulator-min-microvolt = <550000>; 100 regulator-max-microvolt = <950000>; 101 regulator-name = "vdd_npu_s0"; 102 regulator-ramp-delay = <2300>; 103 vin-supply = <&vcc5v0_sys>; 104 105 regulator-state-mem { 106 regulator-off-in-suspend; 107 }; 108 }; 109}; 110 111&sdhci { 112 bus-width = <8>; 113 no-sdio; 114 no-sd; 115 non-removable; 116 max-frequency = <150000000>; 117 mmc-hs400-1_8v; 118 mmc-hs400-enhanced-strobe; 119 status = "okay"; 120}; 121 122&spi2 { 123 assigned-clocks = <&cru CLK_SPI2>; 124 assigned-clock-rates = <200000000>; 125 num-cs = <1>; 126 pinctrl-names = "default"; 127 pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>; 128 status = "okay"; 129 130 pmic@0 { 131 compatible = "rockchip,rk806"; 132 reg = <0x0>; 133 interrupt-parent = <&gpio0>; 134 interrupts = <7 IRQ_TYPE_LEVEL_LOW>; 135 gpio-controller; 136 #gpio-cells = <2>; 137 pinctrl-names = "default"; 138 pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>, 139 <&rk806_dvs2_null>, <&rk806_dvs3_null>; 140 spi-max-frequency = <1000000>; 141 system-power-controller; 142 143 vcc1-supply = <&vcc5v0_sys>; 144 vcc2-supply = <&vcc5v0_sys>; 145 vcc3-supply = <&vcc5v0_sys>; 146 vcc4-supply = <&vcc5v0_sys>; 147 vcc5-supply = <&vcc5v0_sys>; 148 vcc6-supply = <&vcc5v0_sys>; 149 vcc7-supply = <&vcc5v0_sys>; 150 vcc8-supply = <&vcc5v0_sys>; 151 vcc9-supply = <&vcc5v0_sys>; 152 vcc10-supply = <&vcc5v0_sys>; 153 vcc11-supply = <&vcc_2v0_pldo_s3>; 154 vcc12-supply = <&vcc5v0_sys>; 155 vcc13-supply = <&vcc_1v1_nldo_s3>; 156 vcc14-supply = <&vcc_1v1_nldo_s3>; 157 vcca-supply = <&vcc5v0_sys>; 158 159 rk806_dvs1_null: dvs1-null-pins { 160 pins = "gpio_pwrctrl1"; 161 function = "pin_fun0"; 162 }; 163 164 rk806_dvs2_null: dvs2-null-pins { 165 pins = "gpio_pwrctrl2"; 166 function = "pin_fun0"; 167 }; 168 169 rk806_dvs3_null: dvs3-null-pins { 170 pins = "gpio_pwrctrl3"; 171 function = "pin_fun0"; 172 }; 173 174 regulators { 175 vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 { 176 regulator-boot-on; 177 regulator-min-microvolt = <550000>; 178 regulator-max-microvolt = <950000>; 179 regulator-ramp-delay = <12500>; 180 regulator-name = "vdd_gpu_s0"; 181 regulator-enable-ramp-delay = <400>; 182 183 regulator-state-mem { 184 regulator-off-in-suspend; 185 }; 186 }; 187 188 vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 { 189 regulator-always-on; 190 regulator-boot-on; 191 regulator-min-microvolt = <550000>; 192 regulator-max-microvolt = <950000>; 193 regulator-ramp-delay = <12500>; 194 regulator-name = "vdd_cpu_lit_s0"; 195 196 regulator-state-mem { 197 regulator-off-in-suspend; 198 }; 199 }; 200 201 vdd_log_s0: dcdc-reg3 { 202 regulator-always-on; 203 regulator-boot-on; 204 regulator-min-microvolt = <675000>; 205 regulator-max-microvolt = <750000>; 206 regulator-ramp-delay = <12500>; 207 regulator-name = "vdd_log_s0"; 208 209 regulator-state-mem { 210 regulator-off-in-suspend; 211 regulator-suspend-microvolt = <750000>; 212 }; 213 }; 214 215 vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 { 216 regulator-always-on; 217 regulator-boot-on; 218 regulator-min-microvolt = <550000>; 219 regulator-max-microvolt = <950000>; 220 regulator-ramp-delay = <12500>; 221 regulator-name = "vdd_vdenc_s0"; 222 223 regulator-state-mem { 224 regulator-off-in-suspend; 225 }; 226 }; 227 228 vdd_ddr_s0: dcdc-reg5 { 229 regulator-always-on; 230 regulator-boot-on; 231 regulator-min-microvolt = <675000>; 232 regulator-max-microvolt = <950000>; 233 regulator-ramp-delay = <12500>; 234 regulator-name = "vdd_ddr_s0"; 235 236 regulator-state-mem { 237 regulator-off-in-suspend; 238 regulator-suspend-microvolt = <850000>; 239 }; 240 }; 241 242 vdd2_ddr_s3: dcdc-reg6 { 243 regulator-always-on; 244 regulator-boot-on; 245 regulator-name = "vdd2_ddr_s3"; 246 247 regulator-state-mem { 248 regulator-on-in-suspend; 249 }; 250 }; 251 252 vcc_2v0_pldo_s3: dcdc-reg7 { 253 regulator-always-on; 254 regulator-boot-on; 255 regulator-min-microvolt = <2000000>; 256 regulator-max-microvolt = <2000000>; 257 regulator-name = "vdd_2v0_pldo_s3"; 258 259 regulator-state-mem { 260 regulator-on-in-suspend; 261 regulator-suspend-microvolt = <2000000>; 262 }; 263 }; 264 265 vcc_3v3_s3: dcdc-reg8 { 266 regulator-always-on; 267 regulator-boot-on; 268 regulator-min-microvolt = <3300000>; 269 regulator-max-microvolt = <3300000>; 270 regulator-name = "vcc_3v3_s3"; 271 272 regulator-state-mem { 273 regulator-on-in-suspend; 274 regulator-suspend-microvolt = <3300000>; 275 }; 276 }; 277 278 vddq_ddr_s0: dcdc-reg9 { 279 regulator-always-on; 280 regulator-boot-on; 281 regulator-name = "vddq_ddr_s0"; 282 283 regulator-state-mem { 284 regulator-off-in-suspend; 285 }; 286 }; 287 288 vcc_1v8_s3: dcdc-reg10 { 289 regulator-always-on; 290 regulator-boot-on; 291 regulator-min-microvolt = <1800000>; 292 regulator-max-microvolt = <1800000>; 293 regulator-name = "vcc_1v8_s3"; 294 295 regulator-state-mem { 296 regulator-on-in-suspend; 297 regulator-suspend-microvolt = <1800000>; 298 }; 299 }; 300 301 avcc_1v8_s0: pldo-reg1 { 302 regulator-always-on; 303 regulator-boot-on; 304 regulator-min-microvolt = <1800000>; 305 regulator-max-microvolt = <1800000>; 306 regulator-name = "avcc_1v8_s0"; 307 308 regulator-state-mem { 309 regulator-off-in-suspend; 310 }; 311 }; 312 313 vcc_1v8_s0: pldo-reg2 { 314 regulator-always-on; 315 regulator-boot-on; 316 regulator-min-microvolt = <1800000>; 317 regulator-max-microvolt = <1800000>; 318 regulator-name = "vcc_1v8_s0"; 319 320 regulator-state-mem { 321 regulator-off-in-suspend; 322 regulator-suspend-microvolt = <1800000>; 323 }; 324 }; 325 326 avdd_1v2_s0: pldo-reg3 { 327 regulator-always-on; 328 regulator-boot-on; 329 regulator-min-microvolt = <1200000>; 330 regulator-max-microvolt = <1200000>; 331 regulator-name = "avdd_1v2_s0"; 332 333 regulator-state-mem { 334 regulator-off-in-suspend; 335 }; 336 }; 337 338 vcc_3v3_s0: pldo-reg4 { 339 regulator-always-on; 340 regulator-boot-on; 341 regulator-min-microvolt = <3300000>; 342 regulator-max-microvolt = <3300000>; 343 regulator-name = "vcc_3v3_s0"; 344 345 regulator-state-mem { 346 regulator-on-in-suspend; 347 }; 348 }; 349 350 vccio_sd_s0: pldo-reg5 { 351 regulator-always-on; 352 regulator-boot-on; 353 regulator-min-microvolt = <1800000>; 354 regulator-max-microvolt = <3300000>; 355 regulator-name = "vccio_sd_s0"; 356 357 regulator-state-mem { 358 regulator-off-in-suspend; 359 }; 360 }; 361 362 pldo6_s3: pldo-reg6 { 363 regulator-always-on; 364 regulator-boot-on; 365 regulator-min-microvolt = <1800000>; 366 regulator-max-microvolt = <1800000>; 367 regulator-name = "pldo6_s3"; 368 369 regulator-state-mem { 370 regulator-on-in-suspend; 371 regulator-suspend-microvolt = <1800000>; 372 }; 373 }; 374 375 vdd_0v75_s3: nldo-reg1 { 376 regulator-always-on; 377 regulator-boot-on; 378 regulator-min-microvolt = <750000>; 379 regulator-max-microvolt = <750000>; 380 regulator-name = "vdd_0v75_s3"; 381 382 regulator-state-mem { 383 regulator-on-in-suspend; 384 regulator-suspend-microvolt = <750000>; 385 }; 386 }; 387 388 vdd_ddr_pll_s0: nldo-reg2 { 389 regulator-always-on; 390 regulator-boot-on; 391 regulator-min-microvolt = <850000>; 392 regulator-max-microvolt = <850000>; 393 regulator-name = "vdd_ddr_pll_s0"; 394 395 regulator-state-mem { 396 regulator-off-in-suspend; 397 regulator-suspend-microvolt = <850000>; 398 }; 399 }; 400 401 avdd_0v75_s0: nldo-reg3 { 402 regulator-always-on; 403 regulator-boot-on; 404 regulator-min-microvolt = <750000>; 405 regulator-max-microvolt = <750000>; 406 regulator-name = "avdd_0v75_s0"; 407 408 regulator-state-mem { 409 regulator-off-in-suspend; 410 }; 411 }; 412 413 vdd_0v85_s0: nldo-reg4 { 414 regulator-always-on; 415 regulator-boot-on; 416 regulator-min-microvolt = <850000>; 417 regulator-max-microvolt = <850000>; 418 regulator-name = "vdd_0v85_s0"; 419 420 regulator-state-mem { 421 regulator-off-in-suspend; 422 }; 423 }; 424 425 vdd_0v75_s0: nldo-reg5 { 426 regulator-always-on; 427 regulator-boot-on; 428 regulator-min-microvolt = <750000>; 429 regulator-max-microvolt = <750000>; 430 regulator-name = "vdd_0v75_s0"; 431 432 regulator-state-mem { 433 regulator-off-in-suspend; 434 }; 435 }; 436 }; 437 }; 438}; 439 440&uart2 { 441 pinctrl-0 = <&uart2m0_xfer>; 442 status = "okay"; 443};
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