salvator-common.dtsi

   1// SPDX-License-Identifier: GPL-2.0
   2/*
   3 * Device Tree Source for common parts of Salvator-X board variants
   4 *
   5 * Copyright (C) 2015-2016 Renesas Electronics Corp.
   6 */
   7
   8/*
   9 * SSI-AK4613
  10 *
  11 * This command is required when Playback/Capture
  12 *
  13 *	amixer set "DVC Out" 100%
  14 *	amixer set "DVC In" 100%
  15 *
  16 * You can use Mute
  17 *
  18 *	amixer set "DVC Out Mute" on
  19 *	amixer set "DVC In Mute" on
  20 *
  21 * You can use Volume Ramp
  22 *
  23 *	amixer set "DVC Out Ramp Up Rate"   "0.125 dB/64 steps"
  24 *	amixer set "DVC Out Ramp Down Rate" "0.125 dB/512 steps"
  25 *	amixer set "DVC Out Ramp" on
  26 *	aplay xxx.wav &
  27 *	amixer set "DVC Out"  80%  // Volume Down
  28 *	amixer set "DVC Out" 100%  // Volume Up
  29 */
  30
  31#include <dt-bindings/gpio/gpio.h>
  32#include <dt-bindings/input/input.h>
  33
  34/ {
  35	aliases {
  36		i2c0 = &i2c0;
  37		i2c1 = &i2c1;
  38		i2c2 = &i2c2;
  39		i2c3 = &i2c3;
  40		i2c4 = &i2c4;
  41		i2c5 = &i2c5;
  42		i2c6 = &i2c6;
  43		i2c7 = &i2c_dvfs;
  44		serial0 = &scif2;
  45		serial1 = &hscif1;
  46		ethernet0 = &avb;
  47		mmc0 = &sdhi2;
  48		mmc1 = &sdhi0;
  49		mmc2 = &sdhi3;
  50	};
  51
  52	chosen {
  53		bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
  54		stdout-path = "serial0:115200n8";
  55	};
  56
  57	audio_clkout: audio-clkout {
  58		/*
  59		 * This is same as <&rcar_sound 0>
  60		 * but needed to avoid cs2000/rcar_sound probe dead-lock
  61		 */
  62		compatible = "fixed-clock";
  63		#clock-cells = <0>;
  64		clock-frequency = <12288000>;
  65	};
  66
  67	backlight: backlight {
  68		compatible = "pwm-backlight";
  69		pwms = <&pwm1 0 50000>;
  70
  71		brightness-levels = <256 128 64 16 8 4 0>;
  72		default-brightness-level = <6>;
  73
  74		power-supply = <&reg_12v>;
  75		enable-gpios = <&gpio6 7 GPIO_ACTIVE_HIGH>;
  76	};
  77
  78	cvbs-in {
  79		compatible = "composite-video-connector";
  80		label = "CVBS IN";
  81
  82		port {
  83			cvbs_con: endpoint {
  84				remote-endpoint = <&adv7482_ain7>;
  85			};
  86		};
  87	};
  88
  89	hdmi-in {
  90		compatible = "hdmi-connector";
  91		label = "HDMI IN";
  92		type = "a";
  93
  94		port {
  95			hdmi_in_con: endpoint {
  96				remote-endpoint = <&adv7482_hdmi>;
  97			};
  98		};
  99	};
 100
 101	hdmi0-out {
 102		compatible = "hdmi-connector";
 103		label = "HDMI0 OUT";
 104		type = "a";
 105
 106		port {
 107			hdmi0_con: endpoint {
 108				remote-endpoint = <&rcar_dw_hdmi0_out>;
 109			};
 110		};
 111	};
 112
 113	hdmi1-out {
 114		compatible = "hdmi-connector";
 115		label = "HDMI1 OUT";
 116		type = "a";
 117
 118		port {
 119			hdmi1_con: endpoint {
 120			};
 121		};
 122	};
 123
 124	keys {
 125		compatible = "gpio-keys";
 126
 127		pinctrl-0 = <&keys_pins>;
 128		pinctrl-names = "default";
 129
 130		key-1 {
 131			gpios = <&gpio5 17 GPIO_ACTIVE_LOW>;
 132			linux,code = <KEY_1>;
 133			label = "SW4-1";
 134			wakeup-source;
 135			debounce-interval = <20>;
 136		};
 137		key-2 {
 138			gpios = <&gpio5 20 GPIO_ACTIVE_LOW>;
 139			linux,code = <KEY_2>;
 140			label = "SW4-2";
 141			wakeup-source;
 142			debounce-interval = <20>;
 143		};
 144		key-3 {
 145			gpios = <&gpio5 22 GPIO_ACTIVE_LOW>;
 146			linux,code = <KEY_3>;
 147			label = "SW4-3";
 148			wakeup-source;
 149			debounce-interval = <20>;
 150		};
 151		key-4 {
 152			gpios = <&gpio5 23 GPIO_ACTIVE_LOW>;
 153			linux,code = <KEY_4>;
 154			label = "SW4-4";
 155			wakeup-source;
 156			debounce-interval = <20>;
 157		};
 158		key-a {
 159			gpios = <&gpio6 11 GPIO_ACTIVE_LOW>;
 160			linux,code = <KEY_A>;
 161			label = "TSW0";
 162			wakeup-source;
 163			debounce-interval = <20>;
 164		};
 165		key-b {
 166			gpios = <&gpio6 12 GPIO_ACTIVE_LOW>;
 167			linux,code = <KEY_B>;
 168			label = "TSW1";
 169			wakeup-source;
 170			debounce-interval = <20>;
 171		};
 172		key-c {
 173			gpios = <&gpio6 13 GPIO_ACTIVE_LOW>;
 174			linux,code = <KEY_C>;
 175			label = "TSW2";
 176			wakeup-source;
 177			debounce-interval = <20>;
 178		};
 179	};
 180
 181	reg_1p8v: regulator-1p8v {
 182		compatible = "regulator-fixed";
 183		regulator-name = "fixed-1.8V";
 184		regulator-min-microvolt = <1800000>;
 185		regulator-max-microvolt = <1800000>;
 186		regulator-boot-on;
 187		regulator-always-on;
 188	};
 189
 190	reg_3p3v: regulator-3p3v {
 191		compatible = "regulator-fixed";
 192		regulator-name = "fixed-3.3V";
 193		regulator-min-microvolt = <3300000>;
 194		regulator-max-microvolt = <3300000>;
 195		regulator-boot-on;
 196		regulator-always-on;
 197	};
 198
 199	reg_12v: regulator-12v {
 200		compatible = "regulator-fixed";
 201		regulator-name = "fixed-12V";
 202		regulator-min-microvolt = <12000000>;
 203		regulator-max-microvolt = <12000000>;
 204		regulator-boot-on;
 205		regulator-always-on;
 206	};
 207
 208	sound_card: sound {
 209		compatible = "audio-graph-card";
 210
 211		label = "rcar-sound";
 212
 213		dais = <&rsnd_port0	/* ak4613 */
 214			&rsnd_port1	/* HDMI0  */
 215#ifdef SOC_HAS_HDMI1
 216			&rsnd_port2	/* HDMI1  */
 217#endif
 218			>;
 219	};
 220
 221	vbus0_usb2: regulator-vbus0-usb2 {
 222		compatible = "regulator-fixed";
 223
 224		regulator-name = "USB20_VBUS0";
 225		regulator-min-microvolt = <5000000>;
 226		regulator-max-microvolt = <5000000>;
 227
 228		gpio = <&gpio6 16 GPIO_ACTIVE_HIGH>;
 229		enable-active-high;
 230	};
 231
 232	vcc_sdhi0: regulator-vcc-sdhi0 {
 233		compatible = "regulator-fixed";
 234
 235		regulator-name = "SDHI0 Vcc";
 236		regulator-min-microvolt = <3300000>;
 237		regulator-max-microvolt = <3300000>;
 238
 239		gpio = <&gpio5 2 GPIO_ACTIVE_HIGH>;
 240		enable-active-high;
 241	};
 242
 243	vccq_sdhi0: regulator-vccq-sdhi0 {
 244		compatible = "regulator-gpio";
 245
 246		regulator-name = "SDHI0 VccQ";
 247		regulator-min-microvolt = <1800000>;
 248		regulator-max-microvolt = <3300000>;
 249
 250		gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
 251		gpios-states = <1>;
 252		states = <3300000 1>, <1800000 0>;
 253	};
 254
 255	vcc_sdhi3: regulator-vcc-sdhi3 {
 256		compatible = "regulator-fixed";
 257
 258		regulator-name = "SDHI3 Vcc";
 259		regulator-min-microvolt = <3300000>;
 260		regulator-max-microvolt = <3300000>;
 261
 262		gpio = <&gpio3 15 GPIO_ACTIVE_HIGH>;
 263		enable-active-high;
 264	};
 265
 266	vccq_sdhi3: regulator-vccq-sdhi3 {
 267		compatible = "regulator-gpio";
 268
 269		regulator-name = "SDHI3 VccQ";
 270		regulator-min-microvolt = <1800000>;
 271		regulator-max-microvolt = <3300000>;
 272
 273		gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>;
 274		gpios-states = <1>;
 275		states = <3300000 1>, <1800000 0>;
 276	};
 277
 278	vga {
 279		compatible = "vga-connector";
 280
 281		port {
 282			vga_in: endpoint {
 283				remote-endpoint = <&adv7123_out>;
 284			};
 285		};
 286	};
 287
 288	vga-encoder {
 289		compatible = "adi,adv7123";
 290
 291		ports {
 292			#address-cells = <1>;
 293			#size-cells = <0>;
 294
 295			port@0 {
 296				reg = <0>;
 297				adv7123_in: endpoint {
 298					remote-endpoint = <&du_out_rgb>;
 299				};
 300			};
 301			port@1 {
 302				reg = <1>;
 303				adv7123_out: endpoint {
 304					remote-endpoint = <&vga_in>;
 305				};
 306			};
 307		};
 308	};
 309
 310	x12_clk: x12 {
 311		compatible = "fixed-clock";
 312		#clock-cells = <0>;
 313		clock-frequency = <24576000>;
 314	};
 315
 316	/* External DU dot clocks */
 317	x21_clk: x21-clock {
 318		compatible = "fixed-clock";
 319		#clock-cells = <0>;
 320		clock-frequency = <33000000>;
 321	};
 322
 323	x22_clk: x22-clock {
 324		compatible = "fixed-clock";
 325		#clock-cells = <0>;
 326		clock-frequency = <33000000>;
 327	};
 328
 329	x23_clk: x23-clock {
 330		compatible = "fixed-clock";
 331		#clock-cells = <0>;
 332		clock-frequency = <25000000>;
 333	};
 334};
 335
 336&a57_0 {
 337	cpu-supply = <&dvfs>;
 338};
 339
 340&audio_clk_a {
 341	clock-frequency = <22579200>;
 342};
 343
 344&avb {
 345	pinctrl-0 = <&avb_pins>;
 346	pinctrl-names = "default";
 347	phy-handle = <&phy0>;
 348	tx-internal-delay-ps = <2000>;
 349	status = "okay";
 350
 351	phy0: ethernet-phy@0 {
 352		compatible = "ethernet-phy-id0022.1622",
 353			     "ethernet-phy-ieee802.3-c22";
 354		rxc-skew-ps = <1500>;
 355		reg = <0>;
 356		interrupts-extended = <&gpio2 11 IRQ_TYPE_LEVEL_LOW>;
 357		reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
 358	};
 359};
 360
 361&csi20 {
 362	status = "okay";
 363
 364	ports {
 365		port@0 {
 366			csi20_in: endpoint {
 367				clock-lanes = <0>;
 368				data-lanes = <1>;
 369				remote-endpoint = <&adv7482_txb>;
 370			};
 371		};
 372	};
 373};
 374
 375&csi40 {
 376	status = "okay";
 377
 378	ports {
 379		port@0 {
 380			csi40_in: endpoint {
 381				clock-lanes = <0>;
 382				data-lanes = <1 2 3 4>;
 383				remote-endpoint = <&adv7482_txa>;
 384			};
 385		};
 386	};
 387};
 388
 389&du {
 390	pinctrl-0 = <&du_pins>;
 391	pinctrl-names = "default";
 392	status = "okay";
 393
 394	ports {
 395		port@0 {
 396			du_out_rgb: endpoint {
 397				remote-endpoint = <&adv7123_in>;
 398			};
 399		};
 400	};
 401};
 402
 403&ehci0 {
 404	dr_mode = "otg";
 405	status = "okay";
 406};
 407
 408&ehci1 {
 409	status = "okay";
 410};
 411
 412&extalr_clk {
 413	clock-frequency = <32768>;
 414};
 415
 416&hdmi0 {
 417	status = "okay";
 418
 419	ports {
 420		port@1 {
 421			reg = <1>;
 422			rcar_dw_hdmi0_out: endpoint {
 423				remote-endpoint = <&hdmi0_con>;
 424			};
 425		};
 426		port@2 {
 427			reg = <2>;
 428			dw_hdmi0_snd_in: endpoint {
 429				remote-endpoint = <&rsnd_endpoint1>;
 430			};
 431		};
 432	};
 433};
 434
 435#ifdef SOC_HAS_HDMI1
 436&hdmi1 {
 437	status = "okay";
 438
 439	ports {
 440		port@1 {
 441			reg = <1>;
 442			rcar_dw_hdmi1_out: endpoint {
 443				remote-endpoint = <&hdmi1_con>;
 444			};
 445		};
 446		port@2 {
 447			reg = <2>;
 448			dw_hdmi1_snd_in: endpoint {
 449				remote-endpoint = <&rsnd_endpoint2>;
 450			};
 451		};
 452	};
 453};
 454
 455&hdmi1_con {
 456	remote-endpoint = <&rcar_dw_hdmi1_out>;
 457};
 458#endif /* SOC_HAS_HDMI1 */
 459
 460&hscif1 {
 461	pinctrl-0 = <&hscif1_pins>;
 462	pinctrl-names = "default";
 463
 464	uart-has-rtscts;
 465	/* Please only enable hscif1 or scif1 */
 466	status = "okay";
 467};
 468
 469&hsusb {
 470	dr_mode = "otg";
 471	status = "okay";
 472};
 473
 474&i2c2 {
 475	pinctrl-0 = <&i2c2_pins>;
 476	pinctrl-names = "default";
 477
 478	status = "okay";
 479
 480	clock-frequency = <100000>;
 481
 482	ak4613: codec@10 {
 483		compatible = "asahi-kasei,ak4613";
 484		#sound-dai-cells = <0>;
 485		reg = <0x10>;
 486		clocks = <&rcar_sound 3>;
 487
 488		asahi-kasei,in1-single-end;
 489		asahi-kasei,in2-single-end;
 490		asahi-kasei,out1-single-end;
 491		asahi-kasei,out2-single-end;
 492		asahi-kasei,out3-single-end;
 493		asahi-kasei,out4-single-end;
 494		asahi-kasei,out5-single-end;
 495		asahi-kasei,out6-single-end;
 496
 497		port {
 498			ak4613_endpoint: endpoint {
 499				remote-endpoint = <&rsnd_endpoint0>;
 500			};
 501		};
 502	};
 503
 504	cs2000: clk_multiplier@4f {
 505		#clock-cells = <0>;
 506		compatible = "cirrus,cs2000-cp";
 507		reg = <0x4f>;
 508		clocks = <&audio_clkout>, <&x12_clk>;
 509		clock-names = "clk_in", "ref_clk";
 510
 511		assigned-clocks = <&cs2000>;
 512		assigned-clock-rates = <24576000>; /* 1/1 divide */
 513	};
 514};
 515
 516&i2c4 {
 517	status = "okay";
 518
 519	pca9654: gpio@20 {
 520		compatible = "onnn,pca9654";
 521		reg = <0x20>;
 522		gpio-controller;
 523		#gpio-cells = <2>;
 524	};
 525
 526	video-receiver@70 {
 527		compatible = "adi,adv7482";
 528		reg = <0x70 0x71 0x72 0x73 0x74 0x75
 529		       0x60 0x61 0x62 0x63 0x64 0x65>;
 530		reg-names = "main", "dpll", "cp", "hdmi", "edid", "repeater",
 531			    "infoframe", "cbus", "cec", "sdp", "txa", "txb" ;
 532
 533		interrupts-extended = <&gpio6 30 IRQ_TYPE_LEVEL_LOW>,
 534				      <&gpio6 31 IRQ_TYPE_LEVEL_LOW>;
 535		interrupt-names = "intrq1", "intrq2";
 536
 537		ports {
 538			#address-cells = <1>;
 539			#size-cells = <0>;
 540
 541			port@7 {
 542				reg = <7>;
 543
 544				adv7482_ain7: endpoint {
 545					remote-endpoint = <&cvbs_con>;
 546				};
 547			};
 548
 549			port@8 {
 550				reg = <8>;
 551
 552				adv7482_hdmi: endpoint {
 553					remote-endpoint = <&hdmi_in_con>;
 554				};
 555			};
 556
 557			port@a {
 558				reg = <10>;
 559
 560				adv7482_txa: endpoint {
 561					clock-lanes = <0>;
 562					data-lanes = <1 2 3 4>;
 563					remote-endpoint = <&csi40_in>;
 564				};
 565			};
 566
 567			port@b {
 568				reg = <11>;
 569
 570				adv7482_txb: endpoint {
 571					clock-lanes = <0>;
 572					data-lanes = <1>;
 573					remote-endpoint = <&csi20_in>;
 574				};
 575			};
 576		};
 577	};
 578
 579	csa_vdd: adc@7c {
 580		compatible = "maxim,max9611";
 581		reg = <0x7c>;
 582
 583		shunt-resistor-micro-ohms = <5000>;
 584	};
 585
 586	csa_dvfs: adc@7f {
 587		compatible = "maxim,max9611";
 588		reg = <0x7f>;
 589
 590		shunt-resistor-micro-ohms = <5000>;
 591	};
 592};
 593
 594&i2c_dvfs {
 595	bootph-all;
 596	status = "okay";
 597
 598	clock-frequency = <400000>;
 599
 600	pmic: pmic@30 {
 601		pinctrl-0 = <&irq0_pins>;
 602		pinctrl-names = "default";
 603
 604		compatible = "rohm,bd9571mwv";
 605		reg = <0x30>;
 606		interrupts-extended = <&intc_ex 0 IRQ_TYPE_LEVEL_LOW>;
 607		interrupt-controller;
 608		#interrupt-cells = <2>;
 609		gpio-controller;
 610		#gpio-cells = <2>;
 611		rohm,ddr-backup-power = <0xf>;
 612		rohm,rstbmode-level;
 613
 614		regulators {
 615			dvfs: dvfs {
 616				regulator-name = "dvfs";
 617				regulator-min-microvolt = <750000>;
 618				regulator-max-microvolt = <1030000>;
 619				regulator-boot-on;
 620				regulator-always-on;
 621			};
 622		};
 623	};
 624
 625	eeprom@50 {
 626		compatible = "rohm,br24t01", "atmel,24c01";
 627		reg = <0x50>;
 628		pagesize = <8>;
 629		bootph-all;
 630	};
 631};
 632
 633&ohci0 {
 634	dr_mode = "otg";
 635	status = "okay";
 636};
 637
 638&ohci1 {
 639	status = "okay";
 640};
 641
 642&pcie_bus_clk {
 643	clock-frequency = <100000000>;
 644};
 645
 646&pciec0 {
 647	status = "okay";
 648};
 649
 650&pciec1 {
 651	status = "okay";
 652};
 653
 654&pfc {
 655	pinctrl-0 = <&scif_clk_pins>;
 656	pinctrl-names = "default";
 657
 658	avb_pins: avb {
 659		mux {
 660			groups = "avb_link", "avb_mdio", "avb_mii";
 661			function = "avb";
 662		};
 663
 664		pins_mdio {
 665			groups = "avb_mdio";
 666			drive-strength = <24>;
 667		};
 668
 669		pins_mii_tx {
 670			pins = "PIN_AVB_TX_CTL", "PIN_AVB_TXC", "PIN_AVB_TD0",
 671			       "PIN_AVB_TD1", "PIN_AVB_TD2", "PIN_AVB_TD3";
 672			drive-strength = <12>;
 673		};
 674	};
 675
 676	du_pins: du {
 677		groups = "du_rgb888", "du_sync", "du_oddf", "du_clk_out_0";
 678		function = "du";
 679	};
 680
 681	hscif1_pins: hscif1 {
 682		groups = "hscif1_data_a", "hscif1_ctrl_a";
 683		function = "hscif1";
 684	};
 685
 686	i2c2_pins: i2c2 {
 687		groups = "i2c2_a";
 688		function = "i2c2";
 689	};
 690
 691	irq0_pins: irq0 {
 692		groups = "intc_ex_irq0";
 693		function = "intc_ex";
 694	};
 695
 696	keys_pins: keys {
 697		pins = "GP_5_17", "GP_5_20", "GP_5_22";
 698		bias-pull-up;
 699	};
 700
 701	pwm1_pins: pwm1 {
 702		groups = "pwm1_a";
 703		function = "pwm1";
 704	};
 705
 706	scif1_pins: scif1 {
 707		groups = "scif1_data_a", "scif1_ctrl";
 708		function = "scif1";
 709	};
 710
 711	scif2_pins: scif2 {
 712		groups = "scif2_data_a";
 713		function = "scif2";
 714	};
 715
 716	scif_clk_pins: scif_clk {
 717		groups = "scif_clk_a";
 718		function = "scif_clk";
 719	};
 720
 721	sdhi0_pins: sd0 {
 722		groups = "sdhi0_data4", "sdhi0_ctrl";
 723		function = "sdhi0";
 724		power-source = <3300>;
 725	};
 726
 727	sdhi0_pins_uhs: sd0_uhs {
 728		groups = "sdhi0_data4", "sdhi0_ctrl";
 729		function = "sdhi0";
 730		power-source = <1800>;
 731	};
 732
 733	sdhi2_pins: sd2 {
 734		groups = "sdhi2_data8", "sdhi2_ctrl", "sdhi2_ds";
 735		function = "sdhi2";
 736		power-source = <1800>;
 737	};
 738
 739	sdhi3_pins: sd3 {
 740		groups = "sdhi3_data4", "sdhi3_ctrl";
 741		function = "sdhi3";
 742		power-source = <3300>;
 743	};
 744
 745	sdhi3_pins_uhs: sd3_uhs {
 746		groups = "sdhi3_data4", "sdhi3_ctrl";
 747		function = "sdhi3";
 748		power-source = <1800>;
 749	};
 750
 751	sound_pins: sound {
 752		groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data_a";
 753		function = "ssi";
 754	};
 755
 756	sound_clk_pins: sound_clk {
 757		groups = "audio_clk_a_a", "audio_clk_b_a", "audio_clk_c_a",
 758			 "audio_clkout_a", "audio_clkout3_a";
 759		function = "audio_clk";
 760	};
 761
 762	usb0_pins: usb0 {
 763		groups = "usb0";
 764		function = "usb0";
 765	};
 766
 767	usb1_pins: usb1 {
 768		mux {
 769			groups = "usb1";
 770			function = "usb1";
 771		};
 772
 773		ovc {
 774			pins = "GP_6_27";
 775			bias-pull-up;
 776		};
 777
 778		pwen {
 779			pins = "GP_6_26";
 780			bias-pull-down;
 781		};
 782	};
 783
 784	usb30_pins: usb30 {
 785		groups = "usb30";
 786		function = "usb30";
 787	};
 788};
 789
 790&pwm1 {
 791	pinctrl-0 = <&pwm1_pins>;
 792	pinctrl-names = "default";
 793
 794	status = "okay";
 795};
 796
 797&rcar_sound {
 798	pinctrl-0 = <&sound_pins>, <&sound_clk_pins>;
 799	pinctrl-names = "default";
 800
 801	/* audio_clkout0/1/2/3 */
 802	#clock-cells = <1>;
 803	clock-frequency = <12288000 11289600>;
 804
 805	status = "okay";
 806
 807	/* update <audio_clk_b> to <cs2000> */
 808	clocks = <&cpg CPG_MOD 1005>,
 809		 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
 810		 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
 811		 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
 812		 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
 813		 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
 814		 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
 815		 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
 816		 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
 817		 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
 818		 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
 819		 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
 820		 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
 821		 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
 822		 <&audio_clk_a>, <&cs2000>,
 823		 <&audio_clk_c>,
 824		 <&cpg CPG_MOD 922>;
 825
 826	ports {
 827		#address-cells = <1>;
 828		#size-cells = <0>;
 829		rsnd_port0: port@0 {
 830			reg = <0>;
 831			rsnd_endpoint0: endpoint {
 832				remote-endpoint = <&ak4613_endpoint>;
 833
 834				dai-format = "left_j";
 835				bitclock-master = <&rsnd_endpoint0>;
 836				frame-master = <&rsnd_endpoint0>;
 837
 838				playback = <&ssi0>, <&src0>, <&dvc0>;
 839				capture = <&ssi1>, <&src1>, <&dvc1>;
 840			};
 841		};
 842
 843		rsnd_port1: port@1 {
 844			reg = <1>;
 845			rsnd_endpoint1: endpoint {
 846				remote-endpoint = <&dw_hdmi0_snd_in>;
 847
 848				dai-format = "i2s";
 849				bitclock-master = <&rsnd_endpoint1>;
 850				frame-master = <&rsnd_endpoint1>;
 851
 852				playback = <&ssi2>;
 853			};
 854		};
 855
 856#ifdef SOC_HAS_HDMI1
 857		rsnd_port2: port@2 {
 858			reg = <2>;
 859			rsnd_endpoint2: endpoint {
 860				remote-endpoint = <&dw_hdmi1_snd_in>;
 861
 862				dai-format = "i2s";
 863				bitclock-master = <&rsnd_endpoint2>;
 864				frame-master = <&rsnd_endpoint2>;
 865
 866				playback = <&ssi3>;
 867			};
 868		};
 869#endif /* SOC_HAS_HDMI1 */
 870	};
 871};
 872
 873&rpc {
 874	/* Left disabled.  To be enabled by firmware when unlocked. */
 875
 876	flash@0 {
 877		compatible = "cypress,hyperflash", "cfi-flash";
 878		reg = <0>;
 879
 880		partitions {
 881			compatible = "fixed-partitions";
 882			#address-cells = <1>;
 883			#size-cells = <1>;
 884
 885			bootparam@0 {
 886				reg = <0x00000000 0x040000>;
 887				read-only;
 888			};
 889			bl2@40000 {
 890				reg = <0x00040000 0x140000>;
 891				read-only;
 892			};
 893			cert_header_sa6@180000 {
 894				reg = <0x00180000 0x040000>;
 895				read-only;
 896			};
 897			bl31@1c0000 {
 898				reg = <0x001c0000 0x040000>;
 899				read-only;
 900			};
 901			tee@200000 {
 902				reg = <0x00200000 0x440000>;
 903				read-only;
 904			};
 905			uboot@640000 {
 906				reg = <0x00640000 0x100000>;
 907				read-only;
 908			};
 909			dtb@740000 {
 910				reg = <0x00740000 0x080000>;
 911			};
 912			kernel@7c0000 {
 913				reg = <0x007c0000 0x1400000>;
 914			};
 915			user@1bc0000 {
 916				reg = <0x01bc0000 0x2440000>;
 917			};
 918		};
 919	};
 920};
 921
 922&rwdt {
 923	timeout-sec = <60>;
 924	status = "okay";
 925};
 926
 927#ifdef SOC_HAS_SATA
 928&sata {
 929	status = "okay";
 930};
 931#endif /* SOC_HAS_SATA */
 932
 933&scif1 {
 934	pinctrl-0 = <&scif1_pins>;
 935	pinctrl-names = "default";
 936
 937	uart-has-rtscts;
 938	/* Please only enable hscif1 or scif1 */
 939	/* status = "okay"; */
 940};
 941
 942&scif2 {
 943	pinctrl-0 = <&scif2_pins>;
 944	pinctrl-names = "default";
 945	bootph-all;
 946
 947	status = "okay";
 948};
 949
 950&scif_clk {
 951	clock-frequency = <14745600>;
 952};
 953
 954&sdhi0 {
 955	pinctrl-0 = <&sdhi0_pins>;
 956	pinctrl-1 = <&sdhi0_pins_uhs>;
 957	pinctrl-names = "default", "state_uhs";
 958
 959	vmmc-supply = <&vcc_sdhi0>;
 960	vqmmc-supply = <&vccq_sdhi0>;
 961	cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
 962	wp-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>;
 963	bus-width = <4>;
 964	sd-uhs-sdr50;
 965	sd-uhs-sdr104;
 966	status = "okay";
 967};
 968
 969&sdhi2 {
 970	/* used for on-board 8bit eMMC */
 971	pinctrl-0 = <&sdhi2_pins>;
 972	pinctrl-1 = <&sdhi2_pins>;
 973	pinctrl-names = "default", "state_uhs";
 974
 975	vmmc-supply = <&reg_3p3v>;
 976	vqmmc-supply = <&reg_1p8v>;
 977	bus-width = <8>;
 978	mmc-hs200-1_8v;
 979	mmc-hs400-1_8v;
 980	no-sd;
 981	no-sdio;
 982	non-removable;
 983	fixed-emmc-driver-type = <1>;
 984	full-pwr-cycle-in-suspend;
 985	status = "okay";
 986};
 987
 988&sdhi3 {
 989	pinctrl-0 = <&sdhi3_pins>;
 990	pinctrl-1 = <&sdhi3_pins_uhs>;
 991	pinctrl-names = "default", "state_uhs";
 992
 993	vmmc-supply = <&vcc_sdhi3>;
 994	vqmmc-supply = <&vccq_sdhi3>;
 995	cd-gpios = <&gpio4 15 GPIO_ACTIVE_LOW>;
 996	wp-gpios = <&gpio4 16 GPIO_ACTIVE_HIGH>;
 997	bus-width = <4>;
 998	sd-uhs-sdr50;
 999	sd-uhs-sdr104;
1000	status = "okay";
1001};
1002
1003&ssi1 {
1004	shared-pin;
1005};
1006
1007/* Firmware should reserve it but sadly doesn't */
1008&swdt {
1009	status = "reserved";
1010};
1011
1012&usb_extal_clk {
1013	clock-frequency = <50000000>;
1014};
1015
1016&usb2_phy0 {
1017	pinctrl-0 = <&usb0_pins>;
1018	pinctrl-names = "default";
1019
1020	vbus-supply = <&vbus0_usb2>;
1021	status = "okay";
1022};
1023
1024&usb2_phy1 {
1025	pinctrl-0 = <&usb1_pins>;
1026	pinctrl-names = "default";
1027
1028	status = "okay";
1029};
1030
1031&usb3_peri0 {
1032	phys = <&usb3_phy0>;
1033	phy-names = "usb";
1034
1035	companion = <&xhci0>;
1036
1037	status = "okay";
1038};
1039
1040&usb3_phy0 {
1041	status = "okay";
1042};
1043
1044&usb3s0_clk {
1045	clock-frequency = <100000000>;
1046};
1047
1048&vin0 {
1049	status = "okay";
1050};
1051
1052&vin1 {
1053	status = "okay";
1054};
1055
1056&vin2 {
1057	status = "okay";
1058};
1059
1060&vin3 {
1061	status = "okay";
1062};
1063
1064&vin4 {
1065	status = "okay";
1066};
1067
1068&vin5 {
1069	status = "okay";
1070};
1071
1072&vin6 {
1073	status = "okay";
1074};
1075
1076&vin7 {
1077	status = "okay";
1078};
1079
1080&xhci0 {
1081	pinctrl-0 = <&usb30_pins>;
1082	pinctrl-names = "default";
1083
1084	status = "okay";
1085};
1086
1087#ifdef SOC_HAS_USB2_CH2
1088&ehci2 {
1089	status = "okay";
1090};
1091
1092&ohci2 {
1093	status = "okay";
1094};
1095
1096&pfc {
1097	usb2_pins: usb2 {
1098		groups = "usb2";
1099		function = "usb2";
1100	};
1101};
1102
1103&usb2_phy2 {
1104	pinctrl-0 = <&usb2_pins>;
1105	pinctrl-names = "default";
1106
1107	status = "okay";
1108};
1109#endif /* SOC_HAS_USB2_CH2 */