rzt2h-n2h-evk-common.dtsi

  1// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
  2/*
  3 * Common Device Tree Source for the RZ/T2H and RZ/N2H EVK boards.
  4 *
  5 * Copyright (C) 2025 Renesas Electronics Corp.
  6 */
  7
  8#include <dt-bindings/gpio/gpio.h>
  9#include <dt-bindings/leds/common.h>
 10#include <dt-bindings/net/mscc-phy-vsc8531.h>
 11#include <dt-bindings/net/renesas,r9a09g077-pcs-miic.h>
 12#include <dt-bindings/pinctrl/renesas,r9a09g077-pinctrl.h>
 13
 14/ {
 15	aliases {
 16		ethernet3 = &gmac1;
 17		ethernet2 = &gmac2;
 18		i2c0 = &i2c0;
 19		i2c1 = &i2c1;
 20		mmc0 = &sdhi0;
 21		mmc1 = &sdhi1;
 22		serial0 = &sci0;
 23	};
 24
 25	chosen {
 26		stdout-path = "serial0:115200n8";
 27	};
 28
 29	reg_1p8v: regulator-1p8v {
 30		compatible = "regulator-fixed";
 31		regulator-name = "fixed-1.8V";
 32		regulator-min-microvolt = <1800000>;
 33		regulator-max-microvolt = <1800000>;
 34		regulator-boot-on;
 35		regulator-always-on;
 36	};
 37
 38	reg_3p3v: regulator-3p3v {
 39		compatible = "regulator-fixed";
 40		regulator-name = "fixed-3.3V";
 41		regulator-min-microvolt = <3300000>;
 42		regulator-max-microvolt = <3300000>;
 43		regulator-boot-on;
 44		regulator-always-on;
 45	};
 46
 47#if SD0_SD
 48	vqmmc_sdhi0: regulator-vqmmc-sdhi0 {
 49		compatible = "regulator-gpio";
 50		regulator-name = "SDHI0 VqmmC";
 51		gpios = <&pinctrl RZT2H_GPIO(2, 6) GPIO_ACTIVE_HIGH>;
 52		regulator-min-microvolt = <1800000>;
 53		regulator-max-microvolt = <3300000>;
 54		gpios-states = <0>;
 55		states = <3300000 0>, <1800000 1>;
 56		regulator-ramp-delay = <60>;
 57	};
 58#endif
 59
 60#if SD1_MICRO_SD
 61	vccq_sdhi1: regulator-vccq-sdhi1 {
 62		compatible = "regulator-gpio";
 63		regulator-name = "SDHI1 VccQ";
 64		regulator-min-microvolt = <1800000>;
 65		regulator-max-microvolt = <3300000>;
 66		gpios = <&pinctrl RZT2H_GPIO(8, 6) GPIO_ACTIVE_HIGH>;
 67		gpios-states = <0>;
 68		states = <3300000 0>, <1800000 1>;
 69	};
 70#endif
 71};
 72
 73&ehci {
 74	dr_mode = "otg";
 75	status = "okay";
 76};
 77
 78&ethss {
 79	status = "okay";
 80
 81	renesas,miic-switch-portin = <ETHSS_GMAC0_PORT>;
 82};
 83
 84&extal_clk {
 85	clock-frequency = <25000000>;
 86};
 87
 88&gmac1 {
 89	pinctrl-0 = <&gmac1_pins>;
 90	pinctrl-names = "default";
 91	phy-handle = <&mdio1_phy>;
 92	phy-mode = "rgmii-id";
 93	pcs-handle = <&mii_conv3>;
 94	status = "okay";
 95};
 96
 97&gmac2 {
 98	pinctrl-0 = <&gmac2_pins>;
 99	pinctrl-names = "default";
100	phy-handle = <&mdio2_phy>;
101	phy-mode = "rgmii-id";
102	pcs-handle = <&mii_conv2>;
103	status = "okay";
104};
105
106&hsusb {
107	dr_mode = "otg";
108	status = "okay";
109};
110
111&i2c0 {
112	eeprom: eeprom@50 {
113		compatible = "renesas,r1ex24016", "atmel,24c16";
114		reg = <0x50>;
115		pagesize = <16>;
116	};
117};
118
119&mdio1 {
120	mdio1_phy: ethernet-phy@3 {
121		compatible = "ethernet-phy-id0007.0772", "ethernet-phy-ieee802.3-c22";
122		reg = <3>;
123		vsc8531,led-0-mode = <VSC8531_ACTIVITY>;
124		vsc8531,led-1-mode = <VSC8531_LINK_ACTIVITY>;
125		reset-assert-us = <2000>;
126		reset-deassert-us = <15000>;
127	};
128};
129
130&mdio2 {
131	mdio2_phy: ethernet-phy@2 {
132		compatible = "ethernet-phy-id0007.0772", "ethernet-phy-ieee802.3-c22";
133		reg = <2>;
134		vsc8531,led-0-mode = <VSC8531_ACTIVITY>;
135		vsc8531,led-1-mode = <VSC8531_LINK_ACTIVITY>;
136		reset-assert-us = <2000>;
137		reset-deassert-us = <15000>;
138	};
139};
140
141&mii_conv0 {
142	renesas,miic-input = <ETHSS_ETHSW_PORT0>;
143	status = "okay";
144};
145
146&mii_conv1 {
147	renesas,miic-input = <ETHSS_ETHSW_PORT1>;
148	status = "okay";
149};
150
151&mii_conv2 {
152	renesas,miic-input = <ETHSS_GMAC2_PORT>;
153	status = "okay";
154};
155
156&mii_conv3 {
157	renesas,miic-input = <ETHSS_GMAC1_PORT>;
158	status = "okay";
159};
160
161&ohci {
162	dr_mode = "otg";
163	status = "okay";
164};
165
166&pinctrl {
167	/*
168	 * SCI0 Pin Configuration:
169	 * ------------------------
170	 * Signal     | Pin     | RZ/T2H (SW4) | RZ/N2H (DSW9)
171	 * -----------|---------|--------------|---------------
172	 * SCI0_RXD   | P27_4   | 5: ON, 6: OFF| 1: ON, 2: OFF
173	 * SCI0_TXD   | P27_5   | 7: ON, 8: OFF| 3: ON, 4: OFF
174	 */
175	sci0_pins: sci0-pins {
176		pinmux = <RZT2H_PORT_PINMUX(27, 4, 0x14)>,
177			 <RZT2H_PORT_PINMUX(27, 5, 0x14)>;
178	};
179
180#if SD0_EMMC
181	sdhi0-emmc-iovs-hog {
182		gpio-hog;
183		gpios = <RZT2H_GPIO(2, 6) GPIO_ACTIVE_HIGH>;
184		output-high;
185		line-name = "SD0_IOVS";
186	};
187#endif
188
189	sdhi0_emmc_pins: sd0-emmc-group {
190		data-pins {
191			pinmux = <RZT2H_PORT_PINMUX(12, 2, 0x29)>, /* SD0_DATA0 */
192				 <RZT2H_PORT_PINMUX(12, 3, 0x29)>, /* SD0_DATA1 */
193				 <RZT2H_PORT_PINMUX(12, 4, 0x29)>, /* SD0_DATA2 */
194				 <RZT2H_PORT_PINMUX(12, 5, 0x29)>, /* SD0_DATA3 */
195				 <RZT2H_PORT_PINMUX(12, 6, 0x29)>, /* SD0_DATA4 */
196				 <RZT2H_PORT_PINMUX(12, 7, 0x29)>, /* SD0_DATA5 */
197				 <RZT2H_PORT_PINMUX(13, 0, 0x29)>, /* SD0_DATA6 */
198				 <RZT2H_PORT_PINMUX(13, 1, 0x29)>; /* SD0_DATA7 */
199		};
200
201		ctrl-pins {
202			pinmux = <RZT2H_PORT_PINMUX(12, 0, 0x29)>, /* SD0_CLK */
203				 <RZT2H_PORT_PINMUX(12, 1, 0x29)>, /* SD0_CMD */
204				 <RZT2H_PORT_PINMUX(13, 2, 0x29)>; /* SD0_RST# */
205		};
206	};
207
208#if SD0_SD
209	sdhi0-pwen-hog {
210		gpio-hog;
211		gpios = <RZT2H_GPIO(2, 5) GPIO_ACTIVE_HIGH>;
212		output-high;
213		line-name = "SD0_PWEN";
214	};
215#endif
216
217	sdhi0_sd_pins: sd0-sd-group {
218		data-pins {
219			pinmux = <RZT2H_PORT_PINMUX(12, 2, 0x29)>, /* SD0_DATA0 */
220				 <RZT2H_PORT_PINMUX(12, 3, 0x29)>, /* SD0_DATA1 */
221				 <RZT2H_PORT_PINMUX(12, 4, 0x29)>, /* SD0_DATA2 */
222				 <RZT2H_PORT_PINMUX(12, 5, 0x29)>; /* SD0_DATA3 */
223		};
224
225		ctrl-pins {
226			pinmux = <RZT2H_PORT_PINMUX(12, 0, 0x29)>, /* SD0_CLK */
227				 <RZT2H_PORT_PINMUX(12, 1, 0x29)>, /* SD0_CMD */
228				 <RZT2H_PORT_PINMUX(22, 5, 0x29)>; /* SD0_CD */
229		};
230	};
231
232#if SD1_MICRO_SD
233	sdhi1-pwen-hog {
234		gpio-hog;
235		gpios = <RZT2H_GPIO(8, 5) GPIO_ACTIVE_HIGH>;
236		output-high;
237		line-name = "SD1_PWEN";
238	};
239#endif
240
241	sdhi1_pins: sd1-group {
242		data-pins {
243			pinmux = <RZT2H_PORT_PINMUX(16, 7, 0x29)>, /* SD1_DATA0 */
244				 <RZT2H_PORT_PINMUX(17, 0, 0x29)>, /* SD1_DATA1 */
245				 <RZT2H_PORT_PINMUX(17, 1, 0x29)>, /* SD1_DATA2 */
246				 <RZT2H_PORT_PINMUX(17, 2, 0x29)>; /* SD1_DATA3 */
247		};
248
249		ctrl-pins {
250			pinmux = <RZT2H_PORT_PINMUX(16, 5, 0x29)>, /* SD1_CLK */
251				 <RZT2H_PORT_PINMUX(16, 6, 0x29)>, /* SD1_CMD */
252				 <RZT2H_PORT_PINMUX(17, 4, 0x29)>; /* SD1_CD */
253		};
254	};
255};
256
257&sci0 {
258	pinctrl-0 = <&sci0_pins>;
259	pinctrl-names = "default";
260	status = "okay";
261};
262
263#if SD0_EMMC
264&sdhi0 {
265	pinctrl-0 = <&sdhi0_emmc_pins>;
266	pinctrl-1 = <&sdhi0_emmc_pins>;
267	pinctrl-names = "default", "state_uhs";
268	vmmc-supply = <&reg_3p3v>;
269	vqmmc-supply = <&reg_1p8v>;
270	bus-width = <8>;
271	non-removable;
272	mmc-hs200-1_8v;
273	fixed-emmc-driver-type = <1>;
274	status = "okay";
275};
276#endif
277
278#if SD0_SD
279&sdhi0 {
280	pinctrl-0 = <&sdhi0_sd_pins>;
281	pinctrl-1 = <&sdhi0_sd_pins>;
282	pinctrl-names = "default", "state_uhs";
283	vmmc-supply = <&reg_3p3v>;
284	vqmmc-supply = <&vqmmc_sdhi0>;
285	wp-gpios = <&pinctrl RZT2H_GPIO(22, 6) GPIO_ACTIVE_HIGH>;
286	bus-width = <4>;
287	sd-uhs-sdr50;
288	sd-uhs-sdr104;
289	status = "okay";
290};
291#endif
292
293#if SD1_MICRO_SD
294&sdhi1 {
295	pinctrl-0 = <&sdhi1_pins>;
296	pinctrl-1 = <&sdhi1_pins>;
297	pinctrl-names = "default", "state_uhs";
298	vmmc-supply = <&reg_3p3v>;
299	vqmmc-supply = <&vccq_sdhi1>;
300	bus-width = <4>;
301	sd-uhs-sdr50;
302	sd-uhs-sdr104;
303	status = "okay";
304};
305#endif
306
307&usb2_phy {
308	pinctrl-0 = <&usb_pins>;
309	pinctrl-names = "default";
310
311	status = "okay";
312};
313
314&wdt2 {
315	status = "okay";
316	timeout-sec = <60>;
317};
318
319/*
320 * ADC0 AN000 can be connected to a potentiometer on the board or
321 * exposed on ADC header.
322 *
323 * T2H:
324 * SW17[1] = ON, SW17[2] = OFF - Potentiometer
325 * SW17[1] = OFF, SW17[2] = ON  - CN41 header
326 * N2H:
327 * DSW6[1] = OFF, DSW6[2] = ON - Potentiometer
328 * DSW6[1] = ON, DSW6[2] = OFF - CN3 header
329 */
330&adc0 {
331	status = "okay";
332
333	channel@0 {
334		reg = <0x0>;
335	};
336
337	channel@1 {
338		reg = <0x1>;
339	};
340
341	channel@2 {
342		reg = <0x2>;
343	};
344
345	channel@3 {
346		reg = <0x3>;
347	};
348};
349
350/*
351 * ADC1 AN100 can be exposed on ADC header or on mikroBUS connector.
352 *
353 * T2H:
354 * SW18[1] = ON, SW18[2] = OFF - CN42 header
355 * SW18[1] = OFF, SW18[2] = ON - mikroBUS
356 * N2H:
357 * DSW6[3] = ON, DSW6[4] = OFF - CN4 header
358 * DSW6[3] = OFF, DSW6[4] = ON - mikroBUS
359 *
360 * ADC1 AN101 can be exposed on ADC header or on Grove2 connector.
361 *
362 * T2H:
363 * SW18[3] = ON, SW18[4] = OFF - CN42 header
364 * SW18[3] = OFF, SW18[4] = ON - Grove2
365 * N2H:
366 * DSW6[5] = ON, DSW6[6] = OFF - CN4 header
367 * DSW6[5] = OFF, DSW6[6] = ON - Grove2
368 *
369 * ADC1 AN102 can be exposed on ADC header or on Grove2 connector.
370 *
371 * T2H:
372 * SW18[5] = ON, SW18[6] = OFF - CN42 header
373 * SW18[5] = OFF, SW18[6] = ON - Grove2
374 * N2H:
375 * DSW6[7] = ON, DSW6[8] = OFF - CN4 header
376 * DSW6[7] = OFF, DSW6[8] = ON - Grove2
377 */
378&adc1 {
379	status = "okay";
380
381	channel@0 {
382		reg = <0x0>;
383	};
384
385	channel@1 {
386		reg = <0x1>;
387	};
388
389	channel@2 {
390		reg = <0x2>;
391	};
392
393	channel@3 {
394		reg = <0x3>;
395	};
396};