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r9a08g045s33-smarc-pmod1-type-3a.dtso
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linux-6.19.14/arch/arm64/boot/dts/renesas/r9a08g045s33-smarc-pmod1-type-3a.dtso
1// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2/* 3 * Device Tree Source for the RZ/G3S SMARC Carrier II EVK PMOD parts 4 * 5 * Copyright (C) 2024 Renesas Electronics Corp. 6 * 7 * 8 * [Connection] 9 * 10 * SMARC Carrier II EVK 11 * +--------------------------------------------+ 12 * |PMOD1_3A (PMOD1 PIN HEADER) | 13 * | SCIF1_CTS# (pin1) (pin7) PMOD1_GPIO10 | 14 * | SCIF1_TXD (pin2) (pin8) PMOD1_GPIO11 | 15 * | SCIF1_RXD (pin3) (pin9) PMOD1_GPIO12 | 16 * | SCIF1_RTS# (pin4) (pin10) PMOD1_GPIO13 | 17 * | GND (pin5) (pin11) GND | 18 * | PWR_PMOD1 (pin6) (pin12) GND | 19 * +--------------------------------------------+ 20 * 21 * The following switches should be set as follows for SCIF1: 22 * - SW_CONFIG2: ON 23 * - SW_OPT_MUX4: ON 24 */ 25 26/dts-v1/; 27/plugin/; 28 29#include <dt-bindings/pinctrl/rzg2l-pinctrl.h> 30#include "rzg3s-smarc-switches.h" 31 32&pinctrl { 33 scif1_pins: scif1-pins { 34 pinmux = <RZG2L_PORT_PINMUX(14, 0, 1)>, /* TXD */ 35 <RZG2L_PORT_PINMUX(14, 1, 1)>, /* RXD */ 36 <RZG2L_PORT_PINMUX(16, 0, 1)>, /* CTS# */ 37 <RZG2L_PORT_PINMUX(16, 1, 1)>; /* RTS# */ 38 }; 39}; 40 41#if SW_CONFIG3 == SW_ON && SW_OPT_MUX4 == SW_ON 42&scif1 { 43 pinctrl-names = "default"; 44 pinctrl-0 = <&scif1_pins>; 45 uart-has-rtscts; 46 status = "okay"; 47}; 48#endif
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