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r8a779g0.dtsi
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linux-6.19.14/arch/arm64/boot/dts/renesas/r8a779g0.dtsi
1// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2/* 3 * Device Tree Source for the R-Car V4H (R8A779G0) SoC 4 * 5 * Copyright (C) 2022 Renesas Electronics Corp. 6 */ 7 8#include <dt-bindings/clock/r8a779g0-cpg-mssr.h> 9#include <dt-bindings/interrupt-controller/arm-gic.h> 10#include <dt-bindings/power/r8a779g0-sysc.h> 11 12/ { 13 compatible = "renesas,r8a779g0"; 14 #address-cells = <2>; 15 #size-cells = <2>; 16 interrupt-parent = <&gic>; 17 18 /* External Audio clock - to be overridden by boards that provide it */ 19 audio_clkin: audio_clkin { 20 compatible = "fixed-clock"; 21 #clock-cells = <0>; 22 clock-frequency = <0>; 23 }; 24 25 /* External CAN clock - to be overridden by boards that provide it */ 26 can_clk: can { 27 compatible = "fixed-clock"; 28 #clock-cells = <0>; 29 clock-frequency = <0>; 30 }; 31 32 cluster0_opp: opp-table-0 { 33 compatible = "operating-points-v2"; 34 opp-shared; 35 36 opp-500000000 { 37 opp-hz = /bits/ 64 <500000000>; 38 opp-microvolt = <825000>; 39 clock-latency-ns = <500000>; 40 }; 41 opp-1000000000 { 42 opp-hz = /bits/ 64 <1000000000>; 43 opp-microvolt = <825000>; 44 clock-latency-ns = <500000>; 45 }; 46 opp-1500000000 { 47 opp-hz = /bits/ 64 <1500000000>; 48 opp-microvolt = <825000>; 49 clock-latency-ns = <500000>; 50 }; 51 opp-1700000000 { 52 opp-hz = /bits/ 64 <1700000000>; 53 opp-microvolt = <825000>; 54 clock-latency-ns = <500000>; 55 opp-suspend; 56 }; 57 opp-1800000000 { 58 opp-hz = /bits/ 64 <1800000000>; 59 opp-microvolt = <880000>; 60 clock-latency-ns = <500000>; 61 turbo-mode; 62 }; 63 }; 64 65 cpus { 66 #address-cells = <1>; 67 #size-cells = <0>; 68 69 cpu-map { 70 cluster0 { 71 core0 { 72 cpu = <&a76_0>; 73 }; 74 core1 { 75 cpu = <&a76_1>; 76 }; 77 }; 78 79 cluster1 { 80 core0 { 81 cpu = <&a76_2>; 82 }; 83 core1 { 84 cpu = <&a76_3>; 85 }; 86 }; 87 }; 88 89 a76_0: cpu@0 { 90 compatible = "arm,cortex-a76"; 91 reg = <0>; 92 device_type = "cpu"; 93 power-domains = <&sysc R8A779G0_PD_A1E0D0C0>; 94 next-level-cache = <&L3_CA76_0>; 95 enable-method = "psci"; 96 cpu-idle-states = <&CPU_SLEEP_0>; 97 clocks = <&cpg CPG_CORE R8A779G0_CLK_Z0>; 98 operating-points-v2 = <&cluster0_opp>; 99 }; 100 101 a76_1: cpu@100 { 102 compatible = "arm,cortex-a76"; 103 reg = <0x100>; 104 device_type = "cpu"; 105 power-domains = <&sysc R8A779G0_PD_A1E0D0C1>; 106 next-level-cache = <&L3_CA76_0>; 107 enable-method = "psci"; 108 cpu-idle-states = <&CPU_SLEEP_0>; 109 clocks = <&cpg CPG_CORE R8A779G0_CLK_Z0>; 110 operating-points-v2 = <&cluster0_opp>; 111 }; 112 113 a76_2: cpu@10000 { 114 compatible = "arm,cortex-a76"; 115 reg = <0x10000>; 116 device_type = "cpu"; 117 power-domains = <&sysc R8A779G0_PD_A1E0D1C0>; 118 next-level-cache = <&L3_CA76_1>; 119 enable-method = "psci"; 120 cpu-idle-states = <&CPU_SLEEP_0>; 121 clocks = <&cpg CPG_CORE R8A779G0_CLK_Z0>; 122 operating-points-v2 = <&cluster0_opp>; 123 }; 124 125 a76_3: cpu@10100 { 126 compatible = "arm,cortex-a76"; 127 reg = <0x10100>; 128 device_type = "cpu"; 129 power-domains = <&sysc R8A779G0_PD_A1E0D1C1>; 130 next-level-cache = <&L3_CA76_1>; 131 enable-method = "psci"; 132 cpu-idle-states = <&CPU_SLEEP_0>; 133 clocks = <&cpg CPG_CORE R8A779G0_CLK_Z0>; 134 operating-points-v2 = <&cluster0_opp>; 135 }; 136 137 idle-states { 138 entry-method = "psci"; 139 140 CPU_SLEEP_0: cpu-sleep-0 { 141 compatible = "arm,idle-state"; 142 arm,psci-suspend-param = <0x0010000>; 143 local-timer-stop; 144 entry-latency-us = <400>; 145 exit-latency-us = <500>; 146 min-residency-us = <4000>; 147 }; 148 }; 149 150 L3_CA76_0: cache-controller-0 { 151 compatible = "cache"; 152 power-domains = <&sysc R8A779G0_PD_A2E0D0>; 153 cache-unified; 154 cache-level = <3>; 155 }; 156 157 L3_CA76_1: cache-controller-1 { 158 compatible = "cache"; 159 power-domains = <&sysc R8A779G0_PD_A2E0D1>; 160 cache-unified; 161 cache-level = <3>; 162 }; 163 }; 164 165 extal_clk: extal { 166 compatible = "fixed-clock"; 167 #clock-cells = <0>; 168 /* This value must be overridden by the board */ 169 clock-frequency = <0>; 170 bootph-all; 171 }; 172 173 extalr_clk: extalr { 174 compatible = "fixed-clock"; 175 #clock-cells = <0>; 176 /* This value must be overridden by the board */ 177 clock-frequency = <0>; 178 bootph-all; 179 }; 180 181 pcie0_clkref: pcie0-clkref { 182 compatible = "fixed-clock"; 183 #clock-cells = <0>; 184 /* This value must be overridden by the board */ 185 clock-frequency = <0>; 186 }; 187 188 pcie1_clkref: pcie1-clkref { 189 compatible = "fixed-clock"; 190 #clock-cells = <0>; 191 /* This value must be overridden by the board */ 192 clock-frequency = <0>; 193 }; 194 195 pmu_a76 { 196 compatible = "arm,cortex-a76-pmu"; 197 interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>; 198 }; 199 200 psci { 201 compatible = "arm,psci-1.0", "arm,psci-0.2"; 202 method = "smc"; 203 }; 204 205 /* External SCIF clocks - to be overridden by boards that provide them */ 206 scif_clk: scif { 207 compatible = "fixed-clock"; 208 #clock-cells = <0>; 209 clock-frequency = <0>; 210 }; 211 212 scif_clk2: scif2 { 213 compatible = "fixed-clock"; 214 #clock-cells = <0>; 215 clock-frequency = <0>; 216 }; 217 218 soc: soc { 219 compatible = "simple-bus"; 220 bootph-all; 221 222 #address-cells = <2>; 223 #size-cells = <2>; 224 ranges; 225 226 rwdt: watchdog@e6020000 { 227 compatible = "renesas,r8a779g0-wdt", 228 "renesas,rcar-gen4-wdt"; 229 reg = <0 0xe6020000 0 0x0c>; 230 interrupts = <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>; 231 clocks = <&cpg CPG_MOD 907>; 232 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 233 resets = <&cpg 907>; 234 status = "disabled"; 235 }; 236 237 swdt: watchdog@e6030000 { 238 compatible = "renesas,r8a779g0-wdt", "renesas,rcar-gen4-wdt"; 239 reg = <0 0xe6030000 0 0x0c>; 240 interrupts = <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>; 241 clocks = <&cpg CPG_CORE R8A779G0_CLK_OSC>; 242 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 243 resets = <&cpg 1128>; 244 status = "disabled"; 245 }; 246 247 pfc: pinctrl@e6050000 { 248 compatible = "renesas,pfc-r8a779g0"; 249 reg = <0 0xe6050000 0 0x16c>, <0 0xe6050800 0 0x16c>, 250 <0 0xe6058000 0 0x16c>, <0 0xe6058800 0 0x16c>, 251 <0 0xe6060000 0 0x16c>, <0 0xe6060800 0 0x16c>, 252 <0 0xe6061000 0 0x16c>, <0 0xe6061800 0 0x16c>, 253 <0 0xe6068000 0 0x16c>; 254 bootph-all; 255 }; 256 257 gpio0: gpio@e6050180 { 258 compatible = "renesas,gpio-r8a779g0", 259 "renesas,rcar-gen4-gpio"; 260 reg = <0 0xe6050180 0 0x54>; 261 interrupts = <GIC_SPI 619 IRQ_TYPE_LEVEL_HIGH>; 262 clocks = <&cpg CPG_MOD 915>; 263 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 264 resets = <&cpg 915>; 265 gpio-controller; 266 #gpio-cells = <2>; 267 gpio-ranges = <&pfc 0 0 19>; 268 interrupt-controller; 269 #interrupt-cells = <2>; 270 }; 271 272 gpio1: gpio@e6050980 { 273 compatible = "renesas,gpio-r8a779g0", 274 "renesas,rcar-gen4-gpio"; 275 reg = <0 0xe6050980 0 0x54>; 276 interrupts = <GIC_SPI 623 IRQ_TYPE_LEVEL_HIGH>; 277 clocks = <&cpg CPG_MOD 915>; 278 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 279 resets = <&cpg 915>; 280 gpio-controller; 281 #gpio-cells = <2>; 282 gpio-ranges = <&pfc 0 32 29>; 283 interrupt-controller; 284 #interrupt-cells = <2>; 285 }; 286 287 gpio2: gpio@e6058180 { 288 compatible = "renesas,gpio-r8a779g0", 289 "renesas,rcar-gen4-gpio"; 290 reg = <0 0xe6058180 0 0x54>; 291 interrupts = <GIC_SPI 627 IRQ_TYPE_LEVEL_HIGH>; 292 clocks = <&cpg CPG_MOD 916>; 293 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 294 resets = <&cpg 916>; 295 gpio-controller; 296 #gpio-cells = <2>; 297 gpio-ranges = <&pfc 0 64 20>; 298 interrupt-controller; 299 #interrupt-cells = <2>; 300 }; 301 302 gpio3: gpio@e6058980 { 303 compatible = "renesas,gpio-r8a779g0", 304 "renesas,rcar-gen4-gpio"; 305 reg = <0 0xe6058980 0 0x54>; 306 interrupts = <GIC_SPI 631 IRQ_TYPE_LEVEL_HIGH>; 307 clocks = <&cpg CPG_MOD 916>; 308 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 309 resets = <&cpg 916>; 310 gpio-controller; 311 #gpio-cells = <2>; 312 gpio-ranges = <&pfc 0 96 30>; 313 interrupt-controller; 314 #interrupt-cells = <2>; 315 }; 316 317 gpio4: gpio@e6060180 { 318 compatible = "renesas,gpio-r8a779g0", 319 "renesas,rcar-gen4-gpio"; 320 reg = <0 0xe6060180 0 0x54>; 321 interrupts = <GIC_SPI 635 IRQ_TYPE_LEVEL_HIGH>; 322 clocks = <&cpg CPG_MOD 917>; 323 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 324 resets = <&cpg 917>; 325 gpio-controller; 326 #gpio-cells = <2>; 327 gpio-ranges = <&pfc 0 128 25>; 328 interrupt-controller; 329 #interrupt-cells = <2>; 330 }; 331 332 gpio5: gpio@e6060980 { 333 compatible = "renesas,gpio-r8a779g0", 334 "renesas,rcar-gen4-gpio"; 335 reg = <0 0xe6060980 0 0x54>; 336 interrupts = <GIC_SPI 639 IRQ_TYPE_LEVEL_HIGH>; 337 clocks = <&cpg CPG_MOD 917>; 338 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 339 resets = <&cpg 917>; 340 gpio-controller; 341 #gpio-cells = <2>; 342 gpio-ranges = <&pfc 0 160 21>; 343 interrupt-controller; 344 #interrupt-cells = <2>; 345 }; 346 347 gpio6: gpio@e6061180 { 348 compatible = "renesas,gpio-r8a779g0", 349 "renesas,rcar-gen4-gpio"; 350 reg = <0 0xe6061180 0 0x54>; 351 interrupts = <GIC_SPI 643 IRQ_TYPE_LEVEL_HIGH>; 352 clocks = <&cpg CPG_MOD 917>; 353 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 354 resets = <&cpg 917>; 355 gpio-controller; 356 #gpio-cells = <2>; 357 gpio-ranges = <&pfc 0 192 21>; 358 interrupt-controller; 359 #interrupt-cells = <2>; 360 }; 361 362 gpio7: gpio@e6061980 { 363 compatible = "renesas,gpio-r8a779g0", 364 "renesas,rcar-gen4-gpio"; 365 reg = <0 0xe6061980 0 0x54>; 366 interrupts = <GIC_SPI 647 IRQ_TYPE_LEVEL_HIGH>; 367 clocks = <&cpg CPG_MOD 917>; 368 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 369 resets = <&cpg 917>; 370 gpio-controller; 371 #gpio-cells = <2>; 372 gpio-ranges = <&pfc 0 224 21>; 373 interrupt-controller; 374 #interrupt-cells = <2>; 375 }; 376 377 gpio8: gpio@e6068180 { 378 compatible = "renesas,gpio-r8a779g0", 379 "renesas,rcar-gen4-gpio"; 380 reg = <0 0xe6068180 0 0x54>; 381 interrupts = <GIC_SPI 651 IRQ_TYPE_LEVEL_HIGH>; 382 clocks = <&cpg CPG_MOD 918>; 383 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 384 resets = <&cpg 918>; 385 gpio-controller; 386 #gpio-cells = <2>; 387 gpio-ranges = <&pfc 0 256 14>; 388 interrupt-controller; 389 #interrupt-cells = <2>; 390 }; 391 392 cmt0: timer@e60f0000 { 393 compatible = "renesas,r8a779g0-cmt0", 394 "renesas,rcar-gen4-cmt0"; 395 reg = <0 0xe60f0000 0 0x1004>; 396 interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>, 397 <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>; 398 clocks = <&cpg CPG_MOD 910>; 399 clock-names = "fck"; 400 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 401 resets = <&cpg 910>; 402 status = "disabled"; 403 }; 404 405 cmt1: timer@e6130000 { 406 compatible = "renesas,r8a779g0-cmt1", 407 "renesas,rcar-gen4-cmt1"; 408 reg = <0 0xe6130000 0 0x1004>; 409 interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>, 410 <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>, 411 <GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>, 412 <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>, 413 <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>, 414 <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>, 415 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>, 416 <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>; 417 clocks = <&cpg CPG_MOD 911>; 418 clock-names = "fck"; 419 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 420 resets = <&cpg 911>; 421 status = "disabled"; 422 }; 423 424 cmt2: timer@e6140000 { 425 compatible = "renesas,r8a779g0-cmt1", 426 "renesas,rcar-gen4-cmt1"; 427 reg = <0 0xe6140000 0 0x1004>; 428 interrupts = <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>, 429 <GIC_SPI 271 IRQ_TYPE_LEVEL_HIGH>, 430 <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>, 431 <GIC_SPI 273 IRQ_TYPE_LEVEL_HIGH>, 432 <GIC_SPI 274 IRQ_TYPE_LEVEL_HIGH>, 433 <GIC_SPI 275 IRQ_TYPE_LEVEL_HIGH>, 434 <GIC_SPI 276 IRQ_TYPE_LEVEL_HIGH>, 435 <GIC_SPI 277 IRQ_TYPE_LEVEL_HIGH>; 436 clocks = <&cpg CPG_MOD 912>; 437 clock-names = "fck"; 438 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 439 resets = <&cpg 912>; 440 status = "disabled"; 441 }; 442 443 cmt3: timer@e6148000 { 444 compatible = "renesas,r8a779g0-cmt1", 445 "renesas,rcar-gen4-cmt1"; 446 reg = <0 0xe6148000 0 0x1004>; 447 interrupts = <GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH>, 448 <GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH>, 449 <GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH>, 450 <GIC_SPI 281 IRQ_TYPE_LEVEL_HIGH>, 451 <GIC_SPI 282 IRQ_TYPE_LEVEL_HIGH>, 452 <GIC_SPI 283 IRQ_TYPE_LEVEL_HIGH>, 453 <GIC_SPI 284 IRQ_TYPE_LEVEL_HIGH>, 454 <GIC_SPI 285 IRQ_TYPE_LEVEL_HIGH>; 455 clocks = <&cpg CPG_MOD 913>; 456 clock-names = "fck"; 457 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 458 resets = <&cpg 913>; 459 status = "disabled"; 460 }; 461 462 cpg: clock-controller@e6150000 { 463 compatible = "renesas,r8a779g0-cpg-mssr"; 464 reg = <0 0xe6150000 0 0x4000>; 465 clocks = <&extal_clk>, <&extalr_clk>; 466 clock-names = "extal", "extalr"; 467 #clock-cells = <2>; 468 #power-domain-cells = <0>; 469 #reset-cells = <1>; 470 bootph-all; 471 }; 472 473 rst: reset-controller@e6160000 { 474 compatible = "renesas,r8a779g0-rst"; 475 reg = <0 0xe6160000 0 0x4000>; 476 bootph-all; 477 }; 478 479 sysc: system-controller@e6180000 { 480 compatible = "renesas,r8a779g0-sysc"; 481 reg = <0 0xe6180000 0 0x4000>; 482 #power-domain-cells = <1>; 483 }; 484 485 tsc: thermal@e6198000 { 486 compatible = "renesas,r8a779g0-thermal"; 487 reg = <0 0xe6198000 0 0x200>, 488 <0 0xe61a0000 0 0x200>, 489 <0 0xe61a8000 0 0x200>, 490 <0 0xe61b0000 0 0x200>; 491 clocks = <&cpg CPG_MOD 919>; 492 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 493 resets = <&cpg 919>; 494 #thermal-sensor-cells = <1>; 495 }; 496 497 otp: otp@e61be000 { 498 compatible = "renesas,r8a779g0-otp"; 499 reg = <0 0xe61be000 0 0x1000>, <0 0xe61bf000 0 0x1000>; 500 }; 501 502 intc_ex: interrupt-controller@e61c0000 { 503 compatible = "renesas,intc-ex-r8a779g0", "renesas,irqc"; 504 #interrupt-cells = <2>; 505 interrupt-controller; 506 reg = <0 0xe61c0000 0 0x200>; 507 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, 508 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, 509 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, 510 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, 511 <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>, 512 <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 513 clocks = <&cpg CPG_MOD 611>; 514 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 515 resets = <&cpg 611>; 516 }; 517 518 tmu0: timer@e61e0000 { 519 compatible = "renesas,tmu-r8a779g0", "renesas,tmu"; 520 reg = <0 0xe61e0000 0 0x30>; 521 interrupts = <GIC_SPI 289 IRQ_TYPE_LEVEL_HIGH>, 522 <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>, 523 <GIC_SPI 291 IRQ_TYPE_LEVEL_HIGH>; 524 interrupt-names = "tuni0", "tuni1", "tuni2"; 525 clocks = <&cpg CPG_MOD 713>; 526 clock-names = "fck"; 527 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 528 resets = <&cpg 713>; 529 status = "disabled"; 530 }; 531 532 tmu1: timer@e6fc0000 { 533 compatible = "renesas,tmu-r8a779g0", "renesas,tmu"; 534 reg = <0 0xe6fc0000 0 0x30>; 535 interrupts = <GIC_SPI 292 IRQ_TYPE_LEVEL_HIGH>, 536 <GIC_SPI 293 IRQ_TYPE_LEVEL_HIGH>, 537 <GIC_SPI 294 IRQ_TYPE_LEVEL_HIGH>, 538 <GIC_SPI 295 IRQ_TYPE_LEVEL_HIGH>; 539 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2"; 540 clocks = <&cpg CPG_MOD 714>; 541 clock-names = "fck"; 542 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 543 resets = <&cpg 714>; 544 status = "disabled"; 545 }; 546 547 tmu2: timer@e6fd0000 { 548 compatible = "renesas,tmu-r8a779g0", "renesas,tmu"; 549 reg = <0 0xe6fd0000 0 0x30>; 550 interrupts = <GIC_SPI 296 IRQ_TYPE_LEVEL_HIGH>, 551 <GIC_SPI 297 IRQ_TYPE_LEVEL_HIGH>, 552 <GIC_SPI 298 IRQ_TYPE_LEVEL_HIGH>, 553 <GIC_SPI 299 IRQ_TYPE_LEVEL_HIGH>; 554 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2"; 555 clocks = <&cpg CPG_MOD 715>; 556 clock-names = "fck"; 557 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 558 resets = <&cpg 715>; 559 status = "disabled"; 560 }; 561 562 tmu3: timer@e6fe0000 { 563 compatible = "renesas,tmu-r8a779g0", "renesas,tmu"; 564 reg = <0 0xe6fe0000 0 0x30>; 565 interrupts = <GIC_SPI 300 IRQ_TYPE_LEVEL_HIGH>, 566 <GIC_SPI 301 IRQ_TYPE_LEVEL_HIGH>, 567 <GIC_SPI 302 IRQ_TYPE_LEVEL_HIGH>, 568 <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>; 569 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2"; 570 clocks = <&cpg CPG_MOD 716>; 571 clock-names = "fck"; 572 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 573 resets = <&cpg 716>; 574 status = "disabled"; 575 }; 576 577 tmu4: timer@ffc00000 { 578 compatible = "renesas,tmu-r8a779g0", "renesas,tmu"; 579 reg = <0 0xffc00000 0 0x30>; 580 interrupts = <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>, 581 <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>, 582 <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>, 583 <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>; 584 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2"; 585 clocks = <&cpg CPG_MOD 717>; 586 clock-names = "fck"; 587 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 588 resets = <&cpg 717>; 589 status = "disabled"; 590 }; 591 592 tsn0: ethernet@e6460000 { 593 compatible = "renesas,r8a779g0-ethertsn", "renesas,rcar-gen4-ethertsn"; 594 reg = <0 0xe6460000 0 0x7000>, 595 <0 0xe6449000 0 0x500>; 596 reg-names = "tsnes", "gptp"; 597 interrupts = <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>, 598 <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>; 599 interrupt-names = "tx", "rx"; 600 clocks = <&cpg CPG_MOD 2723>; 601 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 602 resets = <&cpg 2723>; 603 status = "disabled"; 604 }; 605 606 i2c0: i2c@e6500000 { 607 compatible = "renesas,i2c-r8a779g0", 608 "renesas,rcar-gen4-i2c"; 609 reg = <0 0xe6500000 0 0x40>; 610 interrupts = <GIC_SPI 610 IRQ_TYPE_LEVEL_HIGH>; 611 clocks = <&cpg CPG_MOD 518>; 612 dmas = <&dmac0 0x91>, <&dmac0 0x90>, 613 <&dmac1 0x91>, <&dmac1 0x90>; 614 dma-names = "tx", "rx", "tx", "rx"; 615 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 616 resets = <&cpg 518>; 617 i2c-scl-internal-delay-ns = <110>; 618 #address-cells = <1>; 619 #size-cells = <0>; 620 status = "disabled"; 621 }; 622 623 i2c1: i2c@e6508000 { 624 compatible = "renesas,i2c-r8a779g0", 625 "renesas,rcar-gen4-i2c"; 626 reg = <0 0xe6508000 0 0x40>; 627 interrupts = <GIC_SPI 611 IRQ_TYPE_LEVEL_HIGH>; 628 clocks = <&cpg CPG_MOD 519>; 629 dmas = <&dmac0 0x93>, <&dmac0 0x92>, 630 <&dmac1 0x93>, <&dmac1 0x92>; 631 dma-names = "tx", "rx", "tx", "rx"; 632 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 633 resets = <&cpg 519>; 634 i2c-scl-internal-delay-ns = <110>; 635 #address-cells = <1>; 636 #size-cells = <0>; 637 status = "disabled"; 638 }; 639 640 i2c2: i2c@e6510000 { 641 compatible = "renesas,i2c-r8a779g0", 642 "renesas,rcar-gen4-i2c"; 643 reg = <0 0xe6510000 0 0x40>; 644 interrupts = <GIC_SPI 612 IRQ_TYPE_LEVEL_HIGH>; 645 clocks = <&cpg CPG_MOD 520>; 646 dmas = <&dmac0 0x95>, <&dmac0 0x94>, 647 <&dmac1 0x95>, <&dmac1 0x94>; 648 dma-names = "tx", "rx", "tx", "rx"; 649 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 650 resets = <&cpg 520>; 651 i2c-scl-internal-delay-ns = <110>; 652 #address-cells = <1>; 653 #size-cells = <0>; 654 status = "disabled"; 655 }; 656 657 i2c3: i2c@e66d0000 { 658 compatible = "renesas,i2c-r8a779g0", 659 "renesas,rcar-gen4-i2c"; 660 reg = <0 0xe66d0000 0 0x40>; 661 interrupts = <GIC_SPI 613 IRQ_TYPE_LEVEL_HIGH>; 662 clocks = <&cpg CPG_MOD 521>; 663 dmas = <&dmac0 0x97>, <&dmac0 0x96>, 664 <&dmac1 0x97>, <&dmac1 0x96>; 665 dma-names = "tx", "rx", "tx", "rx"; 666 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 667 resets = <&cpg 521>; 668 i2c-scl-internal-delay-ns = <110>; 669 #address-cells = <1>; 670 #size-cells = <0>; 671 status = "disabled"; 672 }; 673 674 i2c4: i2c@e66d8000 { 675 compatible = "renesas,i2c-r8a779g0", 676 "renesas,rcar-gen4-i2c"; 677 reg = <0 0xe66d8000 0 0x40>; 678 interrupts = <GIC_SPI 614 IRQ_TYPE_LEVEL_HIGH>; 679 clocks = <&cpg CPG_MOD 522>; 680 dma-names = "tx", "rx", "tx", "rx"; 681 dmas = <&dmac0 0x99>, <&dmac0 0x98>, 682 <&dmac1 0x99>, <&dmac1 0x98>; 683 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 684 resets = <&cpg 522>; 685 i2c-scl-internal-delay-ns = <110>; 686 #address-cells = <1>; 687 #size-cells = <0>; 688 status = "disabled"; 689 }; 690 691 i2c5: i2c@e66e0000 { 692 compatible = "renesas,i2c-r8a779g0", 693 "renesas,rcar-gen4-i2c"; 694 reg = <0 0xe66e0000 0 0x40>; 695 interrupts = <GIC_SPI 615 IRQ_TYPE_LEVEL_HIGH>; 696 clocks = <&cpg CPG_MOD 523>; 697 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>, 698 <&dmac1 0x9b>, <&dmac1 0x9a>; 699 dma-names = "tx", "rx", "tx", "rx"; 700 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 701 resets = <&cpg 523>; 702 i2c-scl-internal-delay-ns = <110>; 703 #address-cells = <1>; 704 #size-cells = <0>; 705 status = "disabled"; 706 }; 707 708 hscif0: serial@e6540000 { 709 compatible = "renesas,hscif-r8a779g0", 710 "renesas,rcar-gen4-hscif", "renesas,hscif"; 711 reg = <0 0xe6540000 0 0x60>; 712 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; 713 clocks = <&cpg CPG_MOD 514>, 714 <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>, 715 <&scif_clk>; 716 clock-names = "fck", "brg_int", "scif_clk"; 717 dmas = <&dmac0 0x31>, <&dmac0 0x30>, 718 <&dmac1 0x31>, <&dmac1 0x30>; 719 dma-names = "tx", "rx", "tx", "rx"; 720 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 721 resets = <&cpg 514>; 722 status = "disabled"; 723 }; 724 725 hscif1: serial@e6550000 { 726 compatible = "renesas,hscif-r8a779g0", 727 "renesas,rcar-gen4-hscif", "renesas,hscif"; 728 reg = <0 0xe6550000 0 0x60>; 729 interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>; 730 clocks = <&cpg CPG_MOD 515>, 731 <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>, 732 <&scif_clk>; 733 clock-names = "fck", "brg_int", "scif_clk"; 734 dmas = <&dmac0 0x33>, <&dmac0 0x32>, 735 <&dmac1 0x33>, <&dmac1 0x32>; 736 dma-names = "tx", "rx", "tx", "rx"; 737 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 738 resets = <&cpg 515>; 739 status = "disabled"; 740 }; 741 742 hscif2: serial@e6560000 { 743 compatible = "renesas,hscif-r8a779g0", 744 "renesas,rcar-gen4-hscif", "renesas,hscif"; 745 reg = <0 0xe6560000 0 0x60>; 746 interrupts = <GIC_SPI 248 IRQ_TYPE_LEVEL_HIGH>; 747 clocks = <&cpg CPG_MOD 516>, 748 <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>, 749 <&scif_clk2>; 750 clock-names = "fck", "brg_int", "scif_clk"; 751 dmas = <&dmac0 0x35>, <&dmac0 0x34>, 752 <&dmac1 0x35>, <&dmac1 0x34>; 753 dma-names = "tx", "rx", "tx", "rx"; 754 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 755 resets = <&cpg 516>; 756 status = "disabled"; 757 }; 758 759 hscif3: serial@e66a0000 { 760 compatible = "renesas,hscif-r8a779g0", 761 "renesas,rcar-gen4-hscif", "renesas,hscif"; 762 reg = <0 0xe66a0000 0 0x60>; 763 interrupts = <GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH>; 764 clocks = <&cpg CPG_MOD 517>, 765 <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>, 766 <&scif_clk>; 767 clock-names = "fck", "brg_int", "scif_clk"; 768 dmas = <&dmac0 0x37>, <&dmac0 0x36>, 769 <&dmac1 0x37>, <&dmac1 0x36>; 770 dma-names = "tx", "rx", "tx", "rx"; 771 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 772 resets = <&cpg 517>; 773 status = "disabled"; 774 }; 775 776 pciec0: pcie@e65d0000 { 777 compatible = "renesas,r8a779g0-pcie", 778 "renesas,rcar-gen4-pcie"; 779 reg = <0 0xe65d0000 0 0x1000>, <0 0xe65d2000 0 0x0800>, 780 <0 0xe65d3000 0 0x2000>, <0 0xe65d5000 0 0x1200>, 781 <0 0xe65d6200 0 0x0e00>, <0 0xe65d7000 0 0x0400>, 782 <0 0xfe000000 0 0x400000>; 783 reg-names = "dbi", "dbi2", "atu", "dma", "app", "phy", "config"; 784 interrupts = <GIC_SPI 449 IRQ_TYPE_LEVEL_HIGH>, 785 <GIC_SPI 450 IRQ_TYPE_LEVEL_HIGH>, 786 <GIC_SPI 451 IRQ_TYPE_LEVEL_HIGH>, 787 <GIC_SPI 455 IRQ_TYPE_LEVEL_HIGH>; 788 interrupt-names = "msi", "dma", "sft_ce", "app"; 789 clocks = <&cpg CPG_MOD 624>, <&pcie0_clkref>; 790 clock-names = "core", "ref"; 791 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 792 resets = <&cpg 624>; 793 reset-names = "pwr"; 794 max-link-speed = <4>; 795 num-lanes = <2>; 796 #address-cells = <3>; 797 #size-cells = <2>; 798 bus-range = <0x00 0xff>; 799 device_type = "pci"; 800 ranges = <0x01000000 0 0x00000000 0 0xfe000000 0 0x00400000>, 801 <0x02000000 0 0x30000000 0 0x30000000 0 0x10000000>; 802 dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>; 803 #interrupt-cells = <1>; 804 interrupt-map-mask = <0 0 0 7>; 805 interrupt-map = <0 0 0 1 &gic GIC_SPI 449 IRQ_TYPE_LEVEL_HIGH>, 806 <0 0 0 2 &gic GIC_SPI 449 IRQ_TYPE_LEVEL_HIGH>, 807 <0 0 0 3 &gic GIC_SPI 449 IRQ_TYPE_LEVEL_HIGH>, 808 <0 0 0 4 &gic GIC_SPI 449 IRQ_TYPE_LEVEL_HIGH>; 809 snps,enable-cdm-check; 810 status = "disabled"; 811 812 /* PCIe bridge, Root Port */ 813 pciec0_rp: pci@0,0 { 814 #address-cells = <3>; 815 #size-cells = <2>; 816 reg = <0x0 0x0 0x0 0x0 0x0>; 817 compatible = "pciclass,0604"; 818 device_type = "pci"; 819 ranges; 820 }; 821 }; 822 823 pciec1: pcie@e65d8000 { 824 compatible = "renesas,r8a779g0-pcie", 825 "renesas,rcar-gen4-pcie"; 826 reg = <0 0xe65d8000 0 0x1000>, <0 0xe65da000 0 0x0800>, 827 <0 0xe65db000 0 0x2000>, <0 0xe65dd000 0 0x1200>, 828 <0 0xe65de200 0 0x0e00>, <0 0xe65df000 0 0x0400>, 829 <0 0xee900000 0 0x400000>; 830 reg-names = "dbi", "dbi2", "atu", "dma", "app", "phy", "config"; 831 interrupts = <GIC_SPI 456 IRQ_TYPE_LEVEL_HIGH>, 832 <GIC_SPI 457 IRQ_TYPE_LEVEL_HIGH>, 833 <GIC_SPI 458 IRQ_TYPE_LEVEL_HIGH>, 834 <GIC_SPI 462 IRQ_TYPE_LEVEL_HIGH>; 835 interrupt-names = "msi", "dma", "sft_ce", "app"; 836 clocks = <&cpg CPG_MOD 625>, <&pcie1_clkref>; 837 clock-names = "core", "ref"; 838 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 839 resets = <&cpg 625>; 840 reset-names = "pwr"; 841 max-link-speed = <4>; 842 num-lanes = <2>; 843 #address-cells = <3>; 844 #size-cells = <2>; 845 bus-range = <0x00 0xff>; 846 device_type = "pci"; 847 ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00400000>, 848 <0x02000000 0 0xc0000000 0 0xc0000000 0 0x10000000>; 849 dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>; 850 #interrupt-cells = <1>; 851 interrupt-map-mask = <0 0 0 7>; 852 interrupt-map = <0 0 0 1 &gic GIC_SPI 456 IRQ_TYPE_LEVEL_HIGH>, 853 <0 0 0 2 &gic GIC_SPI 456 IRQ_TYPE_LEVEL_HIGH>, 854 <0 0 0 3 &gic GIC_SPI 456 IRQ_TYPE_LEVEL_HIGH>, 855 <0 0 0 4 &gic GIC_SPI 456 IRQ_TYPE_LEVEL_HIGH>; 856 snps,enable-cdm-check; 857 status = "disabled"; 858 859 /* PCIe bridge, Root Port */ 860 pciec1_rp: pci@0,0 { 861 #address-cells = <3>; 862 #size-cells = <2>; 863 reg = <0x0 0x0 0x0 0x0 0x0>; 864 compatible = "pciclass,0604"; 865 device_type = "pci"; 866 ranges; 867 }; 868 }; 869 870 pciec0_ep: pcie-ep@e65d0000 { 871 compatible = "renesas,r8a779g0-pcie-ep", 872 "renesas,rcar-gen4-pcie-ep"; 873 reg = <0 0xe65d0000 0 0x2000>, <0 0xe65d2000 0 0x1000>, 874 <0 0xe65d3000 0 0x2000>, <0 0xe65d5000 0 0x1200>, 875 <0 0xe65d6200 0 0x0e00>, <0 0xe65d7000 0 0x0400>, 876 <0 0xfe000000 0 0x400000>; 877 reg-names = "dbi", "dbi2", "atu", "dma", "app", "phy", "addr_space"; 878 interrupts = <GIC_SPI 450 IRQ_TYPE_LEVEL_HIGH>, 879 <GIC_SPI 451 IRQ_TYPE_LEVEL_HIGH>, 880 <GIC_SPI 455 IRQ_TYPE_LEVEL_HIGH>; 881 interrupt-names = "dma", "sft_ce", "app"; 882 clocks = <&cpg CPG_MOD 624>, <&pcie0_clkref>; 883 clock-names = "core", "ref"; 884 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 885 resets = <&cpg 624>; 886 reset-names = "pwr"; 887 max-link-speed = <4>; 888 num-lanes = <2>; 889 max-functions = /bits/ 8 <2>; 890 status = "disabled"; 891 }; 892 893 pciec1_ep: pcie-ep@e65d8000 { 894 compatible = "renesas,r8a779g0-pcie-ep", 895 "renesas,rcar-gen4-pcie-ep"; 896 reg = <0 0xe65d8000 0 0x2000>, <0 0xe65da000 0 0x1000>, 897 <0 0xe65db000 0 0x2000>, <0 0xe65dd000 0 0x1200>, 898 <0 0xe65de200 0 0x0e00>, <0 0xe65df000 0 0x0400>, 899 <0 0xee900000 0 0x400000>; 900 reg-names = "dbi", "dbi2", "atu", "dma", "app", "phy", "addr_space"; 901 interrupts = <GIC_SPI 457 IRQ_TYPE_LEVEL_HIGH>, 902 <GIC_SPI 458 IRQ_TYPE_LEVEL_HIGH>, 903 <GIC_SPI 462 IRQ_TYPE_LEVEL_HIGH>; 904 interrupt-names = "dma", "sft_ce", "app"; 905 clocks = <&cpg CPG_MOD 625>, <&pcie1_clkref>; 906 clock-names = "core", "ref"; 907 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 908 resets = <&cpg 625>; 909 reset-names = "pwr"; 910 max-link-speed = <4>; 911 num-lanes = <2>; 912 max-functions = /bits/ 8 <2>; 913 status = "disabled"; 914 }; 915 916 canfd: can@e6660000 { 917 compatible = "renesas,r8a779g0-canfd", 918 "renesas,rcar-gen4-canfd"; 919 reg = <0 0xe6660000 0 0x8500>; 920 interrupts = <GIC_SPI 412 IRQ_TYPE_LEVEL_HIGH>, 921 <GIC_SPI 413 IRQ_TYPE_LEVEL_HIGH>; 922 interrupt-names = "ch_int", "g_int"; 923 clocks = <&cpg CPG_MOD 328>, 924 <&cpg CPG_CORE R8A779G0_CLK_CANFD>, 925 <&can_clk>; 926 clock-names = "fck", "canfd", "can_clk"; 927 assigned-clocks = <&cpg CPG_CORE R8A779G0_CLK_CANFD>; 928 assigned-clock-rates = <80000000>; 929 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 930 resets = <&cpg 328>; 931 status = "disabled"; 932 933 channel0 { 934 status = "disabled"; 935 }; 936 937 channel1 { 938 status = "disabled"; 939 }; 940 941 channel2 { 942 status = "disabled"; 943 }; 944 945 channel3 { 946 status = "disabled"; 947 }; 948 949 channel4 { 950 status = "disabled"; 951 }; 952 953 channel5 { 954 status = "disabled"; 955 }; 956 957 channel6 { 958 status = "disabled"; 959 }; 960 961 channel7 { 962 status = "disabled"; 963 }; 964 }; 965 966 avb0: ethernet@e6800000 { 967 compatible = "renesas,etheravb-r8a779g0", 968 "renesas,etheravb-rcar-gen4"; 969 reg = <0 0xe6800000 0 0x1000>; 970 interrupts = <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>, 971 <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>, 972 <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>, 973 <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>, 974 <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>, 975 <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>, 976 <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>, 977 <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>, 978 <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>, 979 <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>, 980 <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>, 981 <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>, 982 <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>, 983 <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>, 984 <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>, 985 <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>, 986 <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>, 987 <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>, 988 <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>, 989 <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>, 990 <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>, 991 <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>, 992 <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>, 993 <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>, 994 <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; 995 interrupt-names = "ch0", "ch1", "ch2", "ch3", "ch4", 996 "ch5", "ch6", "ch7", "ch8", "ch9", 997 "ch10", "ch11", "ch12", "ch13", 998 "ch14", "ch15", "ch16", "ch17", 999 "ch18", "ch19", "ch20", "ch21", 1000 "ch22", "ch23", "ch24"; 1001 clocks = <&cpg CPG_MOD 211>; 1002 clock-names = "fck"; 1003 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1004 resets = <&cpg 211>; 1005 phy-mode = "rgmii"; 1006 rx-internal-delay-ps = <0>; 1007 tx-internal-delay-ps = <0>; 1008 iommus = <&ipmmu_hc 0>; 1009 status = "disabled"; 1010 }; 1011 1012 avb1: ethernet@e6810000 { 1013 compatible = "renesas,etheravb-r8a779g0", 1014 "renesas,etheravb-rcar-gen4"; 1015 reg = <0 0xe6810000 0 0x1000>; 1016 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>, 1017 <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>, 1018 <GIC_SPI 362 IRQ_TYPE_LEVEL_HIGH>, 1019 <GIC_SPI 363 IRQ_TYPE_LEVEL_HIGH>, 1020 <GIC_SPI 364 IRQ_TYPE_LEVEL_HIGH>, 1021 <GIC_SPI 365 IRQ_TYPE_LEVEL_HIGH>, 1022 <GIC_SPI 366 IRQ_TYPE_LEVEL_HIGH>, 1023 <GIC_SPI 367 IRQ_TYPE_LEVEL_HIGH>, 1024 <GIC_SPI 368 IRQ_TYPE_LEVEL_HIGH>, 1025 <GIC_SPI 369 IRQ_TYPE_LEVEL_HIGH>, 1026 <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>, 1027 <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>, 1028 <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>, 1029 <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>, 1030 <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>, 1031 <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>, 1032 <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>, 1033 <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>, 1034 <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>, 1035 <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>, 1036 <GIC_SPI 380 IRQ_TYPE_LEVEL_HIGH>, 1037 <GIC_SPI 381 IRQ_TYPE_LEVEL_HIGH>, 1038 <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>, 1039 <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>, 1040 <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>; 1041 interrupt-names = "ch0", "ch1", "ch2", "ch3", "ch4", 1042 "ch5", "ch6", "ch7", "ch8", "ch9", 1043 "ch10", "ch11", "ch12", "ch13", 1044 "ch14", "ch15", "ch16", "ch17", 1045 "ch18", "ch19", "ch20", "ch21", 1046 "ch22", "ch23", "ch24"; 1047 clocks = <&cpg CPG_MOD 212>; 1048 clock-names = "fck"; 1049 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1050 resets = <&cpg 212>; 1051 phy-mode = "rgmii"; 1052 rx-internal-delay-ps = <0>; 1053 tx-internal-delay-ps = <0>; 1054 iommus = <&ipmmu_hc 1>; 1055 status = "disabled"; 1056 }; 1057 1058 avb2: ethernet@e6820000 { 1059 compatible = "renesas,etheravb-r8a779g0", 1060 "renesas,etheravb-rcar-gen4"; 1061 reg = <0 0xe6820000 0 0x1000>; 1062 interrupts = <GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH>, 1063 <GIC_SPI 386 IRQ_TYPE_LEVEL_HIGH>, 1064 <GIC_SPI 387 IRQ_TYPE_LEVEL_HIGH>, 1065 <GIC_SPI 388 IRQ_TYPE_LEVEL_HIGH>, 1066 <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>, 1067 <GIC_SPI 390 IRQ_TYPE_LEVEL_HIGH>, 1068 <GIC_SPI 391 IRQ_TYPE_LEVEL_HIGH>, 1069 <GIC_SPI 392 IRQ_TYPE_LEVEL_HIGH>, 1070 <GIC_SPI 393 IRQ_TYPE_LEVEL_HIGH>, 1071 <GIC_SPI 394 IRQ_TYPE_LEVEL_HIGH>, 1072 <GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH>, 1073 <GIC_SPI 396 IRQ_TYPE_LEVEL_HIGH>, 1074 <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>, 1075 <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>, 1076 <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>, 1077 <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>, 1078 <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>, 1079 <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>, 1080 <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>, 1081 <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>, 1082 <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>, 1083 <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>, 1084 <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>, 1085 <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>, 1086 <GIC_SPI 409 IRQ_TYPE_LEVEL_HIGH>; 1087 interrupt-names = "ch0", "ch1", "ch2", "ch3", "ch4", 1088 "ch5", "ch6", "ch7", "ch8", "ch9", 1089 "ch10", "ch11", "ch12", "ch13", 1090 "ch14", "ch15", "ch16", "ch17", 1091 "ch18", "ch19", "ch20", "ch21", 1092 "ch22", "ch23", "ch24"; 1093 clocks = <&cpg CPG_MOD 213>; 1094 clock-names = "fck"; 1095 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1096 resets = <&cpg 213>; 1097 phy-mode = "rgmii"; 1098 rx-internal-delay-ps = <0>; 1099 tx-internal-delay-ps = <0>; 1100 iommus = <&ipmmu_hc 2>; 1101 status = "disabled"; 1102 }; 1103 1104 pwm0: pwm@e6e30000 { 1105 compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 1106 reg = <0 0xe6e30000 0 0x10>; 1107 #pwm-cells = <2>; 1108 clocks = <&cpg CPG_MOD 628>; 1109 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1110 resets = <&cpg 628>; 1111 status = "disabled"; 1112 }; 1113 1114 pwm1: pwm@e6e31000 { 1115 compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 1116 reg = <0 0xe6e31000 0 0x10>; 1117 #pwm-cells = <2>; 1118 clocks = <&cpg CPG_MOD 628>; 1119 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1120 resets = <&cpg 628>; 1121 status = "disabled"; 1122 }; 1123 1124 pwm2: pwm@e6e32000 { 1125 compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 1126 reg = <0 0xe6e32000 0 0x10>; 1127 #pwm-cells = <2>; 1128 clocks = <&cpg CPG_MOD 628>; 1129 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1130 resets = <&cpg 628>; 1131 status = "disabled"; 1132 }; 1133 1134 pwm3: pwm@e6e33000 { 1135 compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 1136 reg = <0 0xe6e33000 0 0x10>; 1137 #pwm-cells = <2>; 1138 clocks = <&cpg CPG_MOD 628>; 1139 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1140 resets = <&cpg 628>; 1141 status = "disabled"; 1142 }; 1143 1144 pwm4: pwm@e6e34000 { 1145 compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 1146 reg = <0 0xe6e34000 0 0x10>; 1147 #pwm-cells = <2>; 1148 clocks = <&cpg CPG_MOD 628>; 1149 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1150 resets = <&cpg 628>; 1151 status = "disabled"; 1152 }; 1153 1154 pwm5: pwm@e6e35000 { 1155 compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 1156 reg = <0 0xe6e35000 0 0x10>; 1157 #pwm-cells = <2>; 1158 clocks = <&cpg CPG_MOD 628>; 1159 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1160 resets = <&cpg 628>; 1161 status = "disabled"; 1162 }; 1163 1164 pwm6: pwm@e6e36000 { 1165 compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 1166 reg = <0 0xe6e36000 0 0x10>; 1167 #pwm-cells = <2>; 1168 clocks = <&cpg CPG_MOD 628>; 1169 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1170 resets = <&cpg 628>; 1171 status = "disabled"; 1172 }; 1173 1174 pwm7: pwm@e6e37000 { 1175 compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 1176 reg = <0 0xe6e37000 0 0x10>; 1177 #pwm-cells = <2>; 1178 clocks = <&cpg CPG_MOD 628>; 1179 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1180 resets = <&cpg 628>; 1181 status = "disabled"; 1182 }; 1183 1184 pwm8: pwm@e6e38000 { 1185 compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 1186 reg = <0 0xe6e38000 0 0x10>; 1187 #pwm-cells = <2>; 1188 clocks = <&cpg CPG_MOD 628>; 1189 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1190 resets = <&cpg 628>; 1191 status = "disabled"; 1192 }; 1193 1194 pwm9: pwm@e6e39000 { 1195 compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 1196 reg = <0 0xe6e39000 0 0x10>; 1197 #pwm-cells = <2>; 1198 clocks = <&cpg CPG_MOD 628>; 1199 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1200 resets = <&cpg 628>; 1201 status = "disabled"; 1202 }; 1203 1204 scif0: serial@e6e60000 { 1205 compatible = "renesas,scif-r8a779g0", 1206 "renesas,rcar-gen4-scif", "renesas,scif"; 1207 reg = <0 0xe6e60000 0 64>; 1208 interrupts = <GIC_SPI 251 IRQ_TYPE_LEVEL_HIGH>; 1209 clocks = <&cpg CPG_MOD 702>, 1210 <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>, 1211 <&scif_clk>; 1212 clock-names = "fck", "brg_int", "scif_clk"; 1213 dmas = <&dmac0 0x51>, <&dmac0 0x50>, 1214 <&dmac1 0x51>, <&dmac1 0x50>; 1215 dma-names = "tx", "rx", "tx", "rx"; 1216 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1217 resets = <&cpg 702>; 1218 status = "disabled"; 1219 }; 1220 1221 scif1: serial@e6e68000 { 1222 compatible = "renesas,scif-r8a779g0", 1223 "renesas,rcar-gen4-scif", "renesas,scif"; 1224 reg = <0 0xe6e68000 0 64>; 1225 interrupts = <GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH>; 1226 clocks = <&cpg CPG_MOD 703>, 1227 <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>, 1228 <&scif_clk>; 1229 clock-names = "fck", "brg_int", "scif_clk"; 1230 dmas = <&dmac0 0x53>, <&dmac0 0x52>, 1231 <&dmac1 0x53>, <&dmac1 0x52>; 1232 dma-names = "tx", "rx", "tx", "rx"; 1233 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1234 resets = <&cpg 703>; 1235 status = "disabled"; 1236 }; 1237 1238 scif3: serial@e6c50000 { 1239 compatible = "renesas,scif-r8a779g0", 1240 "renesas,rcar-gen4-scif", "renesas,scif"; 1241 reg = <0 0xe6c50000 0 64>; 1242 interrupts = <GIC_SPI 253 IRQ_TYPE_LEVEL_HIGH>; 1243 clocks = <&cpg CPG_MOD 704>, 1244 <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>, 1245 <&scif_clk>; 1246 clock-names = "fck", "brg_int", "scif_clk"; 1247 dmas = <&dmac0 0x57>, <&dmac0 0x56>, 1248 <&dmac1 0x57>, <&dmac1 0x56>; 1249 dma-names = "tx", "rx", "tx", "rx"; 1250 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1251 resets = <&cpg 704>; 1252 status = "disabled"; 1253 }; 1254 1255 scif4: serial@e6c40000 { 1256 compatible = "renesas,scif-r8a779g0", 1257 "renesas,rcar-gen4-scif", "renesas,scif"; 1258 reg = <0 0xe6c40000 0 64>; 1259 interrupts = <GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH>; 1260 clocks = <&cpg CPG_MOD 705>, 1261 <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>, 1262 <&scif_clk2>; 1263 clock-names = "fck", "brg_int", "scif_clk"; 1264 dmas = <&dmac0 0x59>, <&dmac0 0x58>, 1265 <&dmac1 0x59>, <&dmac1 0x58>; 1266 dma-names = "tx", "rx", "tx", "rx"; 1267 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1268 resets = <&cpg 705>; 1269 status = "disabled"; 1270 }; 1271 1272 tpu: pwm@e6e80000 { 1273 compatible = "renesas,tpu-r8a779g0", "renesas,tpu"; 1274 reg = <0 0xe6e80000 0 0x148>; 1275 interrupts = <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>; 1276 clocks = <&cpg CPG_MOD 718>; 1277 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1278 resets = <&cpg 718>; 1279 #pwm-cells = <3>; 1280 status = "disabled"; 1281 }; 1282 1283 msiof0: spi@e6e90000 { 1284 compatible = "renesas,msiof-r8a779g0", 1285 "renesas,rcar-gen4-msiof"; 1286 reg = <0 0xe6e90000 0 0x0064>; 1287 interrupts = <GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH>; 1288 clocks = <&cpg CPG_MOD 618>; 1289 dmas = <&dmac0 0x41>, <&dmac0 0x40>, 1290 <&dmac1 0x41>, <&dmac1 0x40>; 1291 dma-names = "tx", "rx", "tx", "rx"; 1292 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1293 resets = <&cpg 618>; 1294 #address-cells = <1>; 1295 #size-cells = <0>; 1296 status = "disabled"; 1297 }; 1298 1299 msiof1: spi@e6ea0000 { 1300 compatible = "renesas,msiof-r8a779g0", 1301 "renesas,rcar-gen4-msiof"; 1302 reg = <0 0xe6ea0000 0 0x0064>; 1303 interrupts = <GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH>; 1304 clocks = <&cpg CPG_MOD 619>; 1305 dmas = <&dmac0 0x43>, <&dmac0 0x42>, 1306 <&dmac1 0x43>, <&dmac1 0x42>; 1307 dma-names = "tx", "rx", "tx", "rx"; 1308 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1309 resets = <&cpg 619>; 1310 #address-cells = <1>; 1311 #size-cells = <0>; 1312 status = "disabled"; 1313 }; 1314 1315 msiof2: spi@e6c00000 { 1316 compatible = "renesas,msiof-r8a779g0", 1317 "renesas,rcar-gen4-msiof"; 1318 reg = <0 0xe6c00000 0 0x0064>; 1319 interrupts = <GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH>; 1320 clocks = <&cpg CPG_MOD 620>; 1321 dmas = <&dmac0 0x45>, <&dmac0 0x44>, 1322 <&dmac1 0x45>, <&dmac1 0x44>; 1323 dma-names = "tx", "rx", "tx", "rx"; 1324 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1325 resets = <&cpg 620>; 1326 #address-cells = <1>; 1327 #size-cells = <0>; 1328 status = "disabled"; 1329 }; 1330 1331 msiof3: spi@e6c10000 { 1332 compatible = "renesas,msiof-r8a779g0", 1333 "renesas,rcar-gen4-msiof"; 1334 reg = <0 0xe6c10000 0 0x0064>; 1335 interrupts = <GIC_SPI 242 IRQ_TYPE_LEVEL_HIGH>; 1336 clocks = <&cpg CPG_MOD 621>; 1337 dmas = <&dmac0 0x47>, <&dmac0 0x46>, 1338 <&dmac1 0x47>, <&dmac1 0x46>; 1339 dma-names = "tx", "rx", "tx", "rx"; 1340 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1341 resets = <&cpg 621>; 1342 #address-cells = <1>; 1343 #size-cells = <0>; 1344 status = "disabled"; 1345 }; 1346 1347 msiof4: spi@e6c20000 { 1348 compatible = "renesas,msiof-r8a779g0", 1349 "renesas,rcar-gen4-msiof"; 1350 reg = <0 0xe6c20000 0 0x0064>; 1351 interrupts = <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>; 1352 clocks = <&cpg CPG_MOD 622>; 1353 dmas = <&dmac0 0x49>, <&dmac0 0x48>, 1354 <&dmac1 0x49>, <&dmac1 0x48>; 1355 dma-names = "tx", "rx", "tx", "rx"; 1356 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1357 resets = <&cpg 622>; 1358 #address-cells = <1>; 1359 #size-cells = <0>; 1360 status = "disabled"; 1361 }; 1362 1363 msiof5: spi@e6c28000 { 1364 compatible = "renesas,msiof-r8a779g0", 1365 "renesas,rcar-gen4-msiof"; 1366 reg = <0 0xe6c28000 0 0x0064>; 1367 interrupts = <GIC_SPI 244 IRQ_TYPE_LEVEL_HIGH>; 1368 clocks = <&cpg CPG_MOD 623>; 1369 dmas = <&dmac0 0x4b>, <&dmac0 0x4a>, 1370 <&dmac1 0x4b>, <&dmac1 0x4a>; 1371 dma-names = "tx", "rx", "tx", "rx"; 1372 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1373 resets = <&cpg 623>; 1374 #address-cells = <1>; 1375 #size-cells = <0>; 1376 status = "disabled"; 1377 }; 1378 1379 vin00: video@e6ef0000 { 1380 compatible = "renesas,vin-r8a779g0", 1381 "renesas,rcar-gen4-vin"; 1382 reg = <0 0xe6ef0000 0 0x1000>; 1383 interrupts = <GIC_SPI 529 IRQ_TYPE_LEVEL_HIGH>; 1384 clocks = <&cpg CPG_MOD 730>; 1385 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1386 resets = <&cpg 730>; 1387 renesas,id = <0>; 1388 status = "disabled"; 1389 1390 ports { 1391 #address-cells = <1>; 1392 #size-cells = <0>; 1393 1394 port@2 { 1395 #address-cells = <1>; 1396 #size-cells = <0>; 1397 1398 reg = <2>; 1399 1400 vin00isp0: endpoint@0 { 1401 reg = <0>; 1402 remote-endpoint = <&isp0vin00>; 1403 }; 1404 }; 1405 }; 1406 }; 1407 1408 vin01: video@e6ef1000 { 1409 compatible = "renesas,vin-r8a779g0", 1410 "renesas,rcar-gen4-vin"; 1411 reg = <0 0xe6ef1000 0 0x1000>; 1412 interrupts = <GIC_SPI 530 IRQ_TYPE_LEVEL_HIGH>; 1413 clocks = <&cpg CPG_MOD 731>; 1414 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1415 resets = <&cpg 731>; 1416 renesas,id = <1>; 1417 status = "disabled"; 1418 1419 ports { 1420 #address-cells = <1>; 1421 #size-cells = <0>; 1422 1423 port@2 { 1424 #address-cells = <1>; 1425 #size-cells = <0>; 1426 1427 reg = <2>; 1428 1429 vin01isp0: endpoint@0 { 1430 reg = <0>; 1431 remote-endpoint = <&isp0vin01>; 1432 }; 1433 }; 1434 }; 1435 }; 1436 1437 vin02: video@e6ef2000 { 1438 compatible = "renesas,vin-r8a779g0", 1439 "renesas,rcar-gen4-vin"; 1440 reg = <0 0xe6ef2000 0 0x1000>; 1441 interrupts = <GIC_SPI 531 IRQ_TYPE_LEVEL_HIGH>; 1442 clocks = <&cpg CPG_MOD 800>; 1443 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1444 resets = <&cpg 800>; 1445 renesas,id = <2>; 1446 status = "disabled"; 1447 1448 ports { 1449 #address-cells = <1>; 1450 #size-cells = <0>; 1451 1452 port@2 { 1453 #address-cells = <1>; 1454 #size-cells = <0>; 1455 1456 reg = <2>; 1457 1458 vin02isp0: endpoint@0 { 1459 reg = <0>; 1460 remote-endpoint = <&isp0vin02>; 1461 }; 1462 }; 1463 }; 1464 }; 1465 1466 vin03: video@e6ef3000 { 1467 compatible = "renesas,vin-r8a779g0", 1468 "renesas,rcar-gen4-vin"; 1469 reg = <0 0xe6ef3000 0 0x1000>; 1470 interrupts = <GIC_SPI 532 IRQ_TYPE_LEVEL_HIGH>; 1471 clocks = <&cpg CPG_MOD 801>; 1472 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1473 resets = <&cpg 801>; 1474 renesas,id = <3>; 1475 status = "disabled"; 1476 1477 ports { 1478 #address-cells = <1>; 1479 #size-cells = <0>; 1480 1481 port@2 { 1482 #address-cells = <1>; 1483 #size-cells = <0>; 1484 1485 reg = <2>; 1486 1487 vin03isp0: endpoint@0 { 1488 reg = <0>; 1489 remote-endpoint = <&isp0vin03>; 1490 }; 1491 }; 1492 }; 1493 }; 1494 1495 vin04: video@e6ef4000 { 1496 compatible = "renesas,vin-r8a779g0", 1497 "renesas,rcar-gen4-vin"; 1498 reg = <0 0xe6ef4000 0 0x1000>; 1499 interrupts = <GIC_SPI 533 IRQ_TYPE_LEVEL_HIGH>; 1500 clocks = <&cpg CPG_MOD 802>; 1501 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1502 resets = <&cpg 802>; 1503 renesas,id = <4>; 1504 status = "disabled"; 1505 1506 ports { 1507 #address-cells = <1>; 1508 #size-cells = <0>; 1509 1510 port@2 { 1511 #address-cells = <1>; 1512 #size-cells = <0>; 1513 1514 reg = <2>; 1515 1516 vin04isp0: endpoint@0 { 1517 reg = <0>; 1518 remote-endpoint = <&isp0vin04>; 1519 }; 1520 }; 1521 }; 1522 }; 1523 1524 vin05: video@e6ef5000 { 1525 compatible = "renesas,vin-r8a779g0", 1526 "renesas,rcar-gen4-vin"; 1527 reg = <0 0xe6ef5000 0 0x1000>; 1528 interrupts = <GIC_SPI 534 IRQ_TYPE_LEVEL_HIGH>; 1529 clocks = <&cpg CPG_MOD 803>; 1530 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1531 resets = <&cpg 803>; 1532 renesas,id = <5>; 1533 status = "disabled"; 1534 1535 ports { 1536 #address-cells = <1>; 1537 #size-cells = <0>; 1538 1539 port@2 { 1540 #address-cells = <1>; 1541 #size-cells = <0>; 1542 1543 reg = <2>; 1544 1545 vin05isp0: endpoint@0 { 1546 reg = <0>; 1547 remote-endpoint = <&isp0vin05>; 1548 }; 1549 }; 1550 }; 1551 }; 1552 1553 vin06: video@e6ef6000 { 1554 compatible = "renesas,vin-r8a779g0", 1555 "renesas,rcar-gen4-vin"; 1556 reg = <0 0xe6ef6000 0 0x1000>; 1557 interrupts = <GIC_SPI 535 IRQ_TYPE_LEVEL_HIGH>; 1558 clocks = <&cpg CPG_MOD 804>; 1559 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1560 resets = <&cpg 804>; 1561 renesas,id = <6>; 1562 status = "disabled"; 1563 1564 ports { 1565 #address-cells = <1>; 1566 #size-cells = <0>; 1567 1568 port@2 { 1569 #address-cells = <1>; 1570 #size-cells = <0>; 1571 1572 reg = <2>; 1573 1574 vin06isp0: endpoint@0 { 1575 reg = <0>; 1576 remote-endpoint = <&isp0vin06>; 1577 }; 1578 }; 1579 }; 1580 }; 1581 1582 vin07: video@e6ef7000 { 1583 compatible = "renesas,vin-r8a779g0", 1584 "renesas,rcar-gen4-vin"; 1585 reg = <0 0xe6ef7000 0 0x1000>; 1586 interrupts = <GIC_SPI 536 IRQ_TYPE_LEVEL_HIGH>; 1587 clocks = <&cpg CPG_MOD 805>; 1588 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1589 resets = <&cpg 805>; 1590 renesas,id = <7>; 1591 status = "disabled"; 1592 1593 ports { 1594 #address-cells = <1>; 1595 #size-cells = <0>; 1596 1597 port@2 { 1598 #address-cells = <1>; 1599 #size-cells = <0>; 1600 1601 reg = <2>; 1602 1603 vin07isp0: endpoint@0 { 1604 reg = <0>; 1605 remote-endpoint = <&isp0vin07>; 1606 }; 1607 }; 1608 }; 1609 }; 1610 1611 vin08: video@e6ef8000 { 1612 compatible = "renesas,vin-r8a779g0", 1613 "renesas,rcar-gen4-vin"; 1614 reg = <0 0xe6ef8000 0 0x1000>; 1615 interrupts = <GIC_SPI 537 IRQ_TYPE_LEVEL_HIGH>; 1616 clocks = <&cpg CPG_MOD 806>; 1617 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1618 resets = <&cpg 806>; 1619 renesas,id = <8>; 1620 status = "disabled"; 1621 1622 ports { 1623 #address-cells = <1>; 1624 #size-cells = <0>; 1625 1626 port@2 { 1627 #address-cells = <1>; 1628 #size-cells = <0>; 1629 1630 reg = <2>; 1631 1632 vin08isp1: endpoint@1 { 1633 reg = <1>; 1634 remote-endpoint = <&isp1vin08>; 1635 }; 1636 }; 1637 }; 1638 }; 1639 1640 vin09: video@e6ef9000 { 1641 compatible = "renesas,vin-r8a779g0", 1642 "renesas,rcar-gen4-vin"; 1643 reg = <0 0xe6ef9000 0 0x1000>; 1644 interrupts = <GIC_SPI 538 IRQ_TYPE_LEVEL_HIGH>; 1645 clocks = <&cpg CPG_MOD 807>; 1646 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1647 resets = <&cpg 807>; 1648 renesas,id = <9>; 1649 status = "disabled"; 1650 1651 ports { 1652 #address-cells = <1>; 1653 #size-cells = <0>; 1654 1655 port@2 { 1656 #address-cells = <1>; 1657 #size-cells = <0>; 1658 1659 reg = <2>; 1660 1661 vin09isp1: endpoint@1 { 1662 reg = <1>; 1663 remote-endpoint = <&isp1vin09>; 1664 }; 1665 }; 1666 }; 1667 }; 1668 1669 vin10: video@e6efa000 { 1670 compatible = "renesas,vin-r8a779g0", 1671 "renesas,rcar-gen4-vin"; 1672 reg = <0 0xe6efa000 0 0x1000>; 1673 interrupts = <GIC_SPI 539 IRQ_TYPE_LEVEL_HIGH>; 1674 clocks = <&cpg CPG_MOD 808>; 1675 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1676 resets = <&cpg 808>; 1677 renesas,id = <10>; 1678 status = "disabled"; 1679 1680 ports { 1681 #address-cells = <1>; 1682 #size-cells = <0>; 1683 1684 port@2 { 1685 #address-cells = <1>; 1686 #size-cells = <0>; 1687 1688 reg = <2>; 1689 1690 vin10isp1: endpoint@1 { 1691 reg = <1>; 1692 remote-endpoint = <&isp1vin10>; 1693 }; 1694 }; 1695 }; 1696 }; 1697 1698 vin11: video@e6efb000 { 1699 compatible = "renesas,vin-r8a779g0", 1700 "renesas,rcar-gen4-vin"; 1701 reg = <0 0xe6efb000 0 0x1000>; 1702 interrupts = <GIC_SPI 540 IRQ_TYPE_LEVEL_HIGH>; 1703 clocks = <&cpg CPG_MOD 809>; 1704 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1705 resets = <&cpg 809>; 1706 renesas,id = <11>; 1707 status = "disabled"; 1708 1709 ports { 1710 #address-cells = <1>; 1711 #size-cells = <0>; 1712 1713 port@2 { 1714 #address-cells = <1>; 1715 #size-cells = <0>; 1716 1717 reg = <2>; 1718 1719 vin11isp1: endpoint@1 { 1720 reg = <1>; 1721 remote-endpoint = <&isp1vin11>; 1722 }; 1723 }; 1724 }; 1725 }; 1726 1727 vin12: video@e6efc000 { 1728 compatible = "renesas,vin-r8a779g0", 1729 "renesas,rcar-gen4-vin"; 1730 reg = <0 0xe6efc000 0 0x1000>; 1731 interrupts = <GIC_SPI 541 IRQ_TYPE_LEVEL_HIGH>; 1732 clocks = <&cpg CPG_MOD 810>; 1733 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1734 resets = <&cpg 810>; 1735 renesas,id = <12>; 1736 status = "disabled"; 1737 1738 ports { 1739 #address-cells = <1>; 1740 #size-cells = <0>; 1741 1742 port@2 { 1743 #address-cells = <1>; 1744 #size-cells = <0>; 1745 1746 reg = <2>; 1747 1748 vin12isp1: endpoint@1 { 1749 reg = <1>; 1750 remote-endpoint = <&isp1vin12>; 1751 }; 1752 }; 1753 }; 1754 }; 1755 1756 vin13: video@e6efd000 { 1757 compatible = "renesas,vin-r8a779g0", 1758 "renesas,rcar-gen4-vin"; 1759 reg = <0 0xe6efd000 0 0x1000>; 1760 interrupts = <GIC_SPI 542 IRQ_TYPE_LEVEL_HIGH>; 1761 clocks = <&cpg CPG_MOD 811>; 1762 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1763 resets = <&cpg 811>; 1764 renesas,id = <13>; 1765 status = "disabled"; 1766 1767 ports { 1768 #address-cells = <1>; 1769 #size-cells = <0>; 1770 1771 port@2 { 1772 #address-cells = <1>; 1773 #size-cells = <0>; 1774 1775 reg = <2>; 1776 1777 vin13isp1: endpoint@1 { 1778 reg = <1>; 1779 remote-endpoint = <&isp1vin13>; 1780 }; 1781 }; 1782 }; 1783 }; 1784 1785 vin14: video@e6efe000 { 1786 compatible = "renesas,vin-r8a779g0", 1787 "renesas,rcar-gen4-vin"; 1788 reg = <0 0xe6efe000 0 0x1000>; 1789 interrupts = <GIC_SPI 543 IRQ_TYPE_LEVEL_HIGH>; 1790 clocks = <&cpg CPG_MOD 812>; 1791 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1792 resets = <&cpg 812>; 1793 renesas,id = <14>; 1794 status = "disabled"; 1795 1796 ports { 1797 #address-cells = <1>; 1798 #size-cells = <0>; 1799 1800 port@2 { 1801 #address-cells = <1>; 1802 #size-cells = <0>; 1803 1804 reg = <2>; 1805 1806 vin14isp1: endpoint@1 { 1807 reg = <1>; 1808 remote-endpoint = <&isp1vin14>; 1809 }; 1810 }; 1811 }; 1812 }; 1813 1814 vin15: video@e6eff000 { 1815 compatible = "renesas,vin-r8a779g0", 1816 "renesas,rcar-gen4-vin"; 1817 reg = <0 0xe6eff000 0 0x1000>; 1818 interrupts = <GIC_SPI 544 IRQ_TYPE_LEVEL_HIGH>; 1819 clocks = <&cpg CPG_MOD 813>; 1820 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1821 resets = <&cpg 813>; 1822 renesas,id = <15>; 1823 status = "disabled"; 1824 1825 ports { 1826 #address-cells = <1>; 1827 #size-cells = <0>; 1828 1829 port@2 { 1830 #address-cells = <1>; 1831 #size-cells = <0>; 1832 1833 reg = <2>; 1834 1835 vin15isp1: endpoint@1 { 1836 reg = <1>; 1837 remote-endpoint = <&isp1vin15>; 1838 }; 1839 }; 1840 }; 1841 }; 1842 1843 dmac0: dma-controller@e7350000 { 1844 compatible = "renesas,dmac-r8a779g0", 1845 "renesas,rcar-gen4-dmac"; 1846 reg = <0 0xe7350000 0 0x1000>, 1847 <0 0xe7300000 0 0x10000>; 1848 interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>, 1849 <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>, 1850 <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>, 1851 <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>, 1852 <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>, 1853 <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>, 1854 <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>, 1855 <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>, 1856 <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>, 1857 <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>, 1858 <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>, 1859 <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>, 1860 <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>, 1861 <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>, 1862 <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>, 1863 <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>, 1864 <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>; 1865 interrupt-names = "error", 1866 "ch0", "ch1", "ch2", "ch3", "ch4", 1867 "ch5", "ch6", "ch7", "ch8", "ch9", 1868 "ch10", "ch11", "ch12", "ch13", 1869 "ch14", "ch15"; 1870 clocks = <&cpg CPG_MOD 709>; 1871 clock-names = "fck"; 1872 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1873 resets = <&cpg 709>; 1874 #dma-cells = <1>; 1875 dma-channels = <16>; 1876 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>, 1877 <&ipmmu_ds0 2>, <&ipmmu_ds0 3>, 1878 <&ipmmu_ds0 4>, <&ipmmu_ds0 5>, 1879 <&ipmmu_ds0 6>, <&ipmmu_ds0 7>, 1880 <&ipmmu_ds0 8>, <&ipmmu_ds0 9>, 1881 <&ipmmu_ds0 10>, <&ipmmu_ds0 11>, 1882 <&ipmmu_ds0 12>, <&ipmmu_ds0 13>, 1883 <&ipmmu_ds0 14>, <&ipmmu_ds0 15>; 1884 }; 1885 1886 dmac1: dma-controller@e7351000 { 1887 compatible = "renesas,dmac-r8a779g0", 1888 "renesas,rcar-gen4-dmac"; 1889 reg = <0 0xe7351000 0 0x1000>, 1890 <0 0xe7310000 0 0x10000>; 1891 interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>, 1892 <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>, 1893 <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>, 1894 <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>, 1895 <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>, 1896 <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>, 1897 <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>, 1898 <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>, 1899 <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>, 1900 <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, 1901 <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, 1902 <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, 1903 <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>, 1904 <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>, 1905 <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, 1906 <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>, 1907 <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>; 1908 interrupt-names = "error", 1909 "ch0", "ch1", "ch2", "ch3", "ch4", 1910 "ch5", "ch6", "ch7", "ch8", "ch9", 1911 "ch10", "ch11", "ch12", "ch13", 1912 "ch14", "ch15"; 1913 clocks = <&cpg CPG_MOD 710>; 1914 clock-names = "fck"; 1915 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1916 resets = <&cpg 710>; 1917 #dma-cells = <1>; 1918 dma-channels = <16>; 1919 iommus = <&ipmmu_ds0 16>, <&ipmmu_ds0 17>, 1920 <&ipmmu_ds0 18>, <&ipmmu_ds0 19>, 1921 <&ipmmu_ds0 20>, <&ipmmu_ds0 21>, 1922 <&ipmmu_ds0 22>, <&ipmmu_ds0 23>, 1923 <&ipmmu_ds0 24>, <&ipmmu_ds0 25>, 1924 <&ipmmu_ds0 26>, <&ipmmu_ds0 27>, 1925 <&ipmmu_ds0 28>, <&ipmmu_ds0 29>, 1926 <&ipmmu_ds0 30>, <&ipmmu_ds0 31>; 1927 }; 1928 1929 rcar_sound: sound@ec5a0000 { 1930 compatible = "renesas,rcar_sound-r8a779g0", "renesas,rcar_sound-gen4"; 1931 reg = <0 0xec5a0000 0 0x020>, 1932 <0 0xec540000 0 0x1000>, 1933 <0 0xec541000 0 0x050>, 1934 <0 0xec400000 0 0x40000>; 1935 reg-names = "adg", "ssiu", "ssi", "sdmc"; 1936 1937 clocks = <&cpg CPG_MOD 2926>, <&cpg CPG_MOD 2927>, <&audio_clkin>; 1938 clock-names = "ssiu.0", "ssi.0", "clkin"; 1939 /* #clock-cells is fixed */ 1940 #clock-cells = <0>; 1941 /* #sound-dai-cells is fixed */ 1942 #sound-dai-cells = <0>; 1943 1944 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1945 resets = <&cpg 2926>, <&cpg 2927>; 1946 reset-names = "ssiu.0", "ssi.0"; 1947 status = "disabled"; 1948 1949 rcar_sound,ssiu { 1950 ssiu00: ssiu-0 { 1951 dmas = <&dmac0 0x6e>, <&dmac0 0x6f>; 1952 dma-names = "tx", "rx"; 1953 }; 1954 ssiu01: ssiu-1 { 1955 dmas = <&dmac0 0x6c>, <&dmac0 0x6d>; 1956 dma-names = "tx", "rx"; 1957 }; 1958 ssiu02: ssiu-2 { 1959 dmas = <&dmac0 0x6a>, <&dmac0 0x6b>; 1960 dma-names = "tx", "rx"; 1961 }; 1962 ssiu03: ssiu-3 { 1963 dmas = <&dmac0 0x68>, <&dmac0 0x69>; 1964 dma-names = "tx", "rx"; 1965 }; 1966 ssiu04: ssiu-4 { 1967 dmas = <&dmac0 0x66>, <&dmac0 0x67>; 1968 dma-names = "tx", "rx"; 1969 }; 1970 ssiu05: ssiu-5 { 1971 dmas = <&dmac0 0x64>, <&dmac0 0x65>; 1972 dma-names = "tx", "rx"; 1973 }; 1974 ssiu06: ssiu-6 { 1975 dmas = <&dmac0 0x62>, <&dmac0 0x63>; 1976 dma-names = "tx", "rx"; 1977 }; 1978 ssiu07: ssiu-7 { 1979 dmas = <&dmac0 0x60>, <&dmac0 0x61>; 1980 dma-names = "tx", "rx"; 1981 }; 1982 }; 1983 1984 rcar_sound,ssi { 1985 ssi0: ssi-0 { 1986 interrupts = <GIC_SPI 258 IRQ_TYPE_LEVEL_HIGH>; 1987 }; 1988 }; 1989 }; 1990 1991 mmc0: mmc@ee140000 { 1992 compatible = "renesas,sdhi-r8a779g0", 1993 "renesas,rcar-gen4-sdhi"; 1994 reg = <0 0xee140000 0 0x2000>; 1995 interrupts = <GIC_SPI 440 IRQ_TYPE_LEVEL_HIGH>; 1996 clocks = <&cpg CPG_MOD 706>, 1997 <&cpg CPG_CORE R8A779G0_CLK_SD0H>; 1998 clock-names = "core", "clkh"; 1999 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 2000 resets = <&cpg 706>; 2001 max-frequency = <200000000>; 2002 iommus = <&ipmmu_ds0 32>; 2003 status = "disabled"; 2004 }; 2005 2006 rpc: spi@ee200000 { 2007 compatible = "renesas,r8a779g0-rpc-if", 2008 "renesas,rcar-gen4-rpc-if"; 2009 reg = <0 0xee200000 0 0x200>, 2010 <0 0x08000000 0 0x04000000>, 2011 <0 0xee208000 0 0x100>; 2012 reg-names = "regs", "dirmap", "wbuf"; 2013 interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>; 2014 clocks = <&cpg CPG_MOD 629>; 2015 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 2016 resets = <&cpg 629>; 2017 #address-cells = <1>; 2018 #size-cells = <0>; 2019 status = "disabled"; 2020 }; 2021 2022 ipmmu_rt0: iommu@ee480000 { 2023 compatible = "renesas,ipmmu-r8a779g0", 2024 "renesas,rcar-gen4-ipmmu-vmsa"; 2025 reg = <0 0xee480000 0 0x20000>; 2026 renesas,ipmmu-main = <&ipmmu_mm>; 2027 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 2028 #iommu-cells = <1>; 2029 }; 2030 2031 ipmmu_rt1: iommu@ee4c0000 { 2032 compatible = "renesas,ipmmu-r8a779g0", 2033 "renesas,rcar-gen4-ipmmu-vmsa"; 2034 reg = <0 0xee4c0000 0 0x20000>; 2035 renesas,ipmmu-main = <&ipmmu_mm>; 2036 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 2037 #iommu-cells = <1>; 2038 }; 2039 2040 ipmmu_ds0: iommu@eed00000 { 2041 compatible = "renesas,ipmmu-r8a779g0", 2042 "renesas,rcar-gen4-ipmmu-vmsa"; 2043 reg = <0 0xeed00000 0 0x20000>; 2044 renesas,ipmmu-main = <&ipmmu_mm>; 2045 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 2046 #iommu-cells = <1>; 2047 }; 2048 2049 ipmmu_hc: iommu@eed40000 { 2050 compatible = "renesas,ipmmu-r8a779g0", 2051 "renesas,rcar-gen4-ipmmu-vmsa"; 2052 reg = <0 0xeed40000 0 0x20000>; 2053 renesas,ipmmu-main = <&ipmmu_mm>; 2054 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 2055 #iommu-cells = <1>; 2056 }; 2057 2058 ipmmu_ir: iommu@eed80000 { 2059 compatible = "renesas,ipmmu-r8a779g0", 2060 "renesas,rcar-gen4-ipmmu-vmsa"; 2061 reg = <0 0xeed80000 0 0x20000>; 2062 renesas,ipmmu-main = <&ipmmu_mm>; 2063 power-domains = <&sysc R8A779G0_PD_A3IR>; 2064 #iommu-cells = <1>; 2065 }; 2066 2067 ipmmu_vc: iommu@eedc0000 { 2068 compatible = "renesas,ipmmu-r8a779g0", 2069 "renesas,rcar-gen4-ipmmu-vmsa"; 2070 reg = <0 0xeedc0000 0 0x20000>; 2071 renesas,ipmmu-main = <&ipmmu_mm>; 2072 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 2073 #iommu-cells = <1>; 2074 }; 2075 2076 ipmmu_3dg: iommu@eee00000 { 2077 compatible = "renesas,ipmmu-r8a779g0", 2078 "renesas,rcar-gen4-ipmmu-vmsa"; 2079 reg = <0 0xeee00000 0 0x20000>; 2080 renesas,ipmmu-main = <&ipmmu_mm>; 2081 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 2082 #iommu-cells = <1>; 2083 }; 2084 2085 ipmmu_vi0: iommu@eee80000 { 2086 compatible = "renesas,ipmmu-r8a779g0", 2087 "renesas,rcar-gen4-ipmmu-vmsa"; 2088 reg = <0 0xeee80000 0 0x20000>; 2089 renesas,ipmmu-main = <&ipmmu_mm>; 2090 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 2091 #iommu-cells = <1>; 2092 }; 2093 2094 ipmmu_vi1: iommu@eeec0000 { 2095 compatible = "renesas,ipmmu-r8a779g0", 2096 "renesas,rcar-gen4-ipmmu-vmsa"; 2097 reg = <0 0xeeec0000 0 0x20000>; 2098 renesas,ipmmu-main = <&ipmmu_mm>; 2099 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 2100 #iommu-cells = <1>; 2101 }; 2102 2103 ipmmu_vip0: iommu@eef00000 { 2104 compatible = "renesas,ipmmu-r8a779g0", 2105 "renesas,rcar-gen4-ipmmu-vmsa"; 2106 reg = <0 0xeef00000 0 0x20000>; 2107 renesas,ipmmu-main = <&ipmmu_mm>; 2108 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 2109 #iommu-cells = <1>; 2110 }; 2111 2112 ipmmu_vip1: iommu@eef40000 { 2113 compatible = "renesas,ipmmu-r8a779g0", 2114 "renesas,rcar-gen4-ipmmu-vmsa"; 2115 reg = <0 0xeef40000 0 0x20000>; 2116 renesas,ipmmu-main = <&ipmmu_mm>; 2117 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 2118 #iommu-cells = <1>; 2119 }; 2120 2121 ipmmu_mm: iommu@eefc0000 { 2122 compatible = "renesas,ipmmu-r8a779g0", 2123 "renesas,rcar-gen4-ipmmu-vmsa"; 2124 reg = <0 0xeefc0000 0 0x20000>; 2125 interrupts = <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>, 2126 <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>; 2127 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 2128 #iommu-cells = <1>; 2129 }; 2130 2131 gic: interrupt-controller@f1000000 { 2132 compatible = "arm,gic-v3"; 2133 #interrupt-cells = <3>; 2134 #address-cells = <0>; 2135 interrupt-controller; 2136 reg = <0x0 0xf1000000 0 0x20000>, 2137 <0x0 0xf1060000 0 0x110000>; 2138 interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>; 2139 }; 2140 2141 csi40: csi2@fe500000 { 2142 compatible = "renesas,r8a779g0-csi2"; 2143 reg = <0 0xfe500000 0 0x40000>; 2144 interrupts = <GIC_SPI 499 IRQ_TYPE_LEVEL_HIGH>; 2145 clocks = <&cpg CPG_MOD 331>; 2146 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 2147 resets = <&cpg 331>; 2148 status = "disabled"; 2149 2150 ports { 2151 #address-cells = <1>; 2152 #size-cells = <0>; 2153 2154 port@0 { 2155 reg = <0>; 2156 }; 2157 2158 port@1 { 2159 reg = <1>; 2160 csi40isp0: endpoint { 2161 remote-endpoint = <&isp0csi40>; 2162 }; 2163 }; 2164 }; 2165 }; 2166 2167 csi41: csi2@fe540000 { 2168 compatible = "renesas,r8a779g0-csi2"; 2169 reg = <0 0xfe540000 0 0x40000>; 2170 interrupts = <GIC_SPI 500 IRQ_TYPE_LEVEL_HIGH>; 2171 clocks = <&cpg CPG_MOD 400>; 2172 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 2173 resets = <&cpg 400>; 2174 status = "disabled"; 2175 2176 ports { 2177 #address-cells = <1>; 2178 #size-cells = <0>; 2179 2180 port@0 { 2181 reg = <0>; 2182 }; 2183 2184 port@1 { 2185 reg = <1>; 2186 csi41isp1: endpoint { 2187 remote-endpoint = <&isp1csi41>; 2188 }; 2189 }; 2190 }; 2191 }; 2192 2193 fcpvd0: fcp@fea10000 { 2194 compatible = "renesas,fcpv"; 2195 reg = <0 0xfea10000 0 0x200>; 2196 clocks = <&cpg CPG_MOD 508>; 2197 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 2198 resets = <&cpg 508>; 2199 iommus = <&ipmmu_vi1 6>; 2200 }; 2201 2202 fcpvd1: fcp@fea11000 { 2203 compatible = "renesas,fcpv"; 2204 reg = <0 0xfea11000 0 0x200>; 2205 clocks = <&cpg CPG_MOD 509>; 2206 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 2207 resets = <&cpg 509>; 2208 iommus = <&ipmmu_vi1 7>; 2209 }; 2210 2211 fcpvx0: fcp@fedb0000 { 2212 compatible = "renesas,fcpv"; 2213 reg = <0 0xfedb0000 0 0x200>; 2214 clocks = <&cpg CPG_MOD 1100>; 2215 power-domains = <&sysc R8A779G0_PD_A3ISP0>; 2216 resets = <&cpg 1100>; 2217 iommus = <&ipmmu_vi1 24>; 2218 }; 2219 2220 fcpvx1: fcp@fedb8000 { 2221 compatible = "renesas,fcpv"; 2222 reg = <0 0xfedb8000 0 0x200>; 2223 clocks = <&cpg CPG_MOD 1101>; 2224 power-domains = <&sysc R8A779G0_PD_A3ISP1>; 2225 resets = <&cpg 1101>; 2226 iommus = <&ipmmu_vi1 25>; 2227 }; 2228 2229 vspd0: vsp@fea20000 { 2230 compatible = "renesas,vsp2"; 2231 reg = <0 0xfea20000 0 0x7000>; 2232 interrupts = <GIC_SPI 546 IRQ_TYPE_LEVEL_HIGH>; 2233 clocks = <&cpg CPG_MOD 830>; 2234 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 2235 resets = <&cpg 830>; 2236 2237 renesas,fcp = <&fcpvd0>; 2238 }; 2239 2240 vspd1: vsp@fea28000 { 2241 compatible = "renesas,vsp2"; 2242 reg = <0 0xfea28000 0 0x7000>; 2243 interrupts = <GIC_SPI 551 IRQ_TYPE_LEVEL_HIGH>; 2244 clocks = <&cpg CPG_MOD 831>; 2245 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 2246 resets = <&cpg 831>; 2247 2248 renesas,fcp = <&fcpvd1>; 2249 }; 2250 2251 vspx0: vsp@fedd0000 { 2252 compatible = "renesas,vsp2"; 2253 reg = <0 0xfedd0000 0 0x8000>; 2254 interrupts = <GIC_SPI 556 IRQ_TYPE_LEVEL_HIGH>; 2255 clocks = <&cpg CPG_MOD 1028>; 2256 power-domains = <&sysc R8A779G0_PD_A3ISP0>; 2257 resets = <&cpg 1028>; 2258 2259 renesas,fcp = <&fcpvx0>; 2260 }; 2261 2262 vspx1: vsp@fedd8000 { 2263 compatible = "renesas,vsp2"; 2264 reg = <0 0xfedd8000 0 0x8000>; 2265 interrupts = <GIC_SPI 557 IRQ_TYPE_LEVEL_HIGH>; 2266 clocks = <&cpg CPG_MOD 1029>; 2267 power-domains = <&sysc R8A779G0_PD_A3ISP1>; 2268 resets = <&cpg 1029>; 2269 2270 renesas,fcp = <&fcpvx1>; 2271 }; 2272 2273 du: display@feb00000 { 2274 compatible = "renesas,du-r8a779g0"; 2275 reg = <0 0xfeb00000 0 0x40000>; 2276 interrupts = <GIC_SPI 523 IRQ_TYPE_LEVEL_HIGH>, 2277 <GIC_SPI 524 IRQ_TYPE_LEVEL_HIGH>; 2278 clocks = <&cpg CPG_MOD 411>; 2279 clock-names = "du.0"; 2280 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 2281 resets = <&cpg 411>; 2282 reset-names = "du.0"; 2283 renesas,vsps = <&vspd0 0>, <&vspd1 0>; 2284 2285 status = "disabled"; 2286 2287 ports { 2288 #address-cells = <1>; 2289 #size-cells = <0>; 2290 2291 port@0 { 2292 reg = <0>; 2293 du_out_dsi0: endpoint { 2294 remote-endpoint = <&dsi0_in>; 2295 }; 2296 }; 2297 2298 port@1 { 2299 reg = <1>; 2300 du_out_dsi1: endpoint { 2301 remote-endpoint = <&dsi1_in>; 2302 }; 2303 }; 2304 }; 2305 }; 2306 2307 isp0: isp@fed00000 { 2308 compatible = "renesas,r8a779g0-isp", 2309 "renesas,rcar-gen4-isp"; 2310 reg = <0 0xfed00000 0 0x10000>, <0 0xfec00000 0 0x100000>; 2311 reg-names = "cs", "core"; 2312 interrupts = <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>, 2313 <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>; 2314 interrupt-names = "cs", "core"; 2315 clocks = <&cpg CPG_MOD 612>, <&cpg CPG_MOD 16>; 2316 clock-names = "cs", "core"; 2317 power-domains = <&sysc R8A779G0_PD_A3ISP0>; 2318 resets = <&cpg 612>, <&cpg 16>; 2319 reset-names = "cs", "core"; 2320 status = "disabled"; 2321 2322 renesas,vspx = <&vspx0>; 2323 2324 ports { 2325 #address-cells = <1>; 2326 #size-cells = <0>; 2327 2328 port@0 { 2329 #address-cells = <1>; 2330 #size-cells = <0>; 2331 2332 reg = <0>; 2333 2334 isp0csi40: endpoint@0 { 2335 reg = <0>; 2336 remote-endpoint = <&csi40isp0>; 2337 }; 2338 }; 2339 2340 port@1 { 2341 reg = <1>; 2342 isp0vin00: endpoint { 2343 remote-endpoint = <&vin00isp0>; 2344 }; 2345 }; 2346 2347 port@2 { 2348 reg = <2>; 2349 isp0vin01: endpoint { 2350 remote-endpoint = <&vin01isp0>; 2351 }; 2352 }; 2353 2354 port@3 { 2355 reg = <3>; 2356 isp0vin02: endpoint { 2357 remote-endpoint = <&vin02isp0>; 2358 }; 2359 }; 2360 2361 port@4 { 2362 reg = <4>; 2363 isp0vin03: endpoint { 2364 remote-endpoint = <&vin03isp0>; 2365 }; 2366 }; 2367 2368 port@5 { 2369 reg = <5>; 2370 isp0vin04: endpoint { 2371 remote-endpoint = <&vin04isp0>; 2372 }; 2373 }; 2374 2375 port@6 { 2376 reg = <6>; 2377 isp0vin05: endpoint { 2378 remote-endpoint = <&vin05isp0>; 2379 }; 2380 }; 2381 2382 port@7 { 2383 reg = <7>; 2384 isp0vin06: endpoint { 2385 remote-endpoint = <&vin06isp0>; 2386 }; 2387 }; 2388 2389 port@8 { 2390 reg = <8>; 2391 isp0vin07: endpoint { 2392 remote-endpoint = <&vin07isp0>; 2393 }; 2394 }; 2395 }; 2396 }; 2397 2398 isp1: isp@fed20000 { 2399 compatible = "renesas,r8a779g0-isp", 2400 "renesas,rcar-gen4-isp"; 2401 reg = <0 0xfed20000 0 0x10000>, <0 0xfee00000 0 0x100000>; 2402 reg-names = "cs", "core"; 2403 interrupts = <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>, 2404 <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>; 2405 interrupt-names = "cs", "core"; 2406 clocks = <&cpg CPG_MOD 613>, <&cpg CPG_MOD 17>; 2407 clock-names = "cs", "core"; 2408 power-domains = <&sysc R8A779G0_PD_A3ISP1>; 2409 resets = <&cpg 613>, <&cpg 17>; 2410 reset-names = "cs", "core"; 2411 status = "disabled"; 2412 2413 renesas,vspx = <&vspx1>; 2414 2415 ports { 2416 #address-cells = <1>; 2417 #size-cells = <0>; 2418 2419 port@0 { 2420 #address-cells = <1>; 2421 #size-cells = <0>; 2422 2423 reg = <0>; 2424 2425 isp1csi41: endpoint@1 { 2426 reg = <1>; 2427 remote-endpoint = <&csi41isp1>; 2428 }; 2429 }; 2430 2431 port@1 { 2432 reg = <1>; 2433 isp1vin08: endpoint { 2434 remote-endpoint = <&vin08isp1>; 2435 }; 2436 }; 2437 2438 port@2 { 2439 reg = <2>; 2440 isp1vin09: endpoint { 2441 remote-endpoint = <&vin09isp1>; 2442 }; 2443 }; 2444 2445 port@3 { 2446 reg = <3>; 2447 isp1vin10: endpoint { 2448 remote-endpoint = <&vin10isp1>; 2449 }; 2450 }; 2451 2452 port@4 { 2453 reg = <4>; 2454 isp1vin11: endpoint { 2455 remote-endpoint = <&vin11isp1>; 2456 }; 2457 }; 2458 2459 port@5 { 2460 reg = <5>; 2461 isp1vin12: endpoint { 2462 remote-endpoint = <&vin12isp1>; 2463 }; 2464 }; 2465 2466 port@6 { 2467 reg = <6>; 2468 isp1vin13: endpoint { 2469 remote-endpoint = <&vin13isp1>; 2470 }; 2471 }; 2472 2473 port@7 { 2474 reg = <7>; 2475 isp1vin14: endpoint { 2476 remote-endpoint = <&vin14isp1>; 2477 }; 2478 }; 2479 2480 port@8 { 2481 reg = <8>; 2482 isp1vin15: endpoint { 2483 remote-endpoint = <&vin15isp1>; 2484 }; 2485 }; 2486 }; 2487 }; 2488 2489 dsi0: dsi@fed80000 { 2490 compatible = "renesas,r8a779g0-dsi-csi2-tx"; 2491 reg = <0 0xfed80000 0 0x10000>; 2492 clocks = <&cpg CPG_MOD 415>, 2493 <&cpg CPG_CORE R8A779G0_CLK_DSIEXT>, 2494 <&cpg CPG_CORE R8A779G0_CLK_DSIREF>; 2495 clock-names = "fck", "dsi", "pll"; 2496 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 2497 resets = <&cpg 415>; 2498 2499 status = "disabled"; 2500 2501 ports { 2502 #address-cells = <1>; 2503 #size-cells = <0>; 2504 2505 port@0 { 2506 reg = <0>; 2507 dsi0_in: endpoint { 2508 remote-endpoint = <&du_out_dsi0>; 2509 }; 2510 }; 2511 2512 port@1 { 2513 reg = <1>; 2514 }; 2515 }; 2516 }; 2517 2518 dsi1: dsi@fed90000 { 2519 compatible = "renesas,r8a779g0-dsi-csi2-tx"; 2520 reg = <0 0xfed90000 0 0x10000>; 2521 clocks = <&cpg CPG_MOD 416>, 2522 <&cpg CPG_CORE R8A779G0_CLK_DSIEXT>, 2523 <&cpg CPG_CORE R8A779G0_CLK_DSIREF>; 2524 clock-names = "fck", "dsi", "pll"; 2525 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 2526 resets = <&cpg 416>; 2527 2528 status = "disabled"; 2529 2530 ports { 2531 #address-cells = <1>; 2532 #size-cells = <0>; 2533 2534 port@0 { 2535 reg = <0>; 2536 dsi1_in: endpoint { 2537 remote-endpoint = <&du_out_dsi1>; 2538 }; 2539 }; 2540 2541 port@1 { 2542 reg = <1>; 2543 }; 2544 }; 2545 }; 2546 2547 prr: chipid@fff00044 { 2548 compatible = "renesas,prr"; 2549 reg = <0 0xfff00044 0 4>; 2550 bootph-all; 2551 }; 2552 }; 2553 2554 thermal-zones { 2555 sensor_thermal_cr52: sensor1-thermal { 2556 polling-delay-passive = <250>; 2557 polling-delay = <1000>; 2558 thermal-sensors = <&tsc 0>; 2559 2560 trips { 2561 sensor1_crit: sensor1-crit { 2562 temperature = <120000>; 2563 hysteresis = <1000>; 2564 type = "critical"; 2565 }; 2566 }; 2567 }; 2568 2569 sensor_thermal_cnn: sensor2-thermal { 2570 polling-delay-passive = <250>; 2571 polling-delay = <1000>; 2572 thermal-sensors = <&tsc 1>; 2573 2574 trips { 2575 sensor2_crit: sensor2-crit { 2576 temperature = <120000>; 2577 hysteresis = <1000>; 2578 type = "critical"; 2579 }; 2580 }; 2581 }; 2582 2583 sensor_thermal_ca76: sensor3-thermal { 2584 polling-delay-passive = <250>; 2585 polling-delay = <1000>; 2586 thermal-sensors = <&tsc 2>; 2587 2588 trips { 2589 sensor3_crit: sensor3-crit { 2590 temperature = <120000>; 2591 hysteresis = <1000>; 2592 type = "critical"; 2593 }; 2594 }; 2595 }; 2596 2597 sensor_thermal_ddr1: sensor4-thermal { 2598 polling-delay-passive = <250>; 2599 polling-delay = <1000>; 2600 thermal-sensors = <&tsc 3>; 2601 2602 trips { 2603 sensor4_crit: sensor4-crit { 2604 temperature = <120000>; 2605 hysteresis = <1000>; 2606 type = "critical"; 2607 }; 2608 }; 2609 }; 2610 }; 2611 2612 timer { 2613 compatible = "arm,armv8-timer"; 2614 interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>, 2615 <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>, 2616 <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>, 2617 <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>, 2618 <GIC_PPI 12 IRQ_TYPE_LEVEL_LOW>; 2619 interrupt-names = "sec-phys", "phys", "virt", "hyp-phys", 2620 "hyp-virt"; 2621 }; 2622};
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