r8a779a0-falcon-cpu.dtsi

  1// SPDX-License-Identifier: GPL-2.0
  2/*
  3 * Device Tree Source for the Falcon CPU board
  4 *
  5 * Copyright (C) 2020 Renesas Electronics Corp.
  6 */
  7
  8#include <dt-bindings/gpio/gpio.h>
  9#include <dt-bindings/input/input.h>
 10#include <dt-bindings/leds/common.h>
 11
 12#include "r8a779a0.dtsi"
 13
 14/ {
 15	model = "Renesas Falcon CPU board";
 16	compatible = "renesas,falcon-cpu", "renesas,r8a779a0";
 17
 18	aliases {
 19		i2c0 = &i2c0;
 20		i2c1 = &i2c1;
 21		i2c2 = &i2c2;
 22		i2c3 = &i2c3;
 23		i2c4 = &i2c4;
 24		i2c5 = &i2c5;
 25		i2c6 = &i2c6;
 26		serial0 = &scif0;
 27	};
 28
 29	chosen {
 30		stdout-path = "serial0:115200n8";
 31	};
 32
 33	keys {
 34		compatible = "gpio-keys";
 35
 36		pinctrl-0 = <&keys_pins>;
 37		pinctrl-names = "default";
 38
 39		key-1 {
 40			gpios = <&gpio6 18 GPIO_ACTIVE_LOW>;
 41			linux,code = <KEY_1>;
 42			label = "SW47";
 43			wakeup-source;
 44			debounce-interval = <20>;
 45		};
 46
 47		key-2 {
 48			gpios = <&gpio6 19 GPIO_ACTIVE_LOW>;
 49			linux,code = <KEY_2>;
 50			label = "SW48";
 51			wakeup-source;
 52			debounce-interval = <20>;
 53		};
 54
 55		key-3 {
 56			gpios = <&gpio6 20 GPIO_ACTIVE_LOW>;
 57			linux,code = <KEY_3>;
 58			label = "SW49";
 59			wakeup-source;
 60			debounce-interval = <20>;
 61		};
 62	};
 63
 64	leds {
 65		compatible = "gpio-leds";
 66
 67		led-1 {
 68			gpios = <&gpio4 18 GPIO_ACTIVE_HIGH>;
 69			color = <LED_COLOR_ID_GREEN>;
 70			function = LED_FUNCTION_INDICATOR;
 71			function-enumerator = <1>;
 72		};
 73		led-2 {
 74			gpios = <&gpio4 19 GPIO_ACTIVE_HIGH>;
 75			color = <LED_COLOR_ID_GREEN>;
 76			function = LED_FUNCTION_INDICATOR;
 77			function-enumerator = <2>;
 78		};
 79		led-3 {
 80			gpios = <&gpio4 20 GPIO_ACTIVE_HIGH>;
 81			color = <LED_COLOR_ID_GREEN>;
 82			function = LED_FUNCTION_INDICATOR;
 83			function-enumerator = <3>;
 84		};
 85	};
 86
 87	memory@48000000 {
 88		device_type = "memory";
 89		/* first 128MB is reserved for secure area. */
 90		reg = <0x0 0x48000000 0x0 0x78000000>;
 91	};
 92
 93	memory@500000000 {
 94		device_type = "memory";
 95		reg = <0x5 0x00000000 0x0 0x80000000>;
 96	};
 97
 98	memory@600000000 {
 99		device_type = "memory";
100		reg = <0x6 0x00000000 0x0 0x80000000>;
101	};
102
103	memory@700000000 {
104		device_type = "memory";
105		reg = <0x7 0x00000000 0x0 0x80000000>;
106	};
107
108	mini-dp-con {
109		compatible = "dp-connector";
110		label = "CN5";
111		type = "mini";
112
113		port {
114			mini_dp_con_in: endpoint {
115				remote-endpoint = <&sn65dsi86_out>;
116			};
117		};
118	};
119
120	reg_1p2v: regulator-1p2v {
121		compatible = "regulator-fixed";
122		regulator-name = "fixed-1.2V";
123		regulator-min-microvolt = <1200000>;
124		regulator-max-microvolt = <1200000>;
125		regulator-boot-on;
126		regulator-always-on;
127	};
128
129	reg_1p8v: regulator-1p8v {
130		compatible = "regulator-fixed";
131		regulator-name = "fixed-1.8V";
132		regulator-min-microvolt = <1800000>;
133		regulator-max-microvolt = <1800000>;
134		regulator-boot-on;
135		regulator-always-on;
136	};
137
138	reg_3p3v: regulator-3p3v {
139		compatible = "regulator-fixed";
140		regulator-name = "fixed-3.3V";
141		regulator-min-microvolt = <3300000>;
142		regulator-max-microvolt = <3300000>;
143		regulator-boot-on;
144		regulator-always-on;
145	};
146
147	sn65dsi86_refclk: clk-x6 {
148		compatible = "fixed-clock";
149		#clock-cells = <0>;
150		clock-frequency = <38400000>;
151	};
152};
153
154&dsi0 {
155	status = "okay";
156
157	ports {
158		port@1 {
159			dsi0_out: endpoint {
160				remote-endpoint = <&sn65dsi86_in>;
161				data-lanes = <1 2 3 4>;
162			};
163		};
164	};
165};
166
167&du {
168	status = "okay";
169};
170
171&extal_clk {
172	clock-frequency = <16666666>;
173};
174
175&extalr_clk {
176	clock-frequency = <32768>;
177};
178
179&i2c0 {
180	pinctrl-0 = <&i2c0_pins>;
181	pinctrl-names = "default";
182
183	status = "okay";
184	clock-frequency = <400000>;
185
186	eeprom@50 {
187		compatible = "rohm,br24g01", "atmel,24c01";
188		label = "cpu-board";
189		reg = <0x50>;
190		pagesize = <8>;
191	};
192};
193
194&i2c1 {
195	pinctrl-0 = <&i2c1_pins>;
196	pinctrl-names = "default";
197
198	status = "okay";
199	clock-frequency = <400000>;
200
201	bridge@2c {
202		pinctrl-0 = <&irq0_pins>;
203		pinctrl-names = "default";
204
205		compatible = "ti,sn65dsi86";
206		reg = <0x2c>;
207
208		clocks = <&sn65dsi86_refclk>;
209		clock-names = "refclk";
210
211		interrupts-extended = <&intc_ex 0 IRQ_TYPE_LEVEL_HIGH>;
212
213		vccio-supply = <&reg_1p8v>;
214		vpll-supply = <&reg_1p8v>;
215		vcca-supply = <&reg_1p2v>;
216		vcc-supply = <&reg_1p2v>;
217
218		ports {
219			#address-cells = <1>;
220			#size-cells = <0>;
221
222			port@0 {
223				reg = <0>;
224				sn65dsi86_in: endpoint {
225					remote-endpoint = <&dsi0_out>;
226				};
227			};
228
229			port@1 {
230				reg = <1>;
231				sn65dsi86_out: endpoint {
232					remote-endpoint = <&mini_dp_con_in>;
233				};
234			};
235		};
236	};
237};
238
239&i2c6 {
240	pinctrl-0 = <&i2c6_pins>;
241	pinctrl-names = "default";
242
243	status = "okay";
244	clock-frequency = <400000>;
245};
246
247&mmc0 {
248	pinctrl-0 = <&mmc_pins>;
249	pinctrl-1 = <&mmc_pins>;
250	pinctrl-names = "default", "state_uhs";
251
252	vmmc-supply = <&reg_3p3v>;
253	vqmmc-supply = <&reg_1p8v>;
254	mmc-hs200-1_8v;
255	mmc-hs400-1_8v;
256	bus-width = <8>;
257	no-sd;
258	no-sdio;
259	non-removable;
260	full-pwr-cycle-in-suspend;
261	status = "okay";
262};
263
264&pfc {
265	pinctrl-0 = <&scif_clk_pins>;
266	pinctrl-names = "default";
267
268	i2c0_pins: i2c0 {
269		groups = "i2c0";
270		function = "i2c0";
271	};
272
273	i2c1_pins: i2c1 {
274		groups = "i2c1";
275		function = "i2c1";
276	};
277
278	i2c6_pins: i2c6 {
279		groups = "i2c6";
280		function = "i2c6";
281	};
282
283	irq0_pins: irq0 {
284		groups = "intc_ex_irq0";
285		function = "intc_ex";
286	};
287
288	keys_pins: keys {
289		pins = "GP_6_18", "GP_6_19", "GP_6_20";
290		bias-pull-up;
291	};
292
293	mmc_pins: mmc {
294		groups = "mmc_data8", "mmc_ctrl", "mmc_ds";
295		function = "mmc";
296		power-source = <1800>;
297	};
298
299	qspi0_pins: qspi0 {
300		groups = "qspi0_ctrl", "qspi0_data4";
301		function = "qspi0";
302	};
303
304	scif0_pins: scif0 {
305		groups = "scif0_data", "scif0_ctrl";
306		function = "scif0";
307	};
308
309	scif_clk_pins: scif_clk {
310		groups = "scif_clk";
311		function = "scif_clk";
312	};
313};
314
315&rpc {
316	pinctrl-0 = <&qspi0_pins>;
317	pinctrl-names = "default";
318
319	status = "okay";
320
321	flash@0 {
322		compatible = "spansion,s25fs512s", "jedec,spi-nor";
323		reg = <0>;
324		spi-max-frequency = <40000000>;
325		spi-rx-bus-width = <4>;
326
327		partitions {
328			compatible = "fixed-partitions";
329			#address-cells = <1>;
330			#size-cells = <1>;
331
332			boot@0 {
333				reg = <0x0 0xcc0000>;
334				read-only;
335			};
336			user@cc0000 {
337				reg = <0xcc0000 0x3340000>;
338			};
339		};
340	};
341};
342
343&rwdt {
344	timeout-sec = <60>;
345	status = "okay";
346};
347
348&scif0 {
349	pinctrl-0 = <&scif0_pins>;
350	pinctrl-names = "default";
351	bootph-all;
352
353	uart-has-rtscts;
354	status = "okay";
355};
356
357&scif_clk {
358	clock-frequency = <24000000>;
359};