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r8a77995.dtsi
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linux-6.19.14/arch/arm64/boot/dts/renesas/r8a77995.dtsi
1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for the R-Car D3 (R8A77995) SoC 4 * 5 * Copyright (C) 2016 Renesas Electronics Corp. 6 * Copyright (C) 2017 Glider bvba 7 */ 8 9#include <dt-bindings/clock/r8a77995-cpg-mssr.h> 10#include <dt-bindings/interrupt-controller/arm-gic.h> 11#include <dt-bindings/power/r8a77995-sysc.h> 12 13/ { 14 compatible = "renesas,r8a77995"; 15 #address-cells = <2>; 16 #size-cells = <2>; 17 interrupt-parent = <&gic>; 18 19 /* 20 * The external audio clocks are configured as 0 Hz fixed frequency 21 * clocks by default. 22 * Boards that provide audio clocks should override them. 23 */ 24 audio_clk_a: audio_clk_a { 25 compatible = "fixed-clock"; 26 #clock-cells = <0>; 27 clock-frequency = <0>; 28 }; 29 30 audio_clk_b: audio_clk_b { 31 compatible = "fixed-clock"; 32 #clock-cells = <0>; 33 clock-frequency = <0>; 34 }; 35 36 /* External CAN clock - to be overridden by boards that provide it */ 37 can_clk: can { 38 compatible = "fixed-clock"; 39 #clock-cells = <0>; 40 clock-frequency = <0>; 41 }; 42 43 cpus { 44 #address-cells = <1>; 45 #size-cells = <0>; 46 47 a53_0: cpu@0 { 48 compatible = "arm,cortex-a53"; 49 reg = <0x0>; 50 device_type = "cpu"; 51 power-domains = <&sysc R8A77995_PD_CA53_CPU0>; 52 next-level-cache = <&L2_CA53>; 53 enable-method = "psci"; 54 }; 55 56 L2_CA53: cache-controller-1 { 57 compatible = "cache"; 58 power-domains = <&sysc R8A77995_PD_CA53_SCU>; 59 cache-unified; 60 cache-level = <2>; 61 }; 62 }; 63 64 extal_clk: extal { 65 compatible = "fixed-clock"; 66 #clock-cells = <0>; 67 /* This value must be overridden by the board */ 68 clock-frequency = <0>; 69 bootph-all; 70 }; 71 72 pmu_a53 { 73 compatible = "arm,cortex-a53-pmu"; 74 interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>; 75 }; 76 77 psci { 78 compatible = "arm,psci-1.0", "arm,psci-0.2"; 79 method = "smc"; 80 }; 81 82 scif_clk: scif { 83 compatible = "fixed-clock"; 84 #clock-cells = <0>; 85 clock-frequency = <0>; 86 }; 87 88 soc { 89 compatible = "simple-bus"; 90 bootph-all; 91 92 #address-cells = <2>; 93 #size-cells = <2>; 94 ranges; 95 96 rwdt: watchdog@e6020000 { 97 compatible = "renesas,r8a77995-wdt", 98 "renesas,rcar-gen3-wdt"; 99 reg = <0 0xe6020000 0 0x0c>; 100 interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>; 101 clocks = <&cpg CPG_MOD 402>; 102 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; 103 resets = <&cpg 402>; 104 status = "disabled"; 105 }; 106 107 swdt: watchdog@e6030000 { 108 compatible = "renesas,r8a77995-wdt", "renesas,rcar-gen3-wdt"; 109 reg = <0 0xe6030000 0 0x0c>; 110 interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>; 111 clocks = <&cpg CPG_CORE R8A77995_CLK_OSC>; 112 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; 113 resets = <&cpg 401>; 114 status = "disabled"; 115 }; 116 117 gpio0: gpio@e6050000 { 118 compatible = "renesas,gpio-r8a77995", 119 "renesas,rcar-gen3-gpio"; 120 reg = <0 0xe6050000 0 0x50>; 121 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 122 #gpio-cells = <2>; 123 gpio-controller; 124 gpio-ranges = <&pfc 0 0 9>; 125 #interrupt-cells = <2>; 126 interrupt-controller; 127 clocks = <&cpg CPG_MOD 912>; 128 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; 129 resets = <&cpg 912>; 130 }; 131 132 gpio1: gpio@e6051000 { 133 compatible = "renesas,gpio-r8a77995", 134 "renesas,rcar-gen3-gpio"; 135 reg = <0 0xe6051000 0 0x50>; 136 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 137 #gpio-cells = <2>; 138 gpio-controller; 139 gpio-ranges = <&pfc 0 32 32>; 140 #interrupt-cells = <2>; 141 interrupt-controller; 142 clocks = <&cpg CPG_MOD 911>; 143 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; 144 resets = <&cpg 911>; 145 }; 146 147 gpio2: gpio@e6052000 { 148 compatible = "renesas,gpio-r8a77995", 149 "renesas,rcar-gen3-gpio"; 150 reg = <0 0xe6052000 0 0x50>; 151 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 152 #gpio-cells = <2>; 153 gpio-controller; 154 gpio-ranges = <&pfc 0 64 32>; 155 #interrupt-cells = <2>; 156 interrupt-controller; 157 clocks = <&cpg CPG_MOD 910>; 158 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; 159 resets = <&cpg 910>; 160 }; 161 162 gpio3: gpio@e6053000 { 163 compatible = "renesas,gpio-r8a77995", 164 "renesas,rcar-gen3-gpio"; 165 reg = <0 0xe6053000 0 0x50>; 166 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 167 #gpio-cells = <2>; 168 gpio-controller; 169 gpio-ranges = <&pfc 0 96 10>; 170 #interrupt-cells = <2>; 171 interrupt-controller; 172 clocks = <&cpg CPG_MOD 909>; 173 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; 174 resets = <&cpg 909>; 175 }; 176 177 gpio4: gpio@e6054000 { 178 compatible = "renesas,gpio-r8a77995", 179 "renesas,rcar-gen3-gpio"; 180 reg = <0 0xe6054000 0 0x50>; 181 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 182 #gpio-cells = <2>; 183 gpio-controller; 184 gpio-ranges = <&pfc 0 128 32>; 185 #interrupt-cells = <2>; 186 interrupt-controller; 187 clocks = <&cpg CPG_MOD 908>; 188 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; 189 resets = <&cpg 908>; 190 }; 191 192 gpio5: gpio@e6055000 { 193 compatible = "renesas,gpio-r8a77995", 194 "renesas,rcar-gen3-gpio"; 195 reg = <0 0xe6055000 0 0x50>; 196 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 197 #gpio-cells = <2>; 198 gpio-controller; 199 gpio-ranges = <&pfc 0 160 21>; 200 #interrupt-cells = <2>; 201 interrupt-controller; 202 clocks = <&cpg CPG_MOD 907>; 203 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; 204 resets = <&cpg 907>; 205 }; 206 207 gpio6: gpio@e6055400 { 208 compatible = "renesas,gpio-r8a77995", 209 "renesas,rcar-gen3-gpio"; 210 reg = <0 0xe6055400 0 0x50>; 211 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 212 #gpio-cells = <2>; 213 gpio-controller; 214 gpio-ranges = <&pfc 0 192 14>; 215 #interrupt-cells = <2>; 216 interrupt-controller; 217 clocks = <&cpg CPG_MOD 906>; 218 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; 219 resets = <&cpg 906>; 220 }; 221 222 pfc: pinctrl@e6060000 { 223 compatible = "renesas,pfc-r8a77995"; 224 reg = <0 0xe6060000 0 0x508>; 225 bootph-all; 226 }; 227 228 cmt0: timer@e60f0000 { 229 compatible = "renesas,r8a77995-cmt0", 230 "renesas,rcar-gen3-cmt0"; 231 reg = <0 0xe60f0000 0 0x1004>; 232 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, 233 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; 234 clocks = <&cpg CPG_MOD 303>; 235 clock-names = "fck"; 236 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; 237 resets = <&cpg 303>; 238 status = "disabled"; 239 }; 240 241 cmt1: timer@e6130000 { 242 compatible = "renesas,r8a77995-cmt1", 243 "renesas,rcar-gen3-cmt1"; 244 reg = <0 0xe6130000 0 0x1004>; 245 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, 246 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, 247 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, 248 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, 249 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, 250 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, 251 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, 252 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; 253 clocks = <&cpg CPG_MOD 302>; 254 clock-names = "fck"; 255 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; 256 resets = <&cpg 302>; 257 status = "disabled"; 258 }; 259 260 cmt2: timer@e6140000 { 261 compatible = "renesas,r8a77995-cmt1", 262 "renesas,rcar-gen3-cmt1"; 263 reg = <0 0xe6140000 0 0x1004>; 264 interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>, 265 <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>, 266 <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>, 267 <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>, 268 <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>, 269 <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>, 270 <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>, 271 <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>; 272 clocks = <&cpg CPG_MOD 301>; 273 clock-names = "fck"; 274 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; 275 resets = <&cpg 301>; 276 status = "disabled"; 277 }; 278 279 cmt3: timer@e6148000 { 280 compatible = "renesas,r8a77995-cmt1", 281 "renesas,rcar-gen3-cmt1"; 282 reg = <0 0xe6148000 0 0x1004>; 283 interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>, 284 <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>, 285 <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>, 286 <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>, 287 <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>, 288 <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>, 289 <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>, 290 <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>; 291 clocks = <&cpg CPG_MOD 300>; 292 clock-names = "fck"; 293 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; 294 resets = <&cpg 300>; 295 status = "disabled"; 296 }; 297 298 cpg: clock-controller@e6150000 { 299 compatible = "renesas,r8a77995-cpg-mssr"; 300 reg = <0 0xe6150000 0 0x1000>; 301 clocks = <&extal_clk>; 302 clock-names = "extal"; 303 #clock-cells = <2>; 304 #power-domain-cells = <0>; 305 #reset-cells = <1>; 306 bootph-all; 307 }; 308 309 rst: reset-controller@e6160000 { 310 compatible = "renesas,r8a77995-rst"; 311 reg = <0 0xe6160000 0 0x0200>; 312 bootph-all; 313 }; 314 315 sysc: system-controller@e6180000 { 316 compatible = "renesas,r8a77995-sysc"; 317 reg = <0 0xe6180000 0 0x0400>; 318 #power-domain-cells = <1>; 319 }; 320 321 thermal: thermal@e6190000 { 322 compatible = "renesas,thermal-r8a77995"; 323 reg = <0 0xe6190000 0 0x10>, <0 0xe6190100 0 0x38>; 324 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>, 325 <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>, 326 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; 327 clocks = <&cpg CPG_MOD 522>; 328 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; 329 resets = <&cpg 522>; 330 #thermal-sensor-cells = <0>; 331 }; 332 333 intc_ex: interrupt-controller@e61c0000 { 334 compatible = "renesas,intc-ex-r8a77995", "renesas,irqc"; 335 #interrupt-cells = <2>; 336 interrupt-controller; 337 reg = <0 0xe61c0000 0 0x200>; 338 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, 339 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, 340 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, 341 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, 342 <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>, 343 <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; 344 clocks = <&cpg CPG_MOD 407>; 345 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; 346 resets = <&cpg 407>; 347 }; 348 349 tmu0: timer@e61e0000 { 350 compatible = "renesas,tmu-r8a77995", "renesas,tmu"; 351 reg = <0 0xe61e0000 0 0x30>; 352 interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, 353 <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>, 354 <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; 355 interrupt-names = "tuni0", "tuni1", "tuni2"; 356 clocks = <&cpg CPG_MOD 125>; 357 clock-names = "fck"; 358 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; 359 resets = <&cpg 125>; 360 status = "disabled"; 361 }; 362 363 tmu1: timer@e6fc0000 { 364 compatible = "renesas,tmu-r8a77995", "renesas,tmu"; 365 reg = <0 0xe6fc0000 0 0x30>; 366 interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, 367 <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>, 368 <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, 369 <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>; 370 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2"; 371 clocks = <&cpg CPG_MOD 124>; 372 clock-names = "fck"; 373 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; 374 resets = <&cpg 124>; 375 status = "disabled"; 376 }; 377 378 tmu2: timer@e6fd0000 { 379 compatible = "renesas,tmu-r8a77995", "renesas,tmu"; 380 reg = <0 0xe6fd0000 0 0x30>; 381 interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>, 382 <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>, 383 <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>, 384 <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>; 385 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2"; 386 clocks = <&cpg CPG_MOD 123>; 387 clock-names = "fck"; 388 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; 389 resets = <&cpg 123>; 390 status = "disabled"; 391 }; 392 393 tmu3: timer@e6fe0000 { 394 compatible = "renesas,tmu-r8a77995", "renesas,tmu"; 395 reg = <0 0xe6fe0000 0 0x30>; 396 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, 397 <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>, 398 <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; 399 interrupt-names = "tuni0", "tuni1", "tuni2"; 400 clocks = <&cpg CPG_MOD 122>; 401 clock-names = "fck"; 402 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; 403 resets = <&cpg 122>; 404 status = "disabled"; 405 }; 406 407 tmu4: timer@ffc00000 { 408 compatible = "renesas,tmu-r8a77995", "renesas,tmu"; 409 reg = <0 0xffc00000 0 0x30>; 410 interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>, 411 <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>, 412 <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>; 413 interrupt-names = "tuni0", "tuni1", "tuni2"; 414 clocks = <&cpg CPG_MOD 121>; 415 clock-names = "fck"; 416 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; 417 resets = <&cpg 121>; 418 status = "disabled"; 419 }; 420 421 i2c0: i2c@e6500000 { 422 #address-cells = <1>; 423 #size-cells = <0>; 424 compatible = "renesas,i2c-r8a77995", 425 "renesas,rcar-gen3-i2c"; 426 reg = <0 0xe6500000 0 0x40>; 427 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; 428 clocks = <&cpg CPG_MOD 931>; 429 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; 430 resets = <&cpg 931>; 431 dmas = <&dmac1 0x91>, <&dmac1 0x90>, 432 <&dmac2 0x91>, <&dmac2 0x90>; 433 dma-names = "tx", "rx", "tx", "rx"; 434 i2c-scl-internal-delay-ns = <6>; 435 status = "disabled"; 436 }; 437 438 i2c1: i2c@e6508000 { 439 #address-cells = <1>; 440 #size-cells = <0>; 441 compatible = "renesas,i2c-r8a77995", 442 "renesas,rcar-gen3-i2c"; 443 reg = <0 0xe6508000 0 0x40>; 444 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; 445 clocks = <&cpg CPG_MOD 930>; 446 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; 447 resets = <&cpg 930>; 448 dmas = <&dmac1 0x93>, <&dmac1 0x92>, 449 <&dmac2 0x93>, <&dmac2 0x92>; 450 dma-names = "tx", "rx", "tx", "rx"; 451 i2c-scl-internal-delay-ns = <6>; 452 status = "disabled"; 453 }; 454 455 i2c2: i2c@e6510000 { 456 #address-cells = <1>; 457 #size-cells = <0>; 458 compatible = "renesas,i2c-r8a77995", 459 "renesas,rcar-gen3-i2c"; 460 reg = <0 0xe6510000 0 0x40>; 461 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; 462 clocks = <&cpg CPG_MOD 929>; 463 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; 464 resets = <&cpg 929>; 465 dmas = <&dmac1 0x95>, <&dmac1 0x94>, 466 <&dmac2 0x95>, <&dmac2 0x94>; 467 dma-names = "tx", "rx", "tx", "rx"; 468 i2c-scl-internal-delay-ns = <6>; 469 status = "disabled"; 470 }; 471 472 i2c3: i2c@e66d0000 { 473 #address-cells = <1>; 474 #size-cells = <0>; 475 compatible = "renesas,i2c-r8a77995", 476 "renesas,rcar-gen3-i2c"; 477 reg = <0 0xe66d0000 0 0x40>; 478 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; 479 clocks = <&cpg CPG_MOD 928>; 480 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; 481 resets = <&cpg 928>; 482 dmas = <&dmac0 0x97>, <&dmac0 0x96>; 483 dma-names = "tx", "rx"; 484 i2c-scl-internal-delay-ns = <6>; 485 status = "disabled"; 486 }; 487 488 hscif0: serial@e6540000 { 489 compatible = "renesas,hscif-r8a77995", 490 "renesas,rcar-gen3-hscif", 491 "renesas,hscif"; 492 reg = <0 0xe6540000 0 0x60>; 493 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; 494 clocks = <&cpg CPG_MOD 520>, 495 <&cpg CPG_CORE R8A77995_CLK_S3D1C>, 496 <&scif_clk>; 497 clock-names = "fck", "brg_int", "scif_clk"; 498 dmas = <&dmac1 0x31>, <&dmac1 0x30>, 499 <&dmac2 0x31>, <&dmac2 0x30>; 500 dma-names = "tx", "rx", "tx", "rx"; 501 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; 502 resets = <&cpg 520>; 503 status = "disabled"; 504 }; 505 506 hscif3: serial@e66a0000 { 507 compatible = "renesas,hscif-r8a77995", 508 "renesas,rcar-gen3-hscif", 509 "renesas,hscif"; 510 reg = <0 0xe66a0000 0 0x60>; 511 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; 512 clocks = <&cpg CPG_MOD 517>, 513 <&cpg CPG_CORE R8A77995_CLK_S3D1C>, 514 <&scif_clk>; 515 clock-names = "fck", "brg_int", "scif_clk"; 516 dmas = <&dmac0 0x37>, <&dmac0 0x36>; 517 dma-names = "tx", "rx"; 518 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; 519 resets = <&cpg 517>; 520 status = "disabled"; 521 }; 522 523 hsusb: usb@e6590000 { 524 compatible = "renesas,usbhs-r8a77995", 525 "renesas,rcar-gen3-usbhs"; 526 reg = <0 0xe6590000 0 0x200>; 527 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; 528 clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>; 529 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, 530 <&usb_dmac1 0>, <&usb_dmac1 1>; 531 dma-names = "ch0", "ch1", "ch2", "ch3"; 532 renesas,buswait = <11>; 533 phys = <&usb2_phy0 3>; 534 phy-names = "usb"; 535 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; 536 resets = <&cpg 704>, <&cpg 703>; 537 status = "disabled"; 538 }; 539 540 usb_dmac0: dma-controller@e65a0000 { 541 compatible = "renesas,r8a77995-usb-dmac", 542 "renesas,usb-dmac"; 543 reg = <0 0xe65a0000 0 0x100>; 544 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, 545 <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; 546 interrupt-names = "ch0", "ch1"; 547 clocks = <&cpg CPG_MOD 330>; 548 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; 549 resets = <&cpg 330>; 550 #dma-cells = <1>; 551 dma-channels = <2>; 552 }; 553 554 usb_dmac1: dma-controller@e65b0000 { 555 compatible = "renesas,r8a77995-usb-dmac", 556 "renesas,usb-dmac"; 557 reg = <0 0xe65b0000 0 0x100>; 558 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, 559 <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; 560 interrupt-names = "ch0", "ch1"; 561 clocks = <&cpg CPG_MOD 331>; 562 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; 563 resets = <&cpg 331>; 564 #dma-cells = <1>; 565 dma-channels = <2>; 566 }; 567 568 arm_cc630p: crypto@e6601000 { 569 compatible = "arm,cryptocell-630p-ree"; 570 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; 571 reg = <0x0 0xe6601000 0 0x1000>; 572 clocks = <&cpg CPG_MOD 229>; 573 resets = <&cpg 229>; 574 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; 575 }; 576 577 canfd: can@e66c0000 { 578 compatible = "renesas,r8a77995-canfd", 579 "renesas,rcar-gen3-canfd"; 580 reg = <0 0xe66c0000 0 0x8000>; 581 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>, 582 <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; 583 interrupt-names = "ch_int", "g_int"; 584 clocks = <&cpg CPG_MOD 914>, 585 <&cpg CPG_CORE R8A77995_CLK_CANFD>, 586 <&can_clk>; 587 clock-names = "fck", "canfd", "can_clk"; 588 assigned-clocks = <&cpg CPG_CORE R8A77995_CLK_CANFD>; 589 assigned-clock-rates = <40000000>; 590 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; 591 resets = <&cpg 914>; 592 status = "disabled"; 593 594 channel0 { 595 status = "disabled"; 596 }; 597 598 channel1 { 599 status = "disabled"; 600 }; 601 }; 602 603 dmac0: dma-controller@e6700000 { 604 compatible = "renesas,dmac-r8a77995", 605 "renesas,rcar-dmac"; 606 reg = <0 0xe6700000 0 0x10000>; 607 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>, 608 <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>, 609 <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>, 610 <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>, 611 <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>, 612 <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>, 613 <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>, 614 <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>, 615 <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>; 616 interrupt-names = "error", 617 "ch0", "ch1", "ch2", "ch3", 618 "ch4", "ch5", "ch6", "ch7"; 619 clocks = <&cpg CPG_MOD 219>; 620 clock-names = "fck"; 621 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; 622 resets = <&cpg 219>; 623 #dma-cells = <1>; 624 dma-channels = <8>; 625 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>, 626 <&ipmmu_ds0 2>, <&ipmmu_ds0 3>, 627 <&ipmmu_ds0 4>, <&ipmmu_ds0 5>, 628 <&ipmmu_ds0 6>, <&ipmmu_ds0 7>; 629 }; 630 631 dmac1: dma-controller@e7300000 { 632 compatible = "renesas,dmac-r8a77995", 633 "renesas,rcar-dmac"; 634 reg = <0 0xe7300000 0 0x10000>; 635 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>, 636 <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>, 637 <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>, 638 <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>, 639 <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>, 640 <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>, 641 <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>, 642 <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>, 643 <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>; 644 interrupt-names = "error", 645 "ch0", "ch1", "ch2", "ch3", 646 "ch4", "ch5", "ch6", "ch7"; 647 clocks = <&cpg CPG_MOD 218>; 648 clock-names = "fck"; 649 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; 650 resets = <&cpg 218>; 651 #dma-cells = <1>; 652 dma-channels = <8>; 653 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>, 654 <&ipmmu_ds1 2>, <&ipmmu_ds1 3>, 655 <&ipmmu_ds1 4>, <&ipmmu_ds1 5>, 656 <&ipmmu_ds1 6>, <&ipmmu_ds1 7>; 657 }; 658 659 dmac2: dma-controller@e7310000 { 660 compatible = "renesas,dmac-r8a77995", 661 "renesas,rcar-dmac"; 662 reg = <0 0xe7310000 0 0x10000>; 663 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>, 664 <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>, 665 <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>, 666 <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>, 667 <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>, 668 <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>, 669 <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>, 670 <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>, 671 <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>; 672 interrupt-names = "error", 673 "ch0", "ch1", "ch2", "ch3", 674 "ch4", "ch5", "ch6", "ch7"; 675 clocks = <&cpg CPG_MOD 217>; 676 clock-names = "fck"; 677 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; 678 resets = <&cpg 217>; 679 #dma-cells = <1>; 680 dma-channels = <8>; 681 iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>, 682 <&ipmmu_ds1 18>, <&ipmmu_ds1 19>, 683 <&ipmmu_ds1 20>, <&ipmmu_ds1 21>, 684 <&ipmmu_ds1 22>, <&ipmmu_ds1 23>; 685 }; 686 687 ipmmu_ds0: iommu@e6740000 { 688 compatible = "renesas,ipmmu-r8a77995"; 689 reg = <0 0xe6740000 0 0x1000>; 690 renesas,ipmmu-main = <&ipmmu_mm 0>; 691 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; 692 #iommu-cells = <1>; 693 }; 694 695 ipmmu_ds1: iommu@e7740000 { 696 compatible = "renesas,ipmmu-r8a77995"; 697 reg = <0 0xe7740000 0 0x1000>; 698 renesas,ipmmu-main = <&ipmmu_mm 1>; 699 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; 700 #iommu-cells = <1>; 701 }; 702 703 ipmmu_hc: iommu@e6570000 { 704 compatible = "renesas,ipmmu-r8a77995"; 705 reg = <0 0xe6570000 0 0x1000>; 706 renesas,ipmmu-main = <&ipmmu_mm 2>; 707 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; 708 #iommu-cells = <1>; 709 }; 710 711 ipmmu_mm: iommu@e67b0000 { 712 compatible = "renesas,ipmmu-r8a77995"; 713 reg = <0 0xe67b0000 0 0x1000>; 714 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>, 715 <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>; 716 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; 717 #iommu-cells = <1>; 718 }; 719 720 ipmmu_mp: iommu@ec670000 { 721 compatible = "renesas,ipmmu-r8a77995"; 722 reg = <0 0xec670000 0 0x1000>; 723 renesas,ipmmu-main = <&ipmmu_mm 4>; 724 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; 725 #iommu-cells = <1>; 726 }; 727 728 ipmmu_pv0: iommu@fd800000 { 729 compatible = "renesas,ipmmu-r8a77995"; 730 reg = <0 0xfd800000 0 0x1000>; 731 renesas,ipmmu-main = <&ipmmu_mm 6>; 732 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; 733 #iommu-cells = <1>; 734 }; 735 736 ipmmu_rt: iommu@ffc80000 { 737 compatible = "renesas,ipmmu-r8a77995"; 738 reg = <0 0xffc80000 0 0x1000>; 739 renesas,ipmmu-main = <&ipmmu_mm 10>; 740 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; 741 #iommu-cells = <1>; 742 }; 743 744 ipmmu_vc0: iommu@fe6b0000 { 745 compatible = "renesas,ipmmu-r8a77995"; 746 reg = <0 0xfe6b0000 0 0x1000>; 747 renesas,ipmmu-main = <&ipmmu_mm 12>; 748 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; 749 #iommu-cells = <1>; 750 }; 751 752 ipmmu_vi0: iommu@febd0000 { 753 compatible = "renesas,ipmmu-r8a77995"; 754 reg = <0 0xfebd0000 0 0x1000>; 755 renesas,ipmmu-main = <&ipmmu_mm 14>; 756 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; 757 #iommu-cells = <1>; 758 }; 759 760 ipmmu_vp0: iommu@fe990000 { 761 compatible = "renesas,ipmmu-r8a77995"; 762 reg = <0 0xfe990000 0 0x1000>; 763 renesas,ipmmu-main = <&ipmmu_mm 16>; 764 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; 765 #iommu-cells = <1>; 766 }; 767 768 avb: ethernet@e6800000 { 769 compatible = "renesas,etheravb-r8a77995", 770 "renesas,etheravb-rcar-gen3"; 771 reg = <0 0xe6800000 0 0x800>; 772 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, 773 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, 774 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, 775 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, 776 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, 777 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, 778 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, 779 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, 780 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, 781 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, 782 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, 783 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>, 784 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, 785 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, 786 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, 787 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, 788 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, 789 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, 790 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, 791 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, 792 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, 793 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>, 794 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>, 795 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>, 796 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; 797 interrupt-names = "ch0", "ch1", "ch2", "ch3", 798 "ch4", "ch5", "ch6", "ch7", 799 "ch8", "ch9", "ch10", "ch11", 800 "ch12", "ch13", "ch14", "ch15", 801 "ch16", "ch17", "ch18", "ch19", 802 "ch20", "ch21", "ch22", "ch23", 803 "ch24"; 804 clocks = <&cpg CPG_MOD 812>; 805 clock-names = "fck"; 806 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; 807 resets = <&cpg 812>; 808 phy-mode = "rgmii"; 809 rx-internal-delay-ps = <1800>; 810 iommus = <&ipmmu_ds0 16>; 811 #address-cells = <1>; 812 #size-cells = <0>; 813 status = "disabled"; 814 }; 815 816 can0: can@e6c30000 { 817 compatible = "renesas,can-r8a77995", 818 "renesas,rcar-gen3-can"; 819 reg = <0 0xe6c30000 0 0x1000>; 820 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; 821 clocks = <&cpg CPG_MOD 916>, 822 <&cpg CPG_CORE R8A77995_CLK_CANFD>, 823 <&can_clk>; 824 clock-names = "clkp1", "clkp2", "can_clk"; 825 assigned-clocks = <&cpg CPG_CORE R8A77995_CLK_CANFD>; 826 assigned-clock-rates = <40000000>; 827 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; 828 resets = <&cpg 916>; 829 status = "disabled"; 830 }; 831 832 can1: can@e6c38000 { 833 compatible = "renesas,can-r8a77995", 834 "renesas,rcar-gen3-can"; 835 reg = <0 0xe6c38000 0 0x1000>; 836 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; 837 clocks = <&cpg CPG_MOD 915>, 838 <&cpg CPG_CORE R8A77995_CLK_CANFD>, 839 <&can_clk>; 840 clock-names = "clkp1", "clkp2", "can_clk"; 841 assigned-clocks = <&cpg CPG_CORE R8A77995_CLK_CANFD>; 842 assigned-clock-rates = <40000000>; 843 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; 844 resets = <&cpg 915>; 845 status = "disabled"; 846 }; 847 848 pwm0: pwm@e6e30000 { 849 compatible = "renesas,pwm-r8a77995", "renesas,pwm-rcar"; 850 reg = <0 0xe6e30000 0 0x8>; 851 #pwm-cells = <2>; 852 clocks = <&cpg CPG_MOD 523>; 853 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; 854 resets = <&cpg 523>; 855 status = "disabled"; 856 }; 857 858 pwm1: pwm@e6e31000 { 859 compatible = "renesas,pwm-r8a77995", "renesas,pwm-rcar"; 860 reg = <0 0xe6e31000 0 0x8>; 861 #pwm-cells = <2>; 862 clocks = <&cpg CPG_MOD 523>; 863 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; 864 resets = <&cpg 523>; 865 status = "disabled"; 866 }; 867 868 pwm2: pwm@e6e32000 { 869 compatible = "renesas,pwm-r8a77995", "renesas,pwm-rcar"; 870 reg = <0 0xe6e32000 0 0x8>; 871 #pwm-cells = <2>; 872 clocks = <&cpg CPG_MOD 523>; 873 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; 874 resets = <&cpg 523>; 875 status = "disabled"; 876 }; 877 878 pwm3: pwm@e6e33000 { 879 compatible = "renesas,pwm-r8a77995", "renesas,pwm-rcar"; 880 reg = <0 0xe6e33000 0 0x8>; 881 #pwm-cells = <2>; 882 clocks = <&cpg CPG_MOD 523>; 883 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; 884 resets = <&cpg 523>; 885 status = "disabled"; 886 }; 887 888 scif0: serial@e6e60000 { 889 compatible = "renesas,scif-r8a77995", 890 "renesas,rcar-gen3-scif", "renesas,scif"; 891 reg = <0 0xe6e60000 0 64>; 892 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; 893 clocks = <&cpg CPG_MOD 207>, 894 <&cpg CPG_CORE R8A77995_CLK_S3D1C>, 895 <&scif_clk>; 896 clock-names = "fck", "brg_int", "scif_clk"; 897 dmas = <&dmac1 0x51>, <&dmac1 0x50>, 898 <&dmac2 0x51>, <&dmac2 0x50>; 899 dma-names = "tx", "rx", "tx", "rx"; 900 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; 901 resets = <&cpg 207>; 902 status = "disabled"; 903 }; 904 905 scif1: serial@e6e68000 { 906 compatible = "renesas,scif-r8a77995", 907 "renesas,rcar-gen3-scif", "renesas,scif"; 908 reg = <0 0xe6e68000 0 64>; 909 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; 910 clocks = <&cpg CPG_MOD 206>, 911 <&cpg CPG_CORE R8A77995_CLK_S3D1C>, 912 <&scif_clk>; 913 clock-names = "fck", "brg_int", "scif_clk"; 914 dmas = <&dmac1 0x53>, <&dmac1 0x52>, 915 <&dmac2 0x53>, <&dmac2 0x52>; 916 dma-names = "tx", "rx", "tx", "rx"; 917 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; 918 resets = <&cpg 206>; 919 status = "disabled"; 920 }; 921 922 scif2: serial@e6e88000 { 923 compatible = "renesas,scif-r8a77995", 924 "renesas,rcar-gen3-scif", "renesas,scif"; 925 reg = <0 0xe6e88000 0 64>; 926 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; 927 clocks = <&cpg CPG_MOD 310>, 928 <&cpg CPG_CORE R8A77995_CLK_S3D1C>, 929 <&scif_clk>; 930 clock-names = "fck", "brg_int", "scif_clk"; 931 dmas = <&dmac1 0x13>, <&dmac1 0x12>, 932 <&dmac2 0x13>, <&dmac2 0x12>; 933 dma-names = "tx", "rx", "tx", "rx"; 934 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; 935 resets = <&cpg 310>; 936 status = "disabled"; 937 }; 938 939 scif3: serial@e6c50000 { 940 compatible = "renesas,scif-r8a77995", 941 "renesas,rcar-gen3-scif", "renesas,scif"; 942 reg = <0 0xe6c50000 0 64>; 943 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 944 clocks = <&cpg CPG_MOD 204>, 945 <&cpg CPG_CORE R8A77995_CLK_S3D1C>, 946 <&scif_clk>; 947 clock-names = "fck", "brg_int", "scif_clk"; 948 dmas = <&dmac0 0x57>, <&dmac0 0x56>; 949 dma-names = "tx", "rx"; 950 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; 951 resets = <&cpg 204>; 952 status = "disabled"; 953 }; 954 955 scif4: serial@e6c40000 { 956 compatible = "renesas,scif-r8a77995", 957 "renesas,rcar-gen3-scif", "renesas,scif"; 958 reg = <0 0xe6c40000 0 64>; 959 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; 960 clocks = <&cpg CPG_MOD 203>, 961 <&cpg CPG_CORE R8A77995_CLK_S3D1C>, 962 <&scif_clk>; 963 clock-names = "fck", "brg_int", "scif_clk"; 964 dmas = <&dmac0 0x59>, <&dmac0 0x58>; 965 dma-names = "tx", "rx"; 966 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; 967 resets = <&cpg 203>; 968 status = "disabled"; 969 }; 970 971 scif5: serial@e6f30000 { 972 compatible = "renesas,scif-r8a77995", 973 "renesas,rcar-gen3-scif", "renesas,scif"; 974 reg = <0 0xe6f30000 0 64>; 975 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 976 clocks = <&cpg CPG_MOD 202>, 977 <&cpg CPG_CORE R8A77995_CLK_S3D1C>, 978 <&scif_clk>; 979 clock-names = "fck", "brg_int", "scif_clk"; 980 dmas = <&dmac1 0x5b>, <&dmac1 0x5a>, 981 <&dmac2 0x5b>, <&dmac2 0x5a>; 982 dma-names = "tx", "rx", "tx", "rx"; 983 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; 984 resets = <&cpg 202>; 985 status = "disabled"; 986 }; 987 988 msiof0: spi@e6e90000 { 989 compatible = "renesas,msiof-r8a77995", 990 "renesas,rcar-gen3-msiof"; 991 reg = <0 0xe6e90000 0 0x64>; 992 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; 993 clocks = <&cpg CPG_MOD 211>; 994 dmas = <&dmac1 0x41>, <&dmac1 0x40>, 995 <&dmac2 0x41>, <&dmac2 0x40>; 996 dma-names = "tx", "rx", "tx", "rx"; 997 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; 998 resets = <&cpg 211>; 999 #address-cells = <1>; 1000 #size-cells = <0>; 1001 status = "disabled"; 1002 }; 1003 1004 msiof1: spi@e6ea0000 { 1005 compatible = "renesas,msiof-r8a77995", 1006 "renesas,rcar-gen3-msiof"; 1007 reg = <0 0xe6ea0000 0 0x64>; 1008 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; 1009 clocks = <&cpg CPG_MOD 210>; 1010 dmas = <&dmac1 0x43>, <&dmac1 0x42>, 1011 <&dmac2 0x43>, <&dmac2 0x42>; 1012 dma-names = "tx", "rx", "tx", "rx"; 1013 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; 1014 resets = <&cpg 210>; 1015 #address-cells = <1>; 1016 #size-cells = <0>; 1017 status = "disabled"; 1018 }; 1019 1020 msiof2: spi@e6c00000 { 1021 compatible = "renesas,msiof-r8a77995", 1022 "renesas,rcar-gen3-msiof"; 1023 reg = <0 0xe6c00000 0 0x64>; 1024 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; 1025 clocks = <&cpg CPG_MOD 209>; 1026 dmas = <&dmac0 0x45>, <&dmac0 0x44>; 1027 dma-names = "tx", "rx"; 1028 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; 1029 resets = <&cpg 209>; 1030 #address-cells = <1>; 1031 #size-cells = <0>; 1032 status = "disabled"; 1033 }; 1034 1035 msiof3: spi@e6c10000 { 1036 compatible = "renesas,msiof-r8a77995", 1037 "renesas,rcar-gen3-msiof"; 1038 reg = <0 0xe6c10000 0 0x64>; 1039 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; 1040 clocks = <&cpg CPG_MOD 208>; 1041 dmas = <&dmac0 0x47>, <&dmac0 0x46>; 1042 dma-names = "tx", "rx"; 1043 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; 1044 resets = <&cpg 208>; 1045 #address-cells = <1>; 1046 #size-cells = <0>; 1047 status = "disabled"; 1048 }; 1049 1050 vin4: video@e6ef4000 { 1051 compatible = "renesas,vin-r8a77995"; 1052 reg = <0 0xe6ef4000 0 0x1000>; 1053 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; 1054 clocks = <&cpg CPG_MOD 807>; 1055 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; 1056 resets = <&cpg 807>; 1057 renesas,id = <4>; 1058 status = "disabled"; 1059 }; 1060 1061 rcar_sound: sound@ec500000 { 1062 /* 1063 * #sound-dai-cells is required if simple-card 1064 * 1065 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; 1066 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; 1067 */ 1068 /* 1069 * #clock-cells is required for audio_clkout0/1/2/3 1070 * 1071 * clkout : #clock-cells = <0>; <&rcar_sound>; 1072 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>; 1073 */ 1074 compatible = "renesas,rcar_sound-r8a77995", "renesas,rcar_sound-gen3"; 1075 reg = <0 0xec500000 0 0x1000>, /* SCU */ 1076 <0 0xec5a0000 0 0x100>, /* ADG */ 1077 <0 0xec540000 0 0x1000>, /* SSIU */ 1078 <0 0xec541000 0 0x280>, /* SSI */ 1079 <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/ 1080 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; 1081 1082 clocks = <&cpg CPG_MOD 1005>, 1083 <&cpg CPG_MOD 1011>, <&cpg CPG_MOD 1012>, 1084 <&cpg CPG_MOD 1025>, <&cpg CPG_MOD 1026>, 1085 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 1086 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 1087 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, 1088 <&audio_clk_a>, <&audio_clk_b>, 1089 <&cpg CPG_MOD 922>; 1090 clock-names = "ssi-all", 1091 "ssi.4", "ssi.3", 1092 "src.6", "src.5", 1093 "mix.1", "mix.0", 1094 "ctu.1", "ctu.0", 1095 "dvc.0", "dvc.1", 1096 "clk_a", "clk_b", "clk_i"; 1097 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; 1098 resets = <&cpg 1005>, 1099 <&cpg 1011>, <&cpg 1012>; 1100 reset-names = "ssi-all", 1101 "ssi.4", "ssi.3"; 1102 status = "disabled"; 1103 1104 rcar_sound,ctu { 1105 ctu00: ctu-0 { }; 1106 ctu01: ctu-1 { }; 1107 ctu02: ctu-2 { }; 1108 ctu03: ctu-3 { }; 1109 ctu10: ctu-4 { }; 1110 ctu11: ctu-5 { }; 1111 ctu12: ctu-6 { }; 1112 ctu13: ctu-7 { }; 1113 }; 1114 1115 rcar_sound,dvc { 1116 dvc0: dvc-0 { 1117 dmas = <&audma0 0xbc>; 1118 dma-names = "tx"; 1119 }; 1120 dvc1: dvc-1 { 1121 dmas = <&audma0 0xbe>; 1122 dma-names = "tx"; 1123 }; 1124 }; 1125 1126 rcar_sound,mix { 1127 mix0: mix-0 { }; 1128 mix1: mix-1 { }; 1129 }; 1130 1131 rcar_sound,src { 1132 src5: src-5 { 1133 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; 1134 dmas = <&audma0 0x8f>, <&audma0 0xb2>; 1135 dma-names = "rx", "tx"; 1136 }; 1137 src6: src-6 { 1138 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; 1139 dmas = <&audma0 0x91>, <&audma0 0xb4>; 1140 dma-names = "rx", "tx"; 1141 }; 1142 }; 1143 1144 rcar_sound,ssi { 1145 ssi3: ssi-3 { 1146 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; 1147 dmas = <&audma0 0x07>, <&audma0 0x08>, 1148 <&audma0 0x6f>, <&audma0 0x70>; 1149 dma-names = "rx", "tx", "rxu", "txu"; 1150 }; 1151 ssi4: ssi-4 { 1152 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; 1153 dmas = <&audma0 0x09>, <&audma0 0x0a>, 1154 <&audma0 0x71>, <&audma0 0x72>; 1155 dma-names = "rx", "tx", "rxu", "txu"; 1156 }; 1157 }; 1158 }; 1159 1160 mlp: mlp@ec520000 { 1161 compatible = "renesas,r8a77995-mlp", 1162 "renesas,rcar-gen3-mlp"; 1163 reg = <0 0xec520000 0 0x800>; 1164 interrupts = <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>, 1165 <GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH>; 1166 clocks = <&cpg CPG_MOD 802>; 1167 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; 1168 resets = <&cpg 802>; 1169 status = "disabled"; 1170 }; 1171 1172 audma0: dma-controller@ec700000 { 1173 compatible = "renesas,dmac-r8a77995", 1174 "renesas,rcar-dmac"; 1175 reg = <0 0xec700000 0 0x10000>; 1176 interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>, 1177 <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>, 1178 <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>, 1179 <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>, 1180 <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>, 1181 <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>, 1182 <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>, 1183 <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>, 1184 <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>, 1185 <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>, 1186 <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>, 1187 <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>, 1188 <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>, 1189 <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>, 1190 <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>, 1191 <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>, 1192 <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>; 1193 interrupt-names = "error", 1194 "ch0", "ch1", "ch2", "ch3", 1195 "ch4", "ch5", "ch6", "ch7", 1196 "ch8", "ch9", "ch10", "ch11", 1197 "ch12", "ch13", "ch14", "ch15"; 1198 clocks = <&cpg CPG_MOD 502>; 1199 clock-names = "fck"; 1200 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; 1201 resets = <&cpg 502>; 1202 #dma-cells = <1>; 1203 dma-channels = <16>; 1204 iommus = <&ipmmu_mp 0>, <&ipmmu_mp 1>, 1205 <&ipmmu_mp 2>, <&ipmmu_mp 3>, 1206 <&ipmmu_mp 4>, <&ipmmu_mp 5>, 1207 <&ipmmu_mp 6>, <&ipmmu_mp 7>, 1208 <&ipmmu_mp 8>, <&ipmmu_mp 9>, 1209 <&ipmmu_mp 10>, <&ipmmu_mp 11>, 1210 <&ipmmu_mp 12>, <&ipmmu_mp 13>, 1211 <&ipmmu_mp 14>, <&ipmmu_mp 15>; 1212 }; 1213 1214 ohci0: usb@ee080000 { 1215 compatible = "generic-ohci"; 1216 reg = <0 0xee080000 0 0x100>; 1217 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1218 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 1219 phys = <&usb2_phy0 1>; 1220 phy-names = "usb"; 1221 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; 1222 resets = <&cpg 703>, <&cpg 704>; 1223 status = "disabled"; 1224 }; 1225 1226 ehci0: usb@ee080100 { 1227 compatible = "generic-ehci"; 1228 reg = <0 0xee080100 0 0x100>; 1229 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1230 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 1231 phys = <&usb2_phy0 2>; 1232 phy-names = "usb"; 1233 companion = <&ohci0>; 1234 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; 1235 resets = <&cpg 703>, <&cpg 704>; 1236 status = "disabled"; 1237 }; 1238 1239 usb2_phy0: usb-phy@ee080200 { 1240 compatible = "renesas,usb2-phy-r8a77995", 1241 "renesas,rcar-gen3-usb2-phy"; 1242 reg = <0 0xee080200 0 0x700>; 1243 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1244 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 1245 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; 1246 resets = <&cpg 703>, <&cpg 704>; 1247 #phy-cells = <1>; 1248 status = "disabled"; 1249 }; 1250 1251 sdhi2: mmc@ee140000 { 1252 compatible = "renesas,sdhi-r8a77995", 1253 "renesas,rcar-gen3-sdhi"; 1254 reg = <0 0xee140000 0 0x2000>; 1255 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; 1256 clocks = <&cpg CPG_MOD 312>, <&cpg CPG_CORE R8A77995_CLK_SD0H>; 1257 clock-names = "core", "clkh"; 1258 max-frequency = <200000000>; 1259 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; 1260 resets = <&cpg 312>; 1261 iommus = <&ipmmu_ds1 34>; 1262 status = "disabled"; 1263 }; 1264 1265 rpc: spi@ee200000 { 1266 compatible = "renesas,r8a77995-rpc-if", 1267 "renesas,rcar-gen3-rpc-if"; 1268 reg = <0 0xee200000 0 0x200>, 1269 <0 0x08000000 0 0x04000000>, 1270 <0 0xee208000 0 0x100>; 1271 reg-names = "regs", "dirmap", "wbuf"; 1272 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; 1273 clocks = <&cpg CPG_MOD 917>; 1274 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; 1275 resets = <&cpg 917>; 1276 #address-cells = <1>; 1277 #size-cells = <0>; 1278 status = "disabled"; 1279 }; 1280 1281 gic: interrupt-controller@f1010000 { 1282 compatible = "arm,gic-400"; 1283 #interrupt-cells = <3>; 1284 #address-cells = <0>; 1285 interrupt-controller; 1286 reg = <0x0 0xf1010000 0 0x1000>, 1287 <0x0 0xf1020000 0 0x20000>, 1288 <0x0 0xf1040000 0 0x20000>, 1289 <0x0 0xf1060000 0 0x20000>; 1290 interrupts = <GIC_PPI 9 1291 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_HIGH)>; 1292 clocks = <&cpg CPG_MOD 408>; 1293 clock-names = "clk"; 1294 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; 1295 resets = <&cpg 408>; 1296 }; 1297 1298 vspbs: vsp@fe960000 { 1299 compatible = "renesas,vsp2"; 1300 reg = <0 0xfe960000 0 0x8000>; 1301 interrupts = <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>; 1302 clocks = <&cpg CPG_MOD 627>; 1303 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; 1304 resets = <&cpg 627>; 1305 renesas,fcp = <&fcpvb0>; 1306 }; 1307 1308 vspd0: vsp@fea20000 { 1309 compatible = "renesas,vsp2"; 1310 reg = <0 0xfea20000 0 0x5000>; 1311 interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>; 1312 clocks = <&cpg CPG_MOD 623>; 1313 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; 1314 resets = <&cpg 623>; 1315 renesas,fcp = <&fcpvd0>; 1316 }; 1317 1318 vspd1: vsp@fea28000 { 1319 compatible = "renesas,vsp2"; 1320 reg = <0 0xfea28000 0 0x5000>; 1321 interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>; 1322 clocks = <&cpg CPG_MOD 622>; 1323 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; 1324 resets = <&cpg 622>; 1325 renesas,fcp = <&fcpvd1>; 1326 }; 1327 1328 fcpvb0: fcp@fe96f000 { 1329 compatible = "renesas,fcpv"; 1330 reg = <0 0xfe96f000 0 0x200>; 1331 clocks = <&cpg CPG_MOD 607>; 1332 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; 1333 resets = <&cpg 607>; 1334 iommus = <&ipmmu_vp0 5>; 1335 }; 1336 1337 fcpvd0: fcp@fea27000 { 1338 compatible = "renesas,fcpv"; 1339 reg = <0 0xfea27000 0 0x200>; 1340 clocks = <&cpg CPG_MOD 603>; 1341 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; 1342 resets = <&cpg 603>; 1343 iommus = <&ipmmu_vi0 8>; 1344 }; 1345 1346 fcpvd1: fcp@fea2f000 { 1347 compatible = "renesas,fcpv"; 1348 reg = <0 0xfea2f000 0 0x200>; 1349 clocks = <&cpg CPG_MOD 602>; 1350 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; 1351 resets = <&cpg 602>; 1352 iommus = <&ipmmu_vi0 9>; 1353 }; 1354 1355 cmm0: cmm@fea40000 { 1356 compatible = "renesas,r8a77995-cmm", 1357 "renesas,rcar-gen3-cmm"; 1358 reg = <0 0xfea40000 0 0x1000>; 1359 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; 1360 clocks = <&cpg CPG_MOD 711>; 1361 resets = <&cpg 711>; 1362 }; 1363 1364 cmm1: cmm@fea50000 { 1365 compatible = "renesas,r8a77995-cmm", 1366 "renesas,rcar-gen3-cmm"; 1367 reg = <0 0xfea50000 0 0x1000>; 1368 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; 1369 clocks = <&cpg CPG_MOD 710>; 1370 resets = <&cpg 710>; 1371 }; 1372 1373 du: display@feb00000 { 1374 compatible = "renesas,du-r8a77995"; 1375 reg = <0 0xfeb00000 0 0x40000>; 1376 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, 1377 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>; 1378 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>; 1379 clock-names = "du.0", "du.1"; 1380 resets = <&cpg 724>; 1381 reset-names = "du.0"; 1382 1383 renesas,cmms = <&cmm0>, <&cmm1>; 1384 renesas,vsps = <&vspd0 0>, <&vspd1 0>; 1385 1386 status = "disabled"; 1387 1388 ports { 1389 #address-cells = <1>; 1390 #size-cells = <0>; 1391 1392 port@0 { 1393 reg = <0>; 1394 }; 1395 1396 port@1 { 1397 reg = <1>; 1398 du_out_lvds0: endpoint { 1399 remote-endpoint = <&lvds0_in>; 1400 }; 1401 }; 1402 1403 port@2 { 1404 reg = <2>; 1405 du_out_lvds1: endpoint { 1406 remote-endpoint = <&lvds1_in>; 1407 }; 1408 }; 1409 }; 1410 }; 1411 1412 lvds0: lvds-encoder@feb90000 { 1413 compatible = "renesas,r8a77995-lvds"; 1414 reg = <0 0xfeb90000 0 0x20>; 1415 clocks = <&cpg CPG_MOD 727>; 1416 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; 1417 resets = <&cpg 727>; 1418 status = "disabled"; 1419 1420 renesas,companion = <&lvds1>; 1421 1422 ports { 1423 #address-cells = <1>; 1424 #size-cells = <0>; 1425 1426 port@0 { 1427 reg = <0>; 1428 lvds0_in: endpoint { 1429 remote-endpoint = <&du_out_lvds0>; 1430 }; 1431 }; 1432 1433 port@1 { 1434 reg = <1>; 1435 }; 1436 }; 1437 }; 1438 1439 lvds1: lvds-encoder@feb90100 { 1440 compatible = "renesas,r8a77995-lvds"; 1441 reg = <0 0xfeb90100 0 0x20>; 1442 clocks = <&cpg CPG_MOD 727>; 1443 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; 1444 resets = <&cpg 726>; 1445 status = "disabled"; 1446 1447 ports { 1448 #address-cells = <1>; 1449 #size-cells = <0>; 1450 1451 port@0 { 1452 reg = <0>; 1453 lvds1_in: endpoint { 1454 remote-endpoint = <&du_out_lvds1>; 1455 }; 1456 }; 1457 1458 port@1 { 1459 reg = <1>; 1460 }; 1461 }; 1462 }; 1463 1464 prr: chipid@fff00044 { 1465 compatible = "renesas,prr"; 1466 reg = <0 0xfff00044 0 4>; 1467 bootph-all; 1468 }; 1469 }; 1470 1471 thermal-zones { 1472 cpu_thermal: cpu-thermal { 1473 polling-delay-passive = <250>; 1474 polling-delay = <1000>; 1475 thermal-sensors = <&thermal>; 1476 1477 cooling-maps { 1478 }; 1479 1480 trips { 1481 cpu-crit { 1482 temperature = <120000>; 1483 hysteresis = <2000>; 1484 type = "critical"; 1485 }; 1486 }; 1487 }; 1488 }; 1489 1490 timer { 1491 compatible = "arm,armv8-timer"; 1492 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>, 1493 <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>, 1494 <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>, 1495 <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>; 1496 interrupt-names = "sec-phys", "phys", "virt", "hyp-phys"; 1497 }; 1498};
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