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r8a77965.dtsi
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linux-6.19.14/arch/arm64/boot/dts/renesas/r8a77965.dtsi
1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for the R-Car M3-N (R8A77965) SoC 4 * 5 * Copyright (C) 2018 Jacopo Mondi <jacopo+renesas@jmondi.org> 6 * 7 * Based on r8a7796.dtsi 8 * Copyright (C) 2016 Renesas Electronics Corp. 9 */ 10 11#include <dt-bindings/clock/r8a77965-cpg-mssr.h> 12#include <dt-bindings/interrupt-controller/arm-gic.h> 13#include <dt-bindings/power/r8a77965-sysc.h> 14 15#define SOC_HAS_SATA 16 17/ { 18 compatible = "renesas,r8a77965"; 19 #address-cells = <2>; 20 #size-cells = <2>; 21 interrupt-parent = <&gic>; 22 23 /* 24 * The external audio clocks are configured as 0 Hz fixed frequency 25 * clocks by default. 26 * Boards that provide audio clocks should override them. 27 */ 28 audio_clk_a: audio_clk_a { 29 compatible = "fixed-clock"; 30 #clock-cells = <0>; 31 clock-frequency = <0>; 32 }; 33 34 audio_clk_b: audio_clk_b { 35 compatible = "fixed-clock"; 36 #clock-cells = <0>; 37 clock-frequency = <0>; 38 }; 39 40 audio_clk_c: audio_clk_c { 41 compatible = "fixed-clock"; 42 #clock-cells = <0>; 43 clock-frequency = <0>; 44 }; 45 46 /* External CAN clock - to be overridden by boards that provide it */ 47 can_clk: can { 48 compatible = "fixed-clock"; 49 #clock-cells = <0>; 50 clock-frequency = <0>; 51 }; 52 53 cluster0_opp: opp-table-0 { 54 compatible = "operating-points-v2"; 55 opp-shared; 56 57 opp-500000000 { 58 opp-hz = /bits/ 64 <500000000>; 59 opp-microvolt = <830000>; 60 clock-latency-ns = <300000>; 61 }; 62 opp-1000000000 { 63 opp-hz = /bits/ 64 <1000000000>; 64 opp-microvolt = <830000>; 65 clock-latency-ns = <300000>; 66 }; 67 opp-1500000000 { 68 opp-hz = /bits/ 64 <1500000000>; 69 opp-microvolt = <830000>; 70 clock-latency-ns = <300000>; 71 opp-suspend; 72 }; 73 opp-1600000000 { 74 opp-hz = /bits/ 64 <1600000000>; 75 opp-microvolt = <900000>; 76 clock-latency-ns = <300000>; 77 }; 78 opp-1700000000 { 79 opp-hz = /bits/ 64 <1700000000>; 80 opp-microvolt = <900000>; 81 clock-latency-ns = <300000>; 82 }; 83 opp-1800000000 { 84 opp-hz = /bits/ 64 <1800000000>; 85 opp-microvolt = <960000>; 86 clock-latency-ns = <300000>; 87 turbo-mode; 88 }; 89 }; 90 91 cpus { 92 #address-cells = <1>; 93 #size-cells = <0>; 94 95 a57_0: cpu@0 { 96 compatible = "arm,cortex-a57"; 97 reg = <0x0>; 98 device_type = "cpu"; 99 power-domains = <&sysc R8A77965_PD_CA57_CPU0>; 100 next-level-cache = <&L2_CA57>; 101 enable-method = "psci"; 102 cpu-idle-states = <&CPU_SLEEP_0>; 103 #cooling-cells = <2>; 104 dynamic-power-coefficient = <854>; 105 clocks = <&cpg CPG_CORE R8A77965_CLK_Z>; 106 operating-points-v2 = <&cluster0_opp>; 107 }; 108 109 a57_1: cpu@1 { 110 compatible = "arm,cortex-a57"; 111 reg = <0x1>; 112 device_type = "cpu"; 113 power-domains = <&sysc R8A77965_PD_CA57_CPU1>; 114 next-level-cache = <&L2_CA57>; 115 enable-method = "psci"; 116 cpu-idle-states = <&CPU_SLEEP_0>; 117 clocks = <&cpg CPG_CORE R8A77965_CLK_Z>; 118 operating-points-v2 = <&cluster0_opp>; 119 }; 120 121 L2_CA57: cache-controller-0 { 122 compatible = "cache"; 123 power-domains = <&sysc R8A77965_PD_CA57_SCU>; 124 cache-unified; 125 cache-level = <2>; 126 }; 127 128 idle-states { 129 entry-method = "psci"; 130 131 CPU_SLEEP_0: cpu-sleep-0 { 132 compatible = "arm,idle-state"; 133 arm,psci-suspend-param = <0x0010000>; 134 local-timer-stop; 135 entry-latency-us = <400>; 136 exit-latency-us = <500>; 137 min-residency-us = <4000>; 138 }; 139 }; 140 }; 141 142 extal_clk: extal { 143 compatible = "fixed-clock"; 144 #clock-cells = <0>; 145 /* This value must be overridden by the board */ 146 clock-frequency = <0>; 147 bootph-all; 148 }; 149 150 extalr_clk: extalr { 151 compatible = "fixed-clock"; 152 #clock-cells = <0>; 153 /* This value must be overridden by the board */ 154 clock-frequency = <0>; 155 bootph-all; 156 }; 157 158 /* External PCIe clock - can be overridden by the board */ 159 pcie_bus_clk: pcie_bus { 160 compatible = "fixed-clock"; 161 #clock-cells = <0>; 162 clock-frequency = <0>; 163 }; 164 165 pmu_a57 { 166 compatible = "arm,cortex-a57-pmu"; 167 interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>, 168 <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; 169 interrupt-affinity = <&a57_0>, 170 <&a57_1>; 171 }; 172 173 psci { 174 compatible = "arm,psci-1.0", "arm,psci-0.2"; 175 method = "smc"; 176 }; 177 178 /* External SCIF clock - to be overridden by boards that provide it */ 179 scif_clk: scif { 180 compatible = "fixed-clock"; 181 #clock-cells = <0>; 182 clock-frequency = <0>; 183 }; 184 185 soc { 186 compatible = "simple-bus"; 187 bootph-all; 188 189 #address-cells = <2>; 190 #size-cells = <2>; 191 ranges; 192 193 rwdt: watchdog@e6020000 { 194 compatible = "renesas,r8a77965-wdt", 195 "renesas,rcar-gen3-wdt"; 196 reg = <0 0xe6020000 0 0x0c>; 197 interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>; 198 clocks = <&cpg CPG_MOD 402>; 199 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 200 resets = <&cpg 402>; 201 status = "disabled"; 202 }; 203 204 swdt: watchdog@e6030000 { 205 compatible = "renesas,r8a77965-wdt", "renesas,rcar-gen3-wdt"; 206 reg = <0 0xe6030000 0 0x0c>; 207 interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>; 208 clocks = <&cpg CPG_CORE R8A77965_CLK_OSC>; 209 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 210 resets = <&cpg 401>; 211 status = "disabled"; 212 }; 213 214 gpio0: gpio@e6050000 { 215 compatible = "renesas,gpio-r8a77965", 216 "renesas,rcar-gen3-gpio"; 217 reg = <0 0xe6050000 0 0x50>; 218 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 219 #gpio-cells = <2>; 220 gpio-controller; 221 gpio-ranges = <&pfc 0 0 16>; 222 #interrupt-cells = <2>; 223 interrupt-controller; 224 clocks = <&cpg CPG_MOD 912>; 225 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 226 resets = <&cpg 912>; 227 }; 228 229 gpio1: gpio@e6051000 { 230 compatible = "renesas,gpio-r8a77965", 231 "renesas,rcar-gen3-gpio"; 232 reg = <0 0xe6051000 0 0x50>; 233 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 234 #gpio-cells = <2>; 235 gpio-controller; 236 gpio-ranges = <&pfc 0 32 29>; 237 #interrupt-cells = <2>; 238 interrupt-controller; 239 clocks = <&cpg CPG_MOD 911>; 240 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 241 resets = <&cpg 911>; 242 }; 243 244 gpio2: gpio@e6052000 { 245 compatible = "renesas,gpio-r8a77965", 246 "renesas,rcar-gen3-gpio"; 247 reg = <0 0xe6052000 0 0x50>; 248 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 249 #gpio-cells = <2>; 250 gpio-controller; 251 gpio-ranges = <&pfc 0 64 15>; 252 #interrupt-cells = <2>; 253 interrupt-controller; 254 clocks = <&cpg CPG_MOD 910>; 255 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 256 resets = <&cpg 910>; 257 }; 258 259 gpio3: gpio@e6053000 { 260 compatible = "renesas,gpio-r8a77965", 261 "renesas,rcar-gen3-gpio"; 262 reg = <0 0xe6053000 0 0x50>; 263 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 264 #gpio-cells = <2>; 265 gpio-controller; 266 gpio-ranges = <&pfc 0 96 16>; 267 #interrupt-cells = <2>; 268 interrupt-controller; 269 clocks = <&cpg CPG_MOD 909>; 270 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 271 resets = <&cpg 909>; 272 }; 273 274 gpio4: gpio@e6054000 { 275 compatible = "renesas,gpio-r8a77965", 276 "renesas,rcar-gen3-gpio"; 277 reg = <0 0xe6054000 0 0x50>; 278 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 279 #gpio-cells = <2>; 280 gpio-controller; 281 gpio-ranges = <&pfc 0 128 18>; 282 #interrupt-cells = <2>; 283 interrupt-controller; 284 clocks = <&cpg CPG_MOD 908>; 285 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 286 resets = <&cpg 908>; 287 }; 288 289 gpio5: gpio@e6055000 { 290 compatible = "renesas,gpio-r8a77965", 291 "renesas,rcar-gen3-gpio"; 292 reg = <0 0xe6055000 0 0x50>; 293 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 294 #gpio-cells = <2>; 295 gpio-controller; 296 gpio-ranges = <&pfc 0 160 26>; 297 #interrupt-cells = <2>; 298 interrupt-controller; 299 clocks = <&cpg CPG_MOD 907>; 300 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 301 resets = <&cpg 907>; 302 }; 303 304 gpio6: gpio@e6055400 { 305 compatible = "renesas,gpio-r8a77965", 306 "renesas,rcar-gen3-gpio"; 307 reg = <0 0xe6055400 0 0x50>; 308 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 309 #gpio-cells = <2>; 310 gpio-controller; 311 gpio-ranges = <&pfc 0 192 32>; 312 #interrupt-cells = <2>; 313 interrupt-controller; 314 clocks = <&cpg CPG_MOD 906>; 315 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 316 resets = <&cpg 906>; 317 }; 318 319 gpio7: gpio@e6055800 { 320 compatible = "renesas,gpio-r8a77965", 321 "renesas,rcar-gen3-gpio"; 322 reg = <0 0xe6055800 0 0x50>; 323 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 324 #gpio-cells = <2>; 325 gpio-controller; 326 gpio-ranges = <&pfc 0 224 4>; 327 #interrupt-cells = <2>; 328 interrupt-controller; 329 clocks = <&cpg CPG_MOD 905>; 330 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 331 resets = <&cpg 905>; 332 }; 333 334 pfc: pinctrl@e6060000 { 335 compatible = "renesas,pfc-r8a77965"; 336 reg = <0 0xe6060000 0 0x50c>; 337 bootph-all; 338 }; 339 340 cmt0: timer@e60f0000 { 341 compatible = "renesas,r8a77965-cmt0", 342 "renesas,rcar-gen3-cmt0"; 343 reg = <0 0xe60f0000 0 0x1004>; 344 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, 345 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; 346 clocks = <&cpg CPG_MOD 303>; 347 clock-names = "fck"; 348 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 349 resets = <&cpg 303>; 350 status = "disabled"; 351 }; 352 353 cmt1: timer@e6130000 { 354 compatible = "renesas,r8a77965-cmt1", 355 "renesas,rcar-gen3-cmt1"; 356 reg = <0 0xe6130000 0 0x1004>; 357 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, 358 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, 359 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, 360 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, 361 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, 362 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, 363 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, 364 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; 365 clocks = <&cpg CPG_MOD 302>; 366 clock-names = "fck"; 367 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 368 resets = <&cpg 302>; 369 status = "disabled"; 370 }; 371 372 cmt2: timer@e6140000 { 373 compatible = "renesas,r8a77965-cmt1", 374 "renesas,rcar-gen3-cmt1"; 375 reg = <0 0xe6140000 0 0x1004>; 376 interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>, 377 <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>, 378 <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>, 379 <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>, 380 <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>, 381 <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>, 382 <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>, 383 <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>; 384 clocks = <&cpg CPG_MOD 301>; 385 clock-names = "fck"; 386 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 387 resets = <&cpg 301>; 388 status = "disabled"; 389 }; 390 391 cmt3: timer@e6148000 { 392 compatible = "renesas,r8a77965-cmt1", 393 "renesas,rcar-gen3-cmt1"; 394 reg = <0 0xe6148000 0 0x1004>; 395 interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>, 396 <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>, 397 <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>, 398 <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>, 399 <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>, 400 <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>, 401 <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>, 402 <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>; 403 clocks = <&cpg CPG_MOD 300>; 404 clock-names = "fck"; 405 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 406 resets = <&cpg 300>; 407 status = "disabled"; 408 }; 409 410 cpg: clock-controller@e6150000 { 411 compatible = "renesas,r8a77965-cpg-mssr"; 412 reg = <0 0xe6150000 0 0x1000>; 413 clocks = <&extal_clk>, <&extalr_clk>; 414 clock-names = "extal", "extalr"; 415 #clock-cells = <2>; 416 #power-domain-cells = <0>; 417 #reset-cells = <1>; 418 bootph-all; 419 }; 420 421 rst: reset-controller@e6160000 { 422 compatible = "renesas,r8a77965-rst"; 423 reg = <0 0xe6160000 0 0x0200>; 424 bootph-all; 425 }; 426 427 sysc: system-controller@e6180000 { 428 compatible = "renesas,r8a77965-sysc"; 429 reg = <0 0xe6180000 0 0x0400>; 430 #power-domain-cells = <1>; 431 }; 432 433 tsc: thermal@e6198000 { 434 compatible = "renesas,r8a77965-thermal"; 435 reg = <0 0xe6198000 0 0x100>, 436 <0 0xe61a0000 0 0x100>, 437 <0 0xe61a8000 0 0x100>; 438 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>, 439 <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>, 440 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; 441 clocks = <&cpg CPG_MOD 522>; 442 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 443 resets = <&cpg 522>; 444 #thermal-sensor-cells = <1>; 445 }; 446 447 intc_ex: interrupt-controller@e61c0000 { 448 compatible = "renesas,intc-ex-r8a77965", "renesas,irqc"; 449 #interrupt-cells = <2>; 450 interrupt-controller; 451 reg = <0 0xe61c0000 0 0x200>; 452 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, 453 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, 454 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, 455 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, 456 <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>, 457 <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; 458 clocks = <&cpg CPG_MOD 407>; 459 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 460 resets = <&cpg 407>; 461 }; 462 463 tmu0: timer@e61e0000 { 464 compatible = "renesas,tmu-r8a77965", "renesas,tmu"; 465 reg = <0 0xe61e0000 0 0x30>; 466 interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, 467 <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>, 468 <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; 469 interrupt-names = "tuni0", "tuni1", "tuni2"; 470 clocks = <&cpg CPG_MOD 125>; 471 clock-names = "fck"; 472 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 473 resets = <&cpg 125>; 474 status = "disabled"; 475 }; 476 477 tmu1: timer@e6fc0000 { 478 compatible = "renesas,tmu-r8a77965", "renesas,tmu"; 479 reg = <0 0xe6fc0000 0 0x30>; 480 interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, 481 <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>, 482 <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, 483 <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>; 484 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2"; 485 clocks = <&cpg CPG_MOD 124>; 486 clock-names = "fck"; 487 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 488 resets = <&cpg 124>; 489 status = "disabled"; 490 }; 491 492 tmu2: timer@e6fd0000 { 493 compatible = "renesas,tmu-r8a77965", "renesas,tmu"; 494 reg = <0 0xe6fd0000 0 0x30>; 495 interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>, 496 <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>, 497 <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>, 498 <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>; 499 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2"; 500 clocks = <&cpg CPG_MOD 123>; 501 clock-names = "fck"; 502 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 503 resets = <&cpg 123>; 504 status = "disabled"; 505 }; 506 507 tmu3: timer@e6fe0000 { 508 compatible = "renesas,tmu-r8a77965", "renesas,tmu"; 509 reg = <0 0xe6fe0000 0 0x30>; 510 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, 511 <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>, 512 <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; 513 interrupt-names = "tuni0", "tuni1", "tuni2"; 514 clocks = <&cpg CPG_MOD 122>; 515 clock-names = "fck"; 516 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 517 resets = <&cpg 122>; 518 status = "disabled"; 519 }; 520 521 tmu4: timer@ffc00000 { 522 compatible = "renesas,tmu-r8a77965", "renesas,tmu"; 523 reg = <0 0xffc00000 0 0x30>; 524 interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>, 525 <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>, 526 <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>; 527 interrupt-names = "tuni0", "tuni1", "tuni2"; 528 clocks = <&cpg CPG_MOD 121>; 529 clock-names = "fck"; 530 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 531 resets = <&cpg 121>; 532 status = "disabled"; 533 }; 534 535 i2c0: i2c@e6500000 { 536 #address-cells = <1>; 537 #size-cells = <0>; 538 compatible = "renesas,i2c-r8a77965", 539 "renesas,rcar-gen3-i2c"; 540 reg = <0 0xe6500000 0 0x40>; 541 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; 542 clocks = <&cpg CPG_MOD 931>; 543 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 544 resets = <&cpg 931>; 545 dmas = <&dmac1 0x91>, <&dmac1 0x90>, 546 <&dmac2 0x91>, <&dmac2 0x90>; 547 dma-names = "tx", "rx", "tx", "rx"; 548 i2c-scl-internal-delay-ns = <110>; 549 status = "disabled"; 550 }; 551 552 i2c1: i2c@e6508000 { 553 #address-cells = <1>; 554 #size-cells = <0>; 555 compatible = "renesas,i2c-r8a77965", 556 "renesas,rcar-gen3-i2c"; 557 reg = <0 0xe6508000 0 0x40>; 558 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; 559 clocks = <&cpg CPG_MOD 930>; 560 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 561 resets = <&cpg 930>; 562 dmas = <&dmac1 0x93>, <&dmac1 0x92>, 563 <&dmac2 0x93>, <&dmac2 0x92>; 564 dma-names = "tx", "rx", "tx", "rx"; 565 i2c-scl-internal-delay-ns = <6>; 566 status = "disabled"; 567 }; 568 569 i2c2: i2c@e6510000 { 570 #address-cells = <1>; 571 #size-cells = <0>; 572 compatible = "renesas,i2c-r8a77965", 573 "renesas,rcar-gen3-i2c"; 574 reg = <0 0xe6510000 0 0x40>; 575 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; 576 clocks = <&cpg CPG_MOD 929>; 577 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 578 resets = <&cpg 929>; 579 dmas = <&dmac1 0x95>, <&dmac1 0x94>, 580 <&dmac2 0x95>, <&dmac2 0x94>; 581 dma-names = "tx", "rx", "tx", "rx"; 582 i2c-scl-internal-delay-ns = <6>; 583 status = "disabled"; 584 }; 585 586 i2c3: i2c@e66d0000 { 587 #address-cells = <1>; 588 #size-cells = <0>; 589 compatible = "renesas,i2c-r8a77965", 590 "renesas,rcar-gen3-i2c"; 591 reg = <0 0xe66d0000 0 0x40>; 592 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; 593 clocks = <&cpg CPG_MOD 928>; 594 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 595 resets = <&cpg 928>; 596 dmas = <&dmac0 0x97>, <&dmac0 0x96>; 597 dma-names = "tx", "rx"; 598 i2c-scl-internal-delay-ns = <110>; 599 status = "disabled"; 600 }; 601 602 i2c4: i2c@e66d8000 { 603 #address-cells = <1>; 604 #size-cells = <0>; 605 compatible = "renesas,i2c-r8a77965", 606 "renesas,rcar-gen3-i2c"; 607 reg = <0 0xe66d8000 0 0x40>; 608 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 609 clocks = <&cpg CPG_MOD 927>; 610 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 611 resets = <&cpg 927>; 612 dmas = <&dmac0 0x99>, <&dmac0 0x98>; 613 dma-names = "tx", "rx"; 614 i2c-scl-internal-delay-ns = <110>; 615 status = "disabled"; 616 }; 617 618 i2c5: i2c@e66e0000 { 619 #address-cells = <1>; 620 #size-cells = <0>; 621 compatible = "renesas,i2c-r8a77965", 622 "renesas,rcar-gen3-i2c"; 623 reg = <0 0xe66e0000 0 0x40>; 624 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 625 clocks = <&cpg CPG_MOD 919>; 626 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 627 resets = <&cpg 919>; 628 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>; 629 dma-names = "tx", "rx"; 630 i2c-scl-internal-delay-ns = <110>; 631 status = "disabled"; 632 }; 633 634 i2c6: i2c@e66e8000 { 635 #address-cells = <1>; 636 #size-cells = <0>; 637 compatible = "renesas,i2c-r8a77965", 638 "renesas,rcar-gen3-i2c"; 639 reg = <0 0xe66e8000 0 0x40>; 640 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; 641 clocks = <&cpg CPG_MOD 918>; 642 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 643 resets = <&cpg 918>; 644 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>; 645 dma-names = "tx", "rx"; 646 i2c-scl-internal-delay-ns = <6>; 647 status = "disabled"; 648 }; 649 650 i2c_dvfs: i2c@e60b0000 { 651 #address-cells = <1>; 652 #size-cells = <0>; 653 compatible = "renesas,iic-r8a77965", 654 "renesas,rcar-gen3-iic", 655 "renesas,rmobile-iic"; 656 reg = <0 0xe60b0000 0 0x425>; 657 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; 658 clocks = <&cpg CPG_MOD 926>; 659 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 660 resets = <&cpg 926>; 661 dmas = <&dmac0 0x11>, <&dmac0 0x10>; 662 dma-names = "tx", "rx"; 663 status = "disabled"; 664 }; 665 666 hscif0: serial@e6540000 { 667 compatible = "renesas,hscif-r8a77965", 668 "renesas,rcar-gen3-hscif", 669 "renesas,hscif"; 670 reg = <0 0xe6540000 0 0x60>; 671 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; 672 clocks = <&cpg CPG_MOD 520>, 673 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 674 <&scif_clk>; 675 clock-names = "fck", "brg_int", "scif_clk"; 676 dmas = <&dmac1 0x31>, <&dmac1 0x30>, 677 <&dmac2 0x31>, <&dmac2 0x30>; 678 dma-names = "tx", "rx", "tx", "rx"; 679 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 680 resets = <&cpg 520>; 681 status = "disabled"; 682 }; 683 684 hscif1: serial@e6550000 { 685 compatible = "renesas,hscif-r8a77965", 686 "renesas,rcar-gen3-hscif", 687 "renesas,hscif"; 688 reg = <0 0xe6550000 0 0x60>; 689 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; 690 clocks = <&cpg CPG_MOD 519>, 691 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 692 <&scif_clk>; 693 clock-names = "fck", "brg_int", "scif_clk"; 694 dmas = <&dmac1 0x33>, <&dmac1 0x32>, 695 <&dmac2 0x33>, <&dmac2 0x32>; 696 dma-names = "tx", "rx", "tx", "rx"; 697 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 698 resets = <&cpg 519>; 699 status = "disabled"; 700 }; 701 702 hscif2: serial@e6560000 { 703 compatible = "renesas,hscif-r8a77965", 704 "renesas,rcar-gen3-hscif", 705 "renesas,hscif"; 706 reg = <0 0xe6560000 0 0x60>; 707 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; 708 clocks = <&cpg CPG_MOD 518>, 709 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 710 <&scif_clk>; 711 clock-names = "fck", "brg_int", "scif_clk"; 712 dmas = <&dmac1 0x35>, <&dmac1 0x34>, 713 <&dmac2 0x35>, <&dmac2 0x34>; 714 dma-names = "tx", "rx", "tx", "rx"; 715 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 716 resets = <&cpg 518>; 717 status = "disabled"; 718 }; 719 720 hscif3: serial@e66a0000 { 721 compatible = "renesas,hscif-r8a77965", 722 "renesas,rcar-gen3-hscif", 723 "renesas,hscif"; 724 reg = <0 0xe66a0000 0 0x60>; 725 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; 726 clocks = <&cpg CPG_MOD 517>, 727 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 728 <&scif_clk>; 729 clock-names = "fck", "brg_int", "scif_clk"; 730 dmas = <&dmac0 0x37>, <&dmac0 0x36>; 731 dma-names = "tx", "rx"; 732 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 733 resets = <&cpg 517>; 734 status = "disabled"; 735 }; 736 737 hscif4: serial@e66b0000 { 738 compatible = "renesas,hscif-r8a77965", 739 "renesas,rcar-gen3-hscif", 740 "renesas,hscif"; 741 reg = <0 0xe66b0000 0 0x60>; 742 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; 743 clocks = <&cpg CPG_MOD 516>, 744 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 745 <&scif_clk>; 746 clock-names = "fck", "brg_int", "scif_clk"; 747 dmas = <&dmac0 0x39>, <&dmac0 0x38>; 748 dma-names = "tx", "rx"; 749 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 750 resets = <&cpg 516>; 751 status = "disabled"; 752 }; 753 754 hsusb: usb@e6590000 { 755 compatible = "renesas,usbhs-r8a77965", 756 "renesas,rcar-gen3-usbhs"; 757 reg = <0 0xe6590000 0 0x200>; 758 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; 759 clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>; 760 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, 761 <&usb_dmac1 0>, <&usb_dmac1 1>; 762 dma-names = "ch0", "ch1", "ch2", "ch3"; 763 renesas,buswait = <11>; 764 phys = <&usb2_phy0 3>; 765 phy-names = "usb"; 766 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 767 resets = <&cpg 704>, <&cpg 703>; 768 status = "disabled"; 769 }; 770 771 usb_dmac0: dma-controller@e65a0000 { 772 compatible = "renesas,r8a77965-usb-dmac", 773 "renesas,usb-dmac"; 774 reg = <0 0xe65a0000 0 0x100>; 775 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, 776 <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; 777 interrupt-names = "ch0", "ch1"; 778 clocks = <&cpg CPG_MOD 330>; 779 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 780 resets = <&cpg 330>; 781 #dma-cells = <1>; 782 dma-channels = <2>; 783 }; 784 785 usb_dmac1: dma-controller@e65b0000 { 786 compatible = "renesas,r8a77965-usb-dmac", 787 "renesas,usb-dmac"; 788 reg = <0 0xe65b0000 0 0x100>; 789 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, 790 <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; 791 interrupt-names = "ch0", "ch1"; 792 clocks = <&cpg CPG_MOD 331>; 793 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 794 resets = <&cpg 331>; 795 #dma-cells = <1>; 796 dma-channels = <2>; 797 }; 798 799 usb3_phy0: usb-phy@e65ee000 { 800 compatible = "renesas,r8a77965-usb3-phy", 801 "renesas,rcar-gen3-usb3-phy"; 802 reg = <0 0xe65ee000 0 0x90>; 803 clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>, 804 <&usb_extal_clk>; 805 clock-names = "usb3-if", "usb3s_clk", "usb_extal"; 806 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 807 resets = <&cpg 328>; 808 #phy-cells = <0>; 809 status = "disabled"; 810 }; 811 812 arm_cc630p: crypto@e6601000 { 813 compatible = "arm,cryptocell-630p-ree"; 814 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; 815 reg = <0x0 0xe6601000 0 0x1000>; 816 clocks = <&cpg CPG_MOD 229>; 817 resets = <&cpg 229>; 818 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 819 }; 820 821 dmac0: dma-controller@e6700000 { 822 compatible = "renesas,dmac-r8a77965", 823 "renesas,rcar-dmac"; 824 reg = <0 0xe6700000 0 0x10000>; 825 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>, 826 <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>, 827 <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>, 828 <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>, 829 <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>, 830 <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>, 831 <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>, 832 <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>, 833 <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>, 834 <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>, 835 <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>, 836 <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>, 837 <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>, 838 <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>, 839 <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>, 840 <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>, 841 <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>; 842 interrupt-names = "error", 843 "ch0", "ch1", "ch2", "ch3", 844 "ch4", "ch5", "ch6", "ch7", 845 "ch8", "ch9", "ch10", "ch11", 846 "ch12", "ch13", "ch14", "ch15"; 847 clocks = <&cpg CPG_MOD 219>; 848 clock-names = "fck"; 849 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 850 resets = <&cpg 219>; 851 #dma-cells = <1>; 852 dma-channels = <16>; 853 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>, 854 <&ipmmu_ds0 2>, <&ipmmu_ds0 3>, 855 <&ipmmu_ds0 4>, <&ipmmu_ds0 5>, 856 <&ipmmu_ds0 6>, <&ipmmu_ds0 7>, 857 <&ipmmu_ds0 8>, <&ipmmu_ds0 9>, 858 <&ipmmu_ds0 10>, <&ipmmu_ds0 11>, 859 <&ipmmu_ds0 12>, <&ipmmu_ds0 13>, 860 <&ipmmu_ds0 14>, <&ipmmu_ds0 15>; 861 }; 862 863 dmac1: dma-controller@e7300000 { 864 compatible = "renesas,dmac-r8a77965", 865 "renesas,rcar-dmac"; 866 reg = <0 0xe7300000 0 0x10000>; 867 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>, 868 <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>, 869 <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>, 870 <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>, 871 <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>, 872 <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>, 873 <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>, 874 <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>, 875 <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>, 876 <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>, 877 <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>, 878 <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>, 879 <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, 880 <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, 881 <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, 882 <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>, 883 <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>; 884 interrupt-names = "error", 885 "ch0", "ch1", "ch2", "ch3", 886 "ch4", "ch5", "ch6", "ch7", 887 "ch8", "ch9", "ch10", "ch11", 888 "ch12", "ch13", "ch14", "ch15"; 889 clocks = <&cpg CPG_MOD 218>; 890 clock-names = "fck"; 891 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 892 resets = <&cpg 218>; 893 #dma-cells = <1>; 894 dma-channels = <16>; 895 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>, 896 <&ipmmu_ds1 2>, <&ipmmu_ds1 3>, 897 <&ipmmu_ds1 4>, <&ipmmu_ds1 5>, 898 <&ipmmu_ds1 6>, <&ipmmu_ds1 7>, 899 <&ipmmu_ds1 8>, <&ipmmu_ds1 9>, 900 <&ipmmu_ds1 10>, <&ipmmu_ds1 11>, 901 <&ipmmu_ds1 12>, <&ipmmu_ds1 13>, 902 <&ipmmu_ds1 14>, <&ipmmu_ds1 15>; 903 }; 904 905 dmac2: dma-controller@e7310000 { 906 compatible = "renesas,dmac-r8a77965", 907 "renesas,rcar-dmac"; 908 reg = <0 0xe7310000 0 0x10000>; 909 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>, 910 <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>, 911 <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>, 912 <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>, 913 <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>, 914 <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>, 915 <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>, 916 <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>, 917 <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>, 918 <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>, 919 <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>, 920 <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>, 921 <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>, 922 <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>, 923 <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>, 924 <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>, 925 <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>; 926 interrupt-names = "error", 927 "ch0", "ch1", "ch2", "ch3", 928 "ch4", "ch5", "ch6", "ch7", 929 "ch8", "ch9", "ch10", "ch11", 930 "ch12", "ch13", "ch14", "ch15"; 931 clocks = <&cpg CPG_MOD 217>; 932 clock-names = "fck"; 933 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 934 resets = <&cpg 217>; 935 #dma-cells = <1>; 936 dma-channels = <16>; 937 iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>, 938 <&ipmmu_ds1 18>, <&ipmmu_ds1 19>, 939 <&ipmmu_ds1 20>, <&ipmmu_ds1 21>, 940 <&ipmmu_ds1 22>, <&ipmmu_ds1 23>, 941 <&ipmmu_ds1 24>, <&ipmmu_ds1 25>, 942 <&ipmmu_ds1 26>, <&ipmmu_ds1 27>, 943 <&ipmmu_ds1 28>, <&ipmmu_ds1 29>, 944 <&ipmmu_ds1 30>, <&ipmmu_ds1 31>; 945 }; 946 947 ipmmu_ds0: iommu@e6740000 { 948 compatible = "renesas,ipmmu-r8a77965"; 949 reg = <0 0xe6740000 0 0x1000>; 950 renesas,ipmmu-main = <&ipmmu_mm 0>; 951 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 952 #iommu-cells = <1>; 953 }; 954 955 ipmmu_ds1: iommu@e7740000 { 956 compatible = "renesas,ipmmu-r8a77965"; 957 reg = <0 0xe7740000 0 0x1000>; 958 renesas,ipmmu-main = <&ipmmu_mm 1>; 959 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 960 #iommu-cells = <1>; 961 }; 962 963 ipmmu_hc: iommu@e6570000 { 964 compatible = "renesas,ipmmu-r8a77965"; 965 reg = <0 0xe6570000 0 0x1000>; 966 renesas,ipmmu-main = <&ipmmu_mm 2>; 967 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 968 #iommu-cells = <1>; 969 }; 970 971 ipmmu_mm: iommu@e67b0000 { 972 compatible = "renesas,ipmmu-r8a77965"; 973 reg = <0 0xe67b0000 0 0x1000>; 974 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>, 975 <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>; 976 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 977 #iommu-cells = <1>; 978 }; 979 980 ipmmu_mp: iommu@ec670000 { 981 compatible = "renesas,ipmmu-r8a77965"; 982 reg = <0 0xec670000 0 0x1000>; 983 renesas,ipmmu-main = <&ipmmu_mm 4>; 984 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 985 #iommu-cells = <1>; 986 }; 987 988 ipmmu_pv0: iommu@fd800000 { 989 compatible = "renesas,ipmmu-r8a77965"; 990 reg = <0 0xfd800000 0 0x1000>; 991 renesas,ipmmu-main = <&ipmmu_mm 6>; 992 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 993 #iommu-cells = <1>; 994 }; 995 996 ipmmu_rt: iommu@ffc80000 { 997 compatible = "renesas,ipmmu-r8a77965"; 998 reg = <0 0xffc80000 0 0x1000>; 999 renesas,ipmmu-main = <&ipmmu_mm 10>; 1000 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1001 #iommu-cells = <1>; 1002 }; 1003 1004 ipmmu_vc0: iommu@fe6b0000 { 1005 compatible = "renesas,ipmmu-r8a77965"; 1006 reg = <0 0xfe6b0000 0 0x1000>; 1007 renesas,ipmmu-main = <&ipmmu_mm 12>; 1008 power-domains = <&sysc R8A77965_PD_A3VC>; 1009 #iommu-cells = <1>; 1010 }; 1011 1012 ipmmu_vi0: iommu@febd0000 { 1013 compatible = "renesas,ipmmu-r8a77965"; 1014 reg = <0 0xfebd0000 0 0x1000>; 1015 renesas,ipmmu-main = <&ipmmu_mm 14>; 1016 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1017 #iommu-cells = <1>; 1018 }; 1019 1020 ipmmu_vp0: iommu@fe990000 { 1021 compatible = "renesas,ipmmu-r8a77965"; 1022 reg = <0 0xfe990000 0 0x1000>; 1023 renesas,ipmmu-main = <&ipmmu_mm 16>; 1024 power-domains = <&sysc R8A77965_PD_A3VP>; 1025 #iommu-cells = <1>; 1026 }; 1027 1028 avb: ethernet@e6800000 { 1029 compatible = "renesas,etheravb-r8a77965", 1030 "renesas,etheravb-rcar-gen3"; 1031 reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>; 1032 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, 1033 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, 1034 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, 1035 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, 1036 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, 1037 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, 1038 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, 1039 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, 1040 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, 1041 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, 1042 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, 1043 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>, 1044 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, 1045 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, 1046 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, 1047 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, 1048 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, 1049 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, 1050 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, 1051 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, 1052 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, 1053 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>, 1054 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>, 1055 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>, 1056 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; 1057 interrupt-names = "ch0", "ch1", "ch2", "ch3", 1058 "ch4", "ch5", "ch6", "ch7", 1059 "ch8", "ch9", "ch10", "ch11", 1060 "ch12", "ch13", "ch14", "ch15", 1061 "ch16", "ch17", "ch18", "ch19", 1062 "ch20", "ch21", "ch22", "ch23", 1063 "ch24"; 1064 clocks = <&cpg CPG_MOD 812>; 1065 clock-names = "fck"; 1066 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1067 resets = <&cpg 812>; 1068 phy-mode = "rgmii"; 1069 rx-internal-delay-ps = <0>; 1070 tx-internal-delay-ps = <0>; 1071 iommus = <&ipmmu_ds0 16>; 1072 #address-cells = <1>; 1073 #size-cells = <0>; 1074 status = "disabled"; 1075 }; 1076 1077 can0: can@e6c30000 { 1078 compatible = "renesas,can-r8a77965", 1079 "renesas,rcar-gen3-can"; 1080 reg = <0 0xe6c30000 0 0x1000>; 1081 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; 1082 clocks = <&cpg CPG_MOD 916>, 1083 <&cpg CPG_CORE R8A77965_CLK_CANFD>, 1084 <&can_clk>; 1085 clock-names = "clkp1", "clkp2", "can_clk"; 1086 assigned-clocks = <&cpg CPG_CORE R8A77965_CLK_CANFD>; 1087 assigned-clock-rates = <40000000>; 1088 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1089 resets = <&cpg 916>; 1090 status = "disabled"; 1091 }; 1092 1093 can1: can@e6c38000 { 1094 compatible = "renesas,can-r8a77965", 1095 "renesas,rcar-gen3-can"; 1096 reg = <0 0xe6c38000 0 0x1000>; 1097 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; 1098 clocks = <&cpg CPG_MOD 915>, 1099 <&cpg CPG_CORE R8A77965_CLK_CANFD>, 1100 <&can_clk>; 1101 clock-names = "clkp1", "clkp2", "can_clk"; 1102 assigned-clocks = <&cpg CPG_CORE R8A77965_CLK_CANFD>; 1103 assigned-clock-rates = <40000000>; 1104 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1105 resets = <&cpg 915>; 1106 status = "disabled"; 1107 }; 1108 1109 canfd: can@e66c0000 { 1110 compatible = "renesas,r8a77965-canfd", 1111 "renesas,rcar-gen3-canfd"; 1112 reg = <0 0xe66c0000 0 0x8000>; 1113 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>, 1114 <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; 1115 interrupt-names = "ch_int", "g_int"; 1116 clocks = <&cpg CPG_MOD 914>, 1117 <&cpg CPG_CORE R8A77965_CLK_CANFD>, 1118 <&can_clk>; 1119 clock-names = "fck", "canfd", "can_clk"; 1120 assigned-clocks = <&cpg CPG_CORE R8A77965_CLK_CANFD>; 1121 assigned-clock-rates = <80000000>; 1122 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1123 resets = <&cpg 914>; 1124 status = "disabled"; 1125 1126 channel0 { 1127 status = "disabled"; 1128 }; 1129 1130 channel1 { 1131 status = "disabled"; 1132 }; 1133 }; 1134 1135 pwm0: pwm@e6e30000 { 1136 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 1137 reg = <0 0xe6e30000 0 8>; 1138 #pwm-cells = <2>; 1139 clocks = <&cpg CPG_MOD 523>; 1140 resets = <&cpg 523>; 1141 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1142 status = "disabled"; 1143 }; 1144 1145 pwm1: pwm@e6e31000 { 1146 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 1147 reg = <0 0xe6e31000 0 8>; 1148 #pwm-cells = <2>; 1149 clocks = <&cpg CPG_MOD 523>; 1150 resets = <&cpg 523>; 1151 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1152 status = "disabled"; 1153 }; 1154 1155 pwm2: pwm@e6e32000 { 1156 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 1157 reg = <0 0xe6e32000 0 8>; 1158 #pwm-cells = <2>; 1159 clocks = <&cpg CPG_MOD 523>; 1160 resets = <&cpg 523>; 1161 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1162 status = "disabled"; 1163 }; 1164 1165 pwm3: pwm@e6e33000 { 1166 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 1167 reg = <0 0xe6e33000 0 8>; 1168 #pwm-cells = <2>; 1169 clocks = <&cpg CPG_MOD 523>; 1170 resets = <&cpg 523>; 1171 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1172 status = "disabled"; 1173 }; 1174 1175 pwm4: pwm@e6e34000 { 1176 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 1177 reg = <0 0xe6e34000 0 8>; 1178 #pwm-cells = <2>; 1179 clocks = <&cpg CPG_MOD 523>; 1180 resets = <&cpg 523>; 1181 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1182 status = "disabled"; 1183 }; 1184 1185 pwm5: pwm@e6e35000 { 1186 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 1187 reg = <0 0xe6e35000 0 8>; 1188 #pwm-cells = <2>; 1189 clocks = <&cpg CPG_MOD 523>; 1190 resets = <&cpg 523>; 1191 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1192 status = "disabled"; 1193 }; 1194 1195 pwm6: pwm@e6e36000 { 1196 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 1197 reg = <0 0xe6e36000 0 8>; 1198 #pwm-cells = <2>; 1199 clocks = <&cpg CPG_MOD 523>; 1200 resets = <&cpg 523>; 1201 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1202 status = "disabled"; 1203 }; 1204 1205 scif0: serial@e6e60000 { 1206 compatible = "renesas,scif-r8a77965", 1207 "renesas,rcar-gen3-scif", "renesas,scif"; 1208 reg = <0 0xe6e60000 0 64>; 1209 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; 1210 clocks = <&cpg CPG_MOD 207>, 1211 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 1212 <&scif_clk>; 1213 clock-names = "fck", "brg_int", "scif_clk"; 1214 dmas = <&dmac1 0x51>, <&dmac1 0x50>, 1215 <&dmac2 0x51>, <&dmac2 0x50>; 1216 dma-names = "tx", "rx", "tx", "rx"; 1217 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1218 resets = <&cpg 207>; 1219 status = "disabled"; 1220 }; 1221 1222 scif1: serial@e6e68000 { 1223 compatible = "renesas,scif-r8a77965", 1224 "renesas,rcar-gen3-scif", "renesas,scif"; 1225 reg = <0 0xe6e68000 0 64>; 1226 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; 1227 clocks = <&cpg CPG_MOD 206>, 1228 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 1229 <&scif_clk>; 1230 clock-names = "fck", "brg_int", "scif_clk"; 1231 dmas = <&dmac1 0x53>, <&dmac1 0x52>, 1232 <&dmac2 0x53>, <&dmac2 0x52>; 1233 dma-names = "tx", "rx", "tx", "rx"; 1234 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1235 resets = <&cpg 206>; 1236 status = "disabled"; 1237 }; 1238 1239 scif2: serial@e6e88000 { 1240 compatible = "renesas,scif-r8a77965", 1241 "renesas,rcar-gen3-scif", "renesas,scif"; 1242 reg = <0 0xe6e88000 0 64>; 1243 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; 1244 clocks = <&cpg CPG_MOD 310>, 1245 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 1246 <&scif_clk>; 1247 clock-names = "fck", "brg_int", "scif_clk"; 1248 dmas = <&dmac1 0x13>, <&dmac1 0x12>, 1249 <&dmac2 0x13>, <&dmac2 0x12>; 1250 dma-names = "tx", "rx", "tx", "rx"; 1251 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1252 resets = <&cpg 310>; 1253 status = "disabled"; 1254 }; 1255 1256 scif3: serial@e6c50000 { 1257 compatible = "renesas,scif-r8a77965", 1258 "renesas,rcar-gen3-scif", "renesas,scif"; 1259 reg = <0 0xe6c50000 0 64>; 1260 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 1261 clocks = <&cpg CPG_MOD 204>, 1262 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 1263 <&scif_clk>; 1264 clock-names = "fck", "brg_int", "scif_clk"; 1265 dmas = <&dmac0 0x57>, <&dmac0 0x56>; 1266 dma-names = "tx", "rx"; 1267 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1268 resets = <&cpg 204>; 1269 status = "disabled"; 1270 }; 1271 1272 scif4: serial@e6c40000 { 1273 compatible = "renesas,scif-r8a77965", 1274 "renesas,rcar-gen3-scif", "renesas,scif"; 1275 reg = <0 0xe6c40000 0 64>; 1276 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; 1277 clocks = <&cpg CPG_MOD 203>, 1278 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 1279 <&scif_clk>; 1280 clock-names = "fck", "brg_int", "scif_clk"; 1281 dmas = <&dmac0 0x59>, <&dmac0 0x58>; 1282 dma-names = "tx", "rx"; 1283 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1284 resets = <&cpg 203>; 1285 status = "disabled"; 1286 }; 1287 1288 scif5: serial@e6f30000 { 1289 compatible = "renesas,scif-r8a77965", 1290 "renesas,rcar-gen3-scif", "renesas,scif"; 1291 reg = <0 0xe6f30000 0 64>; 1292 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 1293 clocks = <&cpg CPG_MOD 202>, 1294 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 1295 <&scif_clk>; 1296 clock-names = "fck", "brg_int", "scif_clk"; 1297 dmas = <&dmac1 0x5b>, <&dmac1 0x5a>, 1298 <&dmac2 0x5b>, <&dmac2 0x5a>; 1299 dma-names = "tx", "rx", "tx", "rx"; 1300 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1301 resets = <&cpg 202>; 1302 status = "disabled"; 1303 }; 1304 1305 tpu: pwm@e6e80000 { 1306 compatible = "renesas,tpu-r8a77965", "renesas,tpu"; 1307 reg = <0 0xe6e80000 0 0x148>; 1308 interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>; 1309 clocks = <&cpg CPG_MOD 304>; 1310 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1311 resets = <&cpg 304>; 1312 #pwm-cells = <3>; 1313 status = "disabled"; 1314 }; 1315 1316 msiof0: spi@e6e90000 { 1317 compatible = "renesas,msiof-r8a77965", 1318 "renesas,rcar-gen3-msiof"; 1319 reg = <0 0xe6e90000 0 0x0064>; 1320 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; 1321 clocks = <&cpg CPG_MOD 211>; 1322 dmas = <&dmac1 0x41>, <&dmac1 0x40>, 1323 <&dmac2 0x41>, <&dmac2 0x40>; 1324 dma-names = "tx", "rx", "tx", "rx"; 1325 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1326 resets = <&cpg 211>; 1327 #address-cells = <1>; 1328 #size-cells = <0>; 1329 status = "disabled"; 1330 }; 1331 1332 msiof1: spi@e6ea0000 { 1333 compatible = "renesas,msiof-r8a77965", 1334 "renesas,rcar-gen3-msiof"; 1335 reg = <0 0xe6ea0000 0 0x0064>; 1336 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; 1337 clocks = <&cpg CPG_MOD 210>; 1338 dmas = <&dmac1 0x43>, <&dmac1 0x42>, 1339 <&dmac2 0x43>, <&dmac2 0x42>; 1340 dma-names = "tx", "rx", "tx", "rx"; 1341 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1342 resets = <&cpg 210>; 1343 #address-cells = <1>; 1344 #size-cells = <0>; 1345 status = "disabled"; 1346 }; 1347 1348 msiof2: spi@e6c00000 { 1349 compatible = "renesas,msiof-r8a77965", 1350 "renesas,rcar-gen3-msiof"; 1351 reg = <0 0xe6c00000 0 0x0064>; 1352 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; 1353 clocks = <&cpg CPG_MOD 209>; 1354 dmas = <&dmac0 0x45>, <&dmac0 0x44>; 1355 dma-names = "tx", "rx"; 1356 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1357 resets = <&cpg 209>; 1358 #address-cells = <1>; 1359 #size-cells = <0>; 1360 status = "disabled"; 1361 }; 1362 1363 msiof3: spi@e6c10000 { 1364 compatible = "renesas,msiof-r8a77965", 1365 "renesas,rcar-gen3-msiof"; 1366 reg = <0 0xe6c10000 0 0x0064>; 1367 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; 1368 clocks = <&cpg CPG_MOD 208>; 1369 dmas = <&dmac0 0x47>, <&dmac0 0x46>; 1370 dma-names = "tx", "rx"; 1371 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1372 resets = <&cpg 208>; 1373 #address-cells = <1>; 1374 #size-cells = <0>; 1375 status = "disabled"; 1376 }; 1377 1378 vin0: video@e6ef0000 { 1379 compatible = "renesas,vin-r8a77965"; 1380 reg = <0 0xe6ef0000 0 0x1000>; 1381 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; 1382 clocks = <&cpg CPG_MOD 811>; 1383 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1384 resets = <&cpg 811>; 1385 renesas,id = <0>; 1386 status = "disabled"; 1387 1388 ports { 1389 #address-cells = <1>; 1390 #size-cells = <0>; 1391 1392 port@1 { 1393 #address-cells = <1>; 1394 #size-cells = <0>; 1395 1396 reg = <1>; 1397 1398 vin0csi20: endpoint@0 { 1399 reg = <0>; 1400 remote-endpoint = <&csi20vin0>; 1401 }; 1402 vin0csi40: endpoint@2 { 1403 reg = <2>; 1404 remote-endpoint = <&csi40vin0>; 1405 }; 1406 }; 1407 }; 1408 }; 1409 1410 vin1: video@e6ef1000 { 1411 compatible = "renesas,vin-r8a77965"; 1412 reg = <0 0xe6ef1000 0 0x1000>; 1413 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; 1414 clocks = <&cpg CPG_MOD 810>; 1415 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1416 resets = <&cpg 810>; 1417 renesas,id = <1>; 1418 status = "disabled"; 1419 1420 ports { 1421 #address-cells = <1>; 1422 #size-cells = <0>; 1423 1424 port@1 { 1425 #address-cells = <1>; 1426 #size-cells = <0>; 1427 1428 reg = <1>; 1429 1430 vin1csi20: endpoint@0 { 1431 reg = <0>; 1432 remote-endpoint = <&csi20vin1>; 1433 }; 1434 vin1csi40: endpoint@2 { 1435 reg = <2>; 1436 remote-endpoint = <&csi40vin1>; 1437 }; 1438 }; 1439 }; 1440 }; 1441 1442 vin2: video@e6ef2000 { 1443 compatible = "renesas,vin-r8a77965"; 1444 reg = <0 0xe6ef2000 0 0x1000>; 1445 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>; 1446 clocks = <&cpg CPG_MOD 809>; 1447 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1448 resets = <&cpg 809>; 1449 renesas,id = <2>; 1450 status = "disabled"; 1451 1452 ports { 1453 #address-cells = <1>; 1454 #size-cells = <0>; 1455 1456 port@1 { 1457 #address-cells = <1>; 1458 #size-cells = <0>; 1459 1460 reg = <1>; 1461 1462 vin2csi20: endpoint@0 { 1463 reg = <0>; 1464 remote-endpoint = <&csi20vin2>; 1465 }; 1466 vin2csi40: endpoint@2 { 1467 reg = <2>; 1468 remote-endpoint = <&csi40vin2>; 1469 }; 1470 }; 1471 }; 1472 }; 1473 1474 vin3: video@e6ef3000 { 1475 compatible = "renesas,vin-r8a77965"; 1476 reg = <0 0xe6ef3000 0 0x1000>; 1477 interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>; 1478 clocks = <&cpg CPG_MOD 808>; 1479 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1480 resets = <&cpg 808>; 1481 renesas,id = <3>; 1482 status = "disabled"; 1483 1484 ports { 1485 #address-cells = <1>; 1486 #size-cells = <0>; 1487 1488 port@1 { 1489 #address-cells = <1>; 1490 #size-cells = <0>; 1491 1492 reg = <1>; 1493 1494 vin3csi20: endpoint@0 { 1495 reg = <0>; 1496 remote-endpoint = <&csi20vin3>; 1497 }; 1498 vin3csi40: endpoint@2 { 1499 reg = <2>; 1500 remote-endpoint = <&csi40vin3>; 1501 }; 1502 }; 1503 }; 1504 }; 1505 1506 vin4: video@e6ef4000 { 1507 compatible = "renesas,vin-r8a77965"; 1508 reg = <0 0xe6ef4000 0 0x1000>; 1509 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; 1510 clocks = <&cpg CPG_MOD 807>; 1511 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1512 resets = <&cpg 807>; 1513 renesas,id = <4>; 1514 status = "disabled"; 1515 1516 ports { 1517 #address-cells = <1>; 1518 #size-cells = <0>; 1519 1520 port@1 { 1521 #address-cells = <1>; 1522 #size-cells = <0>; 1523 1524 reg = <1>; 1525 1526 vin4csi20: endpoint@0 { 1527 reg = <0>; 1528 remote-endpoint = <&csi20vin4>; 1529 }; 1530 vin4csi40: endpoint@2 { 1531 reg = <2>; 1532 remote-endpoint = <&csi40vin4>; 1533 }; 1534 }; 1535 }; 1536 }; 1537 1538 vin5: video@e6ef5000 { 1539 compatible = "renesas,vin-r8a77965"; 1540 reg = <0 0xe6ef5000 0 0x1000>; 1541 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; 1542 clocks = <&cpg CPG_MOD 806>; 1543 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1544 resets = <&cpg 806>; 1545 renesas,id = <5>; 1546 status = "disabled"; 1547 1548 ports { 1549 #address-cells = <1>; 1550 #size-cells = <0>; 1551 1552 port@1 { 1553 #address-cells = <1>; 1554 #size-cells = <0>; 1555 1556 reg = <1>; 1557 1558 vin5csi20: endpoint@0 { 1559 reg = <0>; 1560 remote-endpoint = <&csi20vin5>; 1561 }; 1562 vin5csi40: endpoint@2 { 1563 reg = <2>; 1564 remote-endpoint = <&csi40vin5>; 1565 }; 1566 }; 1567 }; 1568 }; 1569 1570 vin6: video@e6ef6000 { 1571 compatible = "renesas,vin-r8a77965"; 1572 reg = <0 0xe6ef6000 0 0x1000>; 1573 interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>; 1574 clocks = <&cpg CPG_MOD 805>; 1575 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1576 resets = <&cpg 805>; 1577 renesas,id = <6>; 1578 status = "disabled"; 1579 1580 ports { 1581 #address-cells = <1>; 1582 #size-cells = <0>; 1583 1584 port@1 { 1585 #address-cells = <1>; 1586 #size-cells = <0>; 1587 1588 reg = <1>; 1589 1590 vin6csi20: endpoint@0 { 1591 reg = <0>; 1592 remote-endpoint = <&csi20vin6>; 1593 }; 1594 vin6csi40: endpoint@2 { 1595 reg = <2>; 1596 remote-endpoint = <&csi40vin6>; 1597 }; 1598 }; 1599 }; 1600 }; 1601 1602 vin7: video@e6ef7000 { 1603 compatible = "renesas,vin-r8a77965"; 1604 reg = <0 0xe6ef7000 0 0x1000>; 1605 interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>; 1606 clocks = <&cpg CPG_MOD 804>; 1607 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1608 resets = <&cpg 804>; 1609 renesas,id = <7>; 1610 status = "disabled"; 1611 1612 ports { 1613 #address-cells = <1>; 1614 #size-cells = <0>; 1615 1616 port@1 { 1617 #address-cells = <1>; 1618 #size-cells = <0>; 1619 1620 reg = <1>; 1621 1622 vin7csi20: endpoint@0 { 1623 reg = <0>; 1624 remote-endpoint = <&csi20vin7>; 1625 }; 1626 vin7csi40: endpoint@2 { 1627 reg = <2>; 1628 remote-endpoint = <&csi40vin7>; 1629 }; 1630 }; 1631 }; 1632 }; 1633 1634 drif00: rif@e6f40000 { 1635 compatible = "renesas,r8a77965-drif", 1636 "renesas,rcar-gen3-drif"; 1637 reg = <0 0xe6f40000 0 0x84>; 1638 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; 1639 clocks = <&cpg CPG_MOD 515>; 1640 clock-names = "fck"; 1641 dmas = <&dmac1 0x20>, <&dmac2 0x20>; 1642 dma-names = "rx", "rx"; 1643 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1644 resets = <&cpg 515>; 1645 renesas,bonding = <&drif01>; 1646 status = "disabled"; 1647 }; 1648 1649 drif01: rif@e6f50000 { 1650 compatible = "renesas,r8a77965-drif", 1651 "renesas,rcar-gen3-drif"; 1652 reg = <0 0xe6f50000 0 0x84>; 1653 interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; 1654 clocks = <&cpg CPG_MOD 514>; 1655 clock-names = "fck"; 1656 dmas = <&dmac1 0x22>, <&dmac2 0x22>; 1657 dma-names = "rx", "rx"; 1658 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1659 resets = <&cpg 514>; 1660 renesas,bonding = <&drif00>; 1661 status = "disabled"; 1662 }; 1663 1664 drif10: rif@e6f60000 { 1665 compatible = "renesas,r8a77965-drif", 1666 "renesas,rcar-gen3-drif"; 1667 reg = <0 0xe6f60000 0 0x84>; 1668 interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; 1669 clocks = <&cpg CPG_MOD 513>; 1670 clock-names = "fck"; 1671 dmas = <&dmac1 0x24>, <&dmac2 0x24>; 1672 dma-names = "rx", "rx"; 1673 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1674 resets = <&cpg 513>; 1675 renesas,bonding = <&drif11>; 1676 status = "disabled"; 1677 }; 1678 1679 drif11: rif@e6f70000 { 1680 compatible = "renesas,r8a77965-drif", 1681 "renesas,rcar-gen3-drif"; 1682 reg = <0 0xe6f70000 0 0x84>; 1683 interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; 1684 clocks = <&cpg CPG_MOD 512>; 1685 clock-names = "fck"; 1686 dmas = <&dmac1 0x26>, <&dmac2 0x26>; 1687 dma-names = "rx", "rx"; 1688 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1689 resets = <&cpg 512>; 1690 renesas,bonding = <&drif10>; 1691 status = "disabled"; 1692 }; 1693 1694 drif20: rif@e6f80000 { 1695 compatible = "renesas,r8a77965-drif", 1696 "renesas,rcar-gen3-drif"; 1697 reg = <0 0xe6f80000 0 0x84>; 1698 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; 1699 clocks = <&cpg CPG_MOD 511>; 1700 clock-names = "fck"; 1701 dmas = <&dmac1 0x28>, <&dmac2 0x28>; 1702 dma-names = "rx", "rx"; 1703 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1704 resets = <&cpg 511>; 1705 renesas,bonding = <&drif21>; 1706 status = "disabled"; 1707 }; 1708 1709 drif21: rif@e6f90000 { 1710 compatible = "renesas,r8a77965-drif", 1711 "renesas,rcar-gen3-drif"; 1712 reg = <0 0xe6f90000 0 0x84>; 1713 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; 1714 clocks = <&cpg CPG_MOD 510>; 1715 clock-names = "fck"; 1716 dmas = <&dmac1 0x2a>, <&dmac2 0x2a>; 1717 dma-names = "rx", "rx"; 1718 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1719 resets = <&cpg 510>; 1720 renesas,bonding = <&drif20>; 1721 status = "disabled"; 1722 }; 1723 1724 drif30: rif@e6fa0000 { 1725 compatible = "renesas,r8a77965-drif", 1726 "renesas,rcar-gen3-drif"; 1727 reg = <0 0xe6fa0000 0 0x84>; 1728 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>; 1729 clocks = <&cpg CPG_MOD 509>; 1730 clock-names = "fck"; 1731 dmas = <&dmac1 0x2c>, <&dmac2 0x2c>; 1732 dma-names = "rx", "rx"; 1733 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1734 resets = <&cpg 509>; 1735 renesas,bonding = <&drif31>; 1736 status = "disabled"; 1737 }; 1738 1739 drif31: rif@e6fb0000 { 1740 compatible = "renesas,r8a77965-drif", 1741 "renesas,rcar-gen3-drif"; 1742 reg = <0 0xe6fb0000 0 0x84>; 1743 interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>; 1744 clocks = <&cpg CPG_MOD 508>; 1745 clock-names = "fck"; 1746 dmas = <&dmac1 0x2e>, <&dmac2 0x2e>; 1747 dma-names = "rx", "rx"; 1748 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1749 resets = <&cpg 508>; 1750 renesas,bonding = <&drif30>; 1751 status = "disabled"; 1752 }; 1753 1754 rcar_sound: sound@ec500000 { 1755 /* 1756 * #sound-dai-cells is required if simple-card 1757 * 1758 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; 1759 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; 1760 */ 1761 /* 1762 * #clock-cells is required for audio_clkout0/1/2/3 1763 * 1764 * clkout : #clock-cells = <0>; <&rcar_sound>; 1765 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>; 1766 */ 1767 compatible = "renesas,rcar_sound-r8a77965", "renesas,rcar_sound-gen3"; 1768 reg = <0 0xec500000 0 0x1000>, /* SCU */ 1769 <0 0xec5a0000 0 0x100>, /* ADG */ 1770 <0 0xec540000 0 0x1000>, /* SSIU */ 1771 <0 0xec541000 0 0x280>, /* SSI */ 1772 <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/ 1773 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; 1774 1775 clocks = <&cpg CPG_MOD 1005>, 1776 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, 1777 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, 1778 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, 1779 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, 1780 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, 1781 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, 1782 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, 1783 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, 1784 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, 1785 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, 1786 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 1787 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 1788 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, 1789 <&audio_clk_a>, <&audio_clk_b>, 1790 <&audio_clk_c>, 1791 <&cpg CPG_MOD 922>; 1792 clock-names = "ssi-all", 1793 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1794 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1795 "ssi.1", "ssi.0", 1796 "src.9", "src.8", "src.7", "src.6", 1797 "src.5", "src.4", "src.3", "src.2", 1798 "src.1", "src.0", 1799 "mix.1", "mix.0", 1800 "ctu.1", "ctu.0", 1801 "dvc.0", "dvc.1", 1802 "clk_a", "clk_b", "clk_c", "clk_i"; 1803 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1804 resets = <&cpg 1005>, 1805 <&cpg 1006>, <&cpg 1007>, 1806 <&cpg 1008>, <&cpg 1009>, 1807 <&cpg 1010>, <&cpg 1011>, 1808 <&cpg 1012>, <&cpg 1013>, 1809 <&cpg 1014>, <&cpg 1015>; 1810 reset-names = "ssi-all", 1811 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1812 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1813 "ssi.1", "ssi.0"; 1814 status = "disabled"; 1815 1816 rcar_sound,dvc { 1817 dvc0: dvc-0 { 1818 dmas = <&audma1 0xbc>; 1819 dma-names = "tx"; 1820 }; 1821 dvc1: dvc-1 { 1822 dmas = <&audma1 0xbe>; 1823 dma-names = "tx"; 1824 }; 1825 }; 1826 1827 rcar_sound,mix { 1828 mix0: mix-0 { }; 1829 mix1: mix-1 { }; 1830 }; 1831 1832 rcar_sound,ctu { 1833 ctu00: ctu-0 { }; 1834 ctu01: ctu-1 { }; 1835 ctu02: ctu-2 { }; 1836 ctu03: ctu-3 { }; 1837 ctu10: ctu-4 { }; 1838 ctu11: ctu-5 { }; 1839 ctu12: ctu-6 { }; 1840 ctu13: ctu-7 { }; 1841 }; 1842 1843 rcar_sound,src { 1844 src0: src-0 { 1845 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; 1846 dmas = <&audma0 0x85>, <&audma1 0x9a>; 1847 dma-names = "rx", "tx"; 1848 }; 1849 src1: src-1 { 1850 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; 1851 dmas = <&audma0 0x87>, <&audma1 0x9c>; 1852 dma-names = "rx", "tx"; 1853 }; 1854 src2: src-2 { 1855 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; 1856 dmas = <&audma0 0x89>, <&audma1 0x9e>; 1857 dma-names = "rx", "tx"; 1858 }; 1859 src3: src-3 { 1860 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; 1861 dmas = <&audma0 0x8b>, <&audma1 0xa0>; 1862 dma-names = "rx", "tx"; 1863 }; 1864 src4: src-4 { 1865 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; 1866 dmas = <&audma0 0x8d>, <&audma1 0xb0>; 1867 dma-names = "rx", "tx"; 1868 }; 1869 src5: src-5 { 1870 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; 1871 dmas = <&audma0 0x8f>, <&audma1 0xb2>; 1872 dma-names = "rx", "tx"; 1873 }; 1874 src6: src-6 { 1875 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; 1876 dmas = <&audma0 0x91>, <&audma1 0xb4>; 1877 dma-names = "rx", "tx"; 1878 }; 1879 src7: src-7 { 1880 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; 1881 dmas = <&audma0 0x93>, <&audma1 0xb6>; 1882 dma-names = "rx", "tx"; 1883 }; 1884 src8: src-8 { 1885 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; 1886 dmas = <&audma0 0x95>, <&audma1 0xb8>; 1887 dma-names = "rx", "tx"; 1888 }; 1889 src9: src-9 { 1890 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>; 1891 dmas = <&audma0 0x97>, <&audma1 0xba>; 1892 dma-names = "rx", "tx"; 1893 }; 1894 }; 1895 1896 rcar_sound,ssiu { 1897 ssiu00: ssiu-0 { 1898 dmas = <&audma0 0x15>, <&audma1 0x16>; 1899 dma-names = "rx", "tx"; 1900 }; 1901 ssiu01: ssiu-1 { 1902 dmas = <&audma0 0x35>, <&audma1 0x36>; 1903 dma-names = "rx", "tx"; 1904 }; 1905 ssiu02: ssiu-2 { 1906 dmas = <&audma0 0x37>, <&audma1 0x38>; 1907 dma-names = "rx", "tx"; 1908 }; 1909 ssiu03: ssiu-3 { 1910 dmas = <&audma0 0x47>, <&audma1 0x48>; 1911 dma-names = "rx", "tx"; 1912 }; 1913 ssiu04: ssiu-4 { 1914 dmas = <&audma0 0x3F>, <&audma1 0x40>; 1915 dma-names = "rx", "tx"; 1916 }; 1917 ssiu05: ssiu-5 { 1918 dmas = <&audma0 0x43>, <&audma1 0x44>; 1919 dma-names = "rx", "tx"; 1920 }; 1921 ssiu06: ssiu-6 { 1922 dmas = <&audma0 0x4F>, <&audma1 0x50>; 1923 dma-names = "rx", "tx"; 1924 }; 1925 ssiu07: ssiu-7 { 1926 dmas = <&audma0 0x53>, <&audma1 0x54>; 1927 dma-names = "rx", "tx"; 1928 }; 1929 ssiu10: ssiu-8 { 1930 dmas = <&audma0 0x49>, <&audma1 0x4a>; 1931 dma-names = "rx", "tx"; 1932 }; 1933 ssiu11: ssiu-9 { 1934 dmas = <&audma0 0x4B>, <&audma1 0x4C>; 1935 dma-names = "rx", "tx"; 1936 }; 1937 ssiu12: ssiu-10 { 1938 dmas = <&audma0 0x57>, <&audma1 0x58>; 1939 dma-names = "rx", "tx"; 1940 }; 1941 ssiu13: ssiu-11 { 1942 dmas = <&audma0 0x59>, <&audma1 0x5A>; 1943 dma-names = "rx", "tx"; 1944 }; 1945 ssiu14: ssiu-12 { 1946 dmas = <&audma0 0x5F>, <&audma1 0x60>; 1947 dma-names = "rx", "tx"; 1948 }; 1949 ssiu15: ssiu-13 { 1950 dmas = <&audma0 0xC3>, <&audma1 0xC4>; 1951 dma-names = "rx", "tx"; 1952 }; 1953 ssiu16: ssiu-14 { 1954 dmas = <&audma0 0xC7>, <&audma1 0xC8>; 1955 dma-names = "rx", "tx"; 1956 }; 1957 ssiu17: ssiu-15 { 1958 dmas = <&audma0 0xCB>, <&audma1 0xCC>; 1959 dma-names = "rx", "tx"; 1960 }; 1961 ssiu20: ssiu-16 { 1962 dmas = <&audma0 0x63>, <&audma1 0x64>; 1963 dma-names = "rx", "tx"; 1964 }; 1965 ssiu21: ssiu-17 { 1966 dmas = <&audma0 0x67>, <&audma1 0x68>; 1967 dma-names = "rx", "tx"; 1968 }; 1969 ssiu22: ssiu-18 { 1970 dmas = <&audma0 0x6B>, <&audma1 0x6C>; 1971 dma-names = "rx", "tx"; 1972 }; 1973 ssiu23: ssiu-19 { 1974 dmas = <&audma0 0x6D>, <&audma1 0x6E>; 1975 dma-names = "rx", "tx"; 1976 }; 1977 ssiu24: ssiu-20 { 1978 dmas = <&audma0 0xCF>, <&audma1 0xCE>; 1979 dma-names = "rx", "tx"; 1980 }; 1981 ssiu25: ssiu-21 { 1982 dmas = <&audma0 0xEB>, <&audma1 0xEC>; 1983 dma-names = "rx", "tx"; 1984 }; 1985 ssiu26: ssiu-22 { 1986 dmas = <&audma0 0xED>, <&audma1 0xEE>; 1987 dma-names = "rx", "tx"; 1988 }; 1989 ssiu27: ssiu-23 { 1990 dmas = <&audma0 0xEF>, <&audma1 0xF0>; 1991 dma-names = "rx", "tx"; 1992 }; 1993 ssiu30: ssiu-24 { 1994 dmas = <&audma0 0x6f>, <&audma1 0x70>; 1995 dma-names = "rx", "tx"; 1996 }; 1997 ssiu31: ssiu-25 { 1998 dmas = <&audma0 0x21>, <&audma1 0x22>; 1999 dma-names = "rx", "tx"; 2000 }; 2001 ssiu32: ssiu-26 { 2002 dmas = <&audma0 0x23>, <&audma1 0x24>; 2003 dma-names = "rx", "tx"; 2004 }; 2005 ssiu33: ssiu-27 { 2006 dmas = <&audma0 0x25>, <&audma1 0x26>; 2007 dma-names = "rx", "tx"; 2008 }; 2009 ssiu34: ssiu-28 { 2010 dmas = <&audma0 0x27>, <&audma1 0x28>; 2011 dma-names = "rx", "tx"; 2012 }; 2013 ssiu35: ssiu-29 { 2014 dmas = <&audma0 0x29>, <&audma1 0x2A>; 2015 dma-names = "rx", "tx"; 2016 }; 2017 ssiu36: ssiu-30 { 2018 dmas = <&audma0 0x2B>, <&audma1 0x2C>; 2019 dma-names = "rx", "tx"; 2020 }; 2021 ssiu37: ssiu-31 { 2022 dmas = <&audma0 0x2D>, <&audma1 0x2E>; 2023 dma-names = "rx", "tx"; 2024 }; 2025 ssiu40: ssiu-32 { 2026 dmas = <&audma0 0x71>, <&audma1 0x72>; 2027 dma-names = "rx", "tx"; 2028 }; 2029 ssiu41: ssiu-33 { 2030 dmas = <&audma0 0x17>, <&audma1 0x18>; 2031 dma-names = "rx", "tx"; 2032 }; 2033 ssiu42: ssiu-34 { 2034 dmas = <&audma0 0x19>, <&audma1 0x1A>; 2035 dma-names = "rx", "tx"; 2036 }; 2037 ssiu43: ssiu-35 { 2038 dmas = <&audma0 0x1B>, <&audma1 0x1C>; 2039 dma-names = "rx", "tx"; 2040 }; 2041 ssiu44: ssiu-36 { 2042 dmas = <&audma0 0x1D>, <&audma1 0x1E>; 2043 dma-names = "rx", "tx"; 2044 }; 2045 ssiu45: ssiu-37 { 2046 dmas = <&audma0 0x1F>, <&audma1 0x20>; 2047 dma-names = "rx", "tx"; 2048 }; 2049 ssiu46: ssiu-38 { 2050 dmas = <&audma0 0x31>, <&audma1 0x32>; 2051 dma-names = "rx", "tx"; 2052 }; 2053 ssiu47: ssiu-39 { 2054 dmas = <&audma0 0x33>, <&audma1 0x34>; 2055 dma-names = "rx", "tx"; 2056 }; 2057 ssiu50: ssiu-40 { 2058 dmas = <&audma0 0x73>, <&audma1 0x74>; 2059 dma-names = "rx", "tx"; 2060 }; 2061 ssiu60: ssiu-41 { 2062 dmas = <&audma0 0x75>, <&audma1 0x76>; 2063 dma-names = "rx", "tx"; 2064 }; 2065 ssiu70: ssiu-42 { 2066 dmas = <&audma0 0x79>, <&audma1 0x7a>; 2067 dma-names = "rx", "tx"; 2068 }; 2069 ssiu80: ssiu-43 { 2070 dmas = <&audma0 0x7b>, <&audma1 0x7c>; 2071 dma-names = "rx", "tx"; 2072 }; 2073 ssiu90: ssiu-44 { 2074 dmas = <&audma0 0x7d>, <&audma1 0x7e>; 2075 dma-names = "rx", "tx"; 2076 }; 2077 ssiu91: ssiu-45 { 2078 dmas = <&audma0 0x7F>, <&audma1 0x80>; 2079 dma-names = "rx", "tx"; 2080 }; 2081 ssiu92: ssiu-46 { 2082 dmas = <&audma0 0x81>, <&audma1 0x82>; 2083 dma-names = "rx", "tx"; 2084 }; 2085 ssiu93: ssiu-47 { 2086 dmas = <&audma0 0x83>, <&audma1 0x84>; 2087 dma-names = "rx", "tx"; 2088 }; 2089 ssiu94: ssiu-48 { 2090 dmas = <&audma0 0xA3>, <&audma1 0xA4>; 2091 dma-names = "rx", "tx"; 2092 }; 2093 ssiu95: ssiu-49 { 2094 dmas = <&audma0 0xA5>, <&audma1 0xA6>; 2095 dma-names = "rx", "tx"; 2096 }; 2097 ssiu96: ssiu-50 { 2098 dmas = <&audma0 0xA7>, <&audma1 0xA8>; 2099 dma-names = "rx", "tx"; 2100 }; 2101 ssiu97: ssiu-51 { 2102 dmas = <&audma0 0xA9>, <&audma1 0xAA>; 2103 dma-names = "rx", "tx"; 2104 }; 2105 }; 2106 2107 rcar_sound,ssi { 2108 ssi0: ssi-0 { 2109 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; 2110 dmas = <&audma0 0x01>, <&audma1 0x02>; 2111 dma-names = "rx", "tx"; 2112 }; 2113 ssi1: ssi-1 { 2114 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; 2115 dmas = <&audma0 0x03>, <&audma1 0x04>; 2116 dma-names = "rx", "tx"; 2117 }; 2118 ssi2: ssi-2 { 2119 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; 2120 dmas = <&audma0 0x05>, <&audma1 0x06>; 2121 dma-names = "rx", "tx"; 2122 }; 2123 ssi3: ssi-3 { 2124 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; 2125 dmas = <&audma0 0x07>, <&audma1 0x08>; 2126 dma-names = "rx", "tx"; 2127 }; 2128 ssi4: ssi-4 { 2129 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; 2130 dmas = <&audma0 0x09>, <&audma1 0x0a>; 2131 dma-names = "rx", "tx"; 2132 }; 2133 ssi5: ssi-5 { 2134 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; 2135 dmas = <&audma0 0x0b>, <&audma1 0x0c>; 2136 dma-names = "rx", "tx"; 2137 }; 2138 ssi6: ssi-6 { 2139 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; 2140 dmas = <&audma0 0x0d>, <&audma1 0x0e>; 2141 dma-names = "rx", "tx"; 2142 }; 2143 ssi7: ssi-7 { 2144 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; 2145 dmas = <&audma0 0x0f>, <&audma1 0x10>; 2146 dma-names = "rx", "tx"; 2147 }; 2148 ssi8: ssi-8 { 2149 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; 2150 dmas = <&audma0 0x11>, <&audma1 0x12>; 2151 dma-names = "rx", "tx"; 2152 }; 2153 ssi9: ssi-9 { 2154 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; 2155 dmas = <&audma0 0x13>, <&audma1 0x14>; 2156 dma-names = "rx", "tx"; 2157 }; 2158 }; 2159 }; 2160 2161 mlp: mlp@ec520000 { 2162 compatible = "renesas,r8a77965-mlp", 2163 "renesas,rcar-gen3-mlp"; 2164 reg = <0 0xec520000 0 0x800>; 2165 interrupts = <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>, 2166 <GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH>; 2167 clocks = <&cpg CPG_MOD 802>; 2168 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2169 resets = <&cpg 802>; 2170 status = "disabled"; 2171 }; 2172 2173 audma0: dma-controller@ec700000 { 2174 compatible = "renesas,dmac-r8a77965", 2175 "renesas,rcar-dmac"; 2176 reg = <0 0xec700000 0 0x10000>; 2177 interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>, 2178 <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>, 2179 <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>, 2180 <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>, 2181 <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>, 2182 <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>, 2183 <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>, 2184 <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>, 2185 <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>, 2186 <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>, 2187 <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>, 2188 <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>, 2189 <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>, 2190 <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>, 2191 <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>, 2192 <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>, 2193 <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>; 2194 interrupt-names = "error", 2195 "ch0", "ch1", "ch2", "ch3", 2196 "ch4", "ch5", "ch6", "ch7", 2197 "ch8", "ch9", "ch10", "ch11", 2198 "ch12", "ch13", "ch14", "ch15"; 2199 clocks = <&cpg CPG_MOD 502>; 2200 clock-names = "fck"; 2201 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2202 resets = <&cpg 502>; 2203 #dma-cells = <1>; 2204 dma-channels = <16>; 2205 iommus = <&ipmmu_mp 0>, <&ipmmu_mp 1>, 2206 <&ipmmu_mp 2>, <&ipmmu_mp 3>, 2207 <&ipmmu_mp 4>, <&ipmmu_mp 5>, 2208 <&ipmmu_mp 6>, <&ipmmu_mp 7>, 2209 <&ipmmu_mp 8>, <&ipmmu_mp 9>, 2210 <&ipmmu_mp 10>, <&ipmmu_mp 11>, 2211 <&ipmmu_mp 12>, <&ipmmu_mp 13>, 2212 <&ipmmu_mp 14>, <&ipmmu_mp 15>; 2213 }; 2214 2215 audma1: dma-controller@ec720000 { 2216 compatible = "renesas,dmac-r8a77965", 2217 "renesas,rcar-dmac"; 2218 reg = <0 0xec720000 0 0x10000>; 2219 interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>, 2220 <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>, 2221 <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>, 2222 <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>, 2223 <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>, 2224 <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>, 2225 <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>, 2226 <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>, 2227 <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>, 2228 <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>, 2229 <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>, 2230 <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>, 2231 <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>, 2232 <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>, 2233 <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>, 2234 <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>, 2235 <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>; 2236 interrupt-names = "error", 2237 "ch0", "ch1", "ch2", "ch3", 2238 "ch4", "ch5", "ch6", "ch7", 2239 "ch8", "ch9", "ch10", "ch11", 2240 "ch12", "ch13", "ch14", "ch15"; 2241 clocks = <&cpg CPG_MOD 501>; 2242 clock-names = "fck"; 2243 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2244 resets = <&cpg 501>; 2245 #dma-cells = <1>; 2246 dma-channels = <16>; 2247 iommus = <&ipmmu_mp 16>, <&ipmmu_mp 17>, 2248 <&ipmmu_mp 18>, <&ipmmu_mp 19>, 2249 <&ipmmu_mp 20>, <&ipmmu_mp 21>, 2250 <&ipmmu_mp 22>, <&ipmmu_mp 23>, 2251 <&ipmmu_mp 24>, <&ipmmu_mp 25>, 2252 <&ipmmu_mp 26>, <&ipmmu_mp 27>, 2253 <&ipmmu_mp 28>, <&ipmmu_mp 29>, 2254 <&ipmmu_mp 30>, <&ipmmu_mp 31>; 2255 }; 2256 2257 xhci0: usb@ee000000 { 2258 compatible = "renesas,xhci-r8a77965", 2259 "renesas,rcar-gen3-xhci"; 2260 reg = <0 0xee000000 0 0xc00>; 2261 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; 2262 clocks = <&cpg CPG_MOD 328>; 2263 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2264 resets = <&cpg 328>; 2265 status = "disabled"; 2266 }; 2267 2268 usb3_peri0: usb@ee020000 { 2269 compatible = "renesas,r8a77965-usb3-peri", 2270 "renesas,rcar-gen3-usb3-peri"; 2271 reg = <0 0xee020000 0 0x400>; 2272 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>; 2273 clocks = <&cpg CPG_MOD 328>; 2274 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2275 resets = <&cpg 328>; 2276 status = "disabled"; 2277 }; 2278 2279 ohci0: usb@ee080000 { 2280 compatible = "generic-ohci"; 2281 reg = <0 0xee080000 0 0x100>; 2282 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 2283 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 2284 phys = <&usb2_phy0 1>; 2285 phy-names = "usb"; 2286 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2287 resets = <&cpg 703>, <&cpg 704>; 2288 status = "disabled"; 2289 }; 2290 2291 ohci1: usb@ee0a0000 { 2292 compatible = "generic-ohci"; 2293 reg = <0 0xee0a0000 0 0x100>; 2294 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; 2295 clocks = <&cpg CPG_MOD 702>; 2296 phys = <&usb2_phy1 1>; 2297 phy-names = "usb"; 2298 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2299 resets = <&cpg 702>; 2300 status = "disabled"; 2301 }; 2302 2303 ehci0: usb@ee080100 { 2304 compatible = "generic-ehci"; 2305 reg = <0 0xee080100 0 0x100>; 2306 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 2307 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 2308 phys = <&usb2_phy0 2>; 2309 phy-names = "usb"; 2310 companion = <&ohci0>; 2311 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2312 resets = <&cpg 703>, <&cpg 704>; 2313 status = "disabled"; 2314 }; 2315 2316 ehci1: usb@ee0a0100 { 2317 compatible = "generic-ehci"; 2318 reg = <0 0xee0a0100 0 0x100>; 2319 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; 2320 clocks = <&cpg CPG_MOD 702>; 2321 phys = <&usb2_phy1 2>; 2322 phy-names = "usb"; 2323 companion = <&ohci1>; 2324 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2325 resets = <&cpg 702>; 2326 status = "disabled"; 2327 }; 2328 2329 usb2_phy0: usb-phy@ee080200 { 2330 compatible = "renesas,usb2-phy-r8a77965", 2331 "renesas,rcar-gen3-usb2-phy"; 2332 reg = <0 0xee080200 0 0x700>; 2333 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 2334 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 2335 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2336 resets = <&cpg 703>, <&cpg 704>; 2337 #phy-cells = <1>; 2338 status = "disabled"; 2339 }; 2340 2341 usb2_phy1: usb-phy@ee0a0200 { 2342 compatible = "renesas,usb2-phy-r8a77965", 2343 "renesas,rcar-gen3-usb2-phy"; 2344 reg = <0 0xee0a0200 0 0x700>; 2345 clocks = <&cpg CPG_MOD 702>; 2346 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2347 resets = <&cpg 702>; 2348 #phy-cells = <1>; 2349 status = "disabled"; 2350 }; 2351 2352 sdhi0: mmc@ee100000 { 2353 compatible = "renesas,sdhi-r8a77965", 2354 "renesas,rcar-gen3-sdhi"; 2355 reg = <0 0xee100000 0 0x2000>; 2356 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; 2357 clocks = <&cpg CPG_MOD 314>, <&cpg CPG_CORE R8A77965_CLK_SD0H>; 2358 clock-names = "core", "clkh"; 2359 max-frequency = <200000000>; 2360 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2361 resets = <&cpg 314>; 2362 iommus = <&ipmmu_ds1 32>; 2363 status = "disabled"; 2364 }; 2365 2366 sdhi1: mmc@ee120000 { 2367 compatible = "renesas,sdhi-r8a77965", 2368 "renesas,rcar-gen3-sdhi"; 2369 reg = <0 0xee120000 0 0x2000>; 2370 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; 2371 clocks = <&cpg CPG_MOD 313>, <&cpg CPG_CORE R8A77965_CLK_SD1H>; 2372 clock-names = "core", "clkh"; 2373 max-frequency = <200000000>; 2374 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2375 resets = <&cpg 313>; 2376 iommus = <&ipmmu_ds1 33>; 2377 status = "disabled"; 2378 }; 2379 2380 sdhi2: mmc@ee140000 { 2381 compatible = "renesas,sdhi-r8a77965", 2382 "renesas,rcar-gen3-sdhi"; 2383 reg = <0 0xee140000 0 0x2000>; 2384 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; 2385 clocks = <&cpg CPG_MOD 312>, <&cpg CPG_CORE R8A77965_CLK_SD2H>; 2386 clock-names = "core", "clkh"; 2387 max-frequency = <200000000>; 2388 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2389 resets = <&cpg 312>; 2390 iommus = <&ipmmu_ds1 34>; 2391 status = "disabled"; 2392 }; 2393 2394 sdhi3: mmc@ee160000 { 2395 compatible = "renesas,sdhi-r8a77965", 2396 "renesas,rcar-gen3-sdhi"; 2397 reg = <0 0xee160000 0 0x2000>; 2398 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; 2399 clocks = <&cpg CPG_MOD 311>, <&cpg CPG_CORE R8A77965_CLK_SD3H>; 2400 clock-names = "core", "clkh"; 2401 max-frequency = <200000000>; 2402 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2403 resets = <&cpg 311>; 2404 iommus = <&ipmmu_ds1 35>; 2405 status = "disabled"; 2406 }; 2407 2408 rpc: spi@ee200000 { 2409 compatible = "renesas,r8a77965-rpc-if", 2410 "renesas,rcar-gen3-rpc-if"; 2411 reg = <0 0xee200000 0 0x200>, 2412 <0 0x08000000 0 0x04000000>, 2413 <0 0xee208000 0 0x100>; 2414 reg-names = "regs", "dirmap", "wbuf"; 2415 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; 2416 clocks = <&cpg CPG_MOD 917>; 2417 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2418 resets = <&cpg 917>; 2419 #address-cells = <1>; 2420 #size-cells = <0>; 2421 status = "disabled"; 2422 }; 2423 2424 sata: sata@ee300000 { 2425 compatible = "renesas,sata-r8a77965", 2426 "renesas,rcar-gen3-sata"; 2427 reg = <0 0xee300000 0 0x200000>; 2428 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>; 2429 clocks = <&cpg CPG_MOD 815>; 2430 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2431 resets = <&cpg 815>; 2432 iommus = <&ipmmu_hc 2>; 2433 status = "disabled"; 2434 }; 2435 2436 gic: interrupt-controller@f1010000 { 2437 compatible = "arm,gic-400"; 2438 #interrupt-cells = <3>; 2439 #address-cells = <0>; 2440 interrupt-controller; 2441 reg = <0x0 0xf1010000 0 0x1000>, 2442 <0x0 0xf1020000 0 0x20000>, 2443 <0x0 0xf1040000 0 0x20000>, 2444 <0x0 0xf1060000 0 0x20000>; 2445 interrupts = <GIC_PPI 9 2446 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>; 2447 clocks = <&cpg CPG_MOD 408>; 2448 clock-names = "clk"; 2449 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2450 resets = <&cpg 408>; 2451 }; 2452 2453 gpu: gpu@fd000000 { 2454 compatible = "renesas,r8a77965-gpu", 2455 "img,img-ge7800", 2456 "img,img-rogue"; 2457 reg = <0 0xfd000000 0 0x40000>; 2458 interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>; 2459 clocks = <&cpg CPG_CORE R8A77965_CLK_ZG>, 2460 <&cpg CPG_CORE R8A77965_CLK_S2D1>, 2461 <&cpg CPG_MOD 112>; 2462 clock-names = "core", "mem", "sys"; 2463 power-domains = <&sysc R8A77965_PD_3DG_A>, 2464 <&sysc R8A77965_PD_3DG_B>; 2465 power-domain-names = "a", "b"; 2466 resets = <&cpg 112>; 2467 status = "disabled"; 2468 }; 2469 2470 pciec0: pcie@fe000000 { 2471 compatible = "renesas,pcie-r8a77965", 2472 "renesas,pcie-rcar-gen3"; 2473 reg = <0 0xfe000000 0 0x80000>; 2474 #address-cells = <3>; 2475 #size-cells = <2>; 2476 bus-range = <0x00 0xff>; 2477 device_type = "pci"; 2478 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>, 2479 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>, 2480 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>, 2481 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; 2482 /* Map all possible DDR/IOMMU as inbound ranges */ 2483 dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>; 2484 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, 2485 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, 2486 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; 2487 #interrupt-cells = <1>; 2488 interrupt-map-mask = <0 0 0 0>; 2489 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; 2490 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>; 2491 clock-names = "pcie", "pcie_bus"; 2492 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2493 resets = <&cpg 319>; 2494 iommu-map = <0 &ipmmu_hc 0 1>; 2495 iommu-map-mask = <0>; 2496 status = "disabled"; 2497 }; 2498 2499 pciec1: pcie@ee800000 { 2500 compatible = "renesas,pcie-r8a77965", 2501 "renesas,pcie-rcar-gen3"; 2502 reg = <0 0xee800000 0 0x80000>; 2503 #address-cells = <3>; 2504 #size-cells = <2>; 2505 bus-range = <0x00 0xff>; 2506 device_type = "pci"; 2507 ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000>, 2508 <0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000>, 2509 <0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000>, 2510 <0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>; 2511 /* Map all possible DDR/IOMMU as inbound ranges */ 2512 dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>; 2513 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>, 2514 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>, 2515 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; 2516 #interrupt-cells = <1>; 2517 interrupt-map-mask = <0 0 0 0>; 2518 interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; 2519 clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>; 2520 clock-names = "pcie", "pcie_bus"; 2521 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2522 resets = <&cpg 318>; 2523 iommu-map = <0 &ipmmu_hc 1 1>; 2524 iommu-map-mask = <0>; 2525 status = "disabled"; 2526 }; 2527 2528 fdp1@fe940000 { 2529 compatible = "renesas,fdp1"; 2530 reg = <0 0xfe940000 0 0x2400>; 2531 interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>; 2532 clocks = <&cpg CPG_MOD 119>; 2533 power-domains = <&sysc R8A77965_PD_A3VP>; 2534 resets = <&cpg 119>; 2535 renesas,fcp = <&fcpf0>; 2536 }; 2537 2538 fcpf0: fcp@fe950000 { 2539 compatible = "renesas,fcpf"; 2540 reg = <0 0xfe950000 0 0x200>; 2541 clocks = <&cpg CPG_MOD 615>; 2542 power-domains = <&sysc R8A77965_PD_A3VP>; 2543 resets = <&cpg 615>; 2544 iommus = <&ipmmu_vp0 0>; 2545 }; 2546 2547 vspb: vsp@fe960000 { 2548 compatible = "renesas,vsp2"; 2549 reg = <0 0xfe960000 0 0x8000>; 2550 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>; 2551 clocks = <&cpg CPG_MOD 626>; 2552 power-domains = <&sysc R8A77965_PD_A3VP>; 2553 resets = <&cpg 626>; 2554 2555 renesas,fcp = <&fcpvb0>; 2556 }; 2557 2558 vspi0: vsp@fe9a0000 { 2559 compatible = "renesas,vsp2"; 2560 reg = <0 0xfe9a0000 0 0x8000>; 2561 interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>; 2562 clocks = <&cpg CPG_MOD 631>; 2563 power-domains = <&sysc R8A77965_PD_A3VP>; 2564 resets = <&cpg 631>; 2565 2566 renesas,fcp = <&fcpvi0>; 2567 }; 2568 2569 vspd0: vsp@fea20000 { 2570 compatible = "renesas,vsp2"; 2571 reg = <0 0xfea20000 0 0x5000>; 2572 interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>; 2573 clocks = <&cpg CPG_MOD 623>; 2574 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2575 resets = <&cpg 623>; 2576 2577 renesas,fcp = <&fcpvd0>; 2578 }; 2579 2580 vspd1: vsp@fea28000 { 2581 compatible = "renesas,vsp2"; 2582 reg = <0 0xfea28000 0 0x5000>; 2583 interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>; 2584 clocks = <&cpg CPG_MOD 622>; 2585 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2586 resets = <&cpg 622>; 2587 2588 renesas,fcp = <&fcpvd1>; 2589 }; 2590 2591 fcpvb0: fcp@fe96f000 { 2592 compatible = "renesas,fcpv"; 2593 reg = <0 0xfe96f000 0 0x200>; 2594 clocks = <&cpg CPG_MOD 607>; 2595 power-domains = <&sysc R8A77965_PD_A3VP>; 2596 resets = <&cpg 607>; 2597 iommus = <&ipmmu_vp0 5>; 2598 }; 2599 2600 fcpvd0: fcp@fea27000 { 2601 compatible = "renesas,fcpv"; 2602 reg = <0 0xfea27000 0 0x200>; 2603 clocks = <&cpg CPG_MOD 603>; 2604 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2605 resets = <&cpg 603>; 2606 iommus = <&ipmmu_vi0 8>; 2607 }; 2608 2609 fcpvd1: fcp@fea2f000 { 2610 compatible = "renesas,fcpv"; 2611 reg = <0 0xfea2f000 0 0x200>; 2612 clocks = <&cpg CPG_MOD 602>; 2613 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2614 resets = <&cpg 602>; 2615 iommus = <&ipmmu_vi0 9>; 2616 }; 2617 2618 fcpvi0: fcp@fe9af000 { 2619 compatible = "renesas,fcpv"; 2620 reg = <0 0xfe9af000 0 0x200>; 2621 clocks = <&cpg CPG_MOD 611>; 2622 power-domains = <&sysc R8A77965_PD_A3VP>; 2623 resets = <&cpg 611>; 2624 iommus = <&ipmmu_vp0 8>; 2625 }; 2626 2627 cmm0: cmm@fea40000 { 2628 compatible = "renesas,r8a77965-cmm", 2629 "renesas,rcar-gen3-cmm"; 2630 reg = <0 0xfea40000 0 0x1000>; 2631 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2632 clocks = <&cpg CPG_MOD 711>; 2633 resets = <&cpg 711>; 2634 }; 2635 2636 cmm1: cmm@fea50000 { 2637 compatible = "renesas,r8a77965-cmm", 2638 "renesas,rcar-gen3-cmm"; 2639 reg = <0 0xfea50000 0 0x1000>; 2640 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2641 clocks = <&cpg CPG_MOD 710>; 2642 resets = <&cpg 710>; 2643 }; 2644 2645 cmm3: cmm@fea70000 { 2646 compatible = "renesas,r8a77965-cmm", 2647 "renesas,rcar-gen3-cmm"; 2648 reg = <0 0xfea70000 0 0x1000>; 2649 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2650 clocks = <&cpg CPG_MOD 708>; 2651 resets = <&cpg 708>; 2652 }; 2653 2654 csi20: csi2@fea80000 { 2655 compatible = "renesas,r8a77965-csi2"; 2656 reg = <0 0xfea80000 0 0x10000>; 2657 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; 2658 clocks = <&cpg CPG_MOD 714>; 2659 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2660 resets = <&cpg 714>; 2661 status = "disabled"; 2662 2663 ports { 2664 #address-cells = <1>; 2665 #size-cells = <0>; 2666 2667 port@0 { 2668 reg = <0>; 2669 }; 2670 2671 port@1 { 2672 #address-cells = <1>; 2673 #size-cells = <0>; 2674 2675 reg = <1>; 2676 2677 csi20vin0: endpoint@0 { 2678 reg = <0>; 2679 remote-endpoint = <&vin0csi20>; 2680 }; 2681 csi20vin1: endpoint@1 { 2682 reg = <1>; 2683 remote-endpoint = <&vin1csi20>; 2684 }; 2685 csi20vin2: endpoint@2 { 2686 reg = <2>; 2687 remote-endpoint = <&vin2csi20>; 2688 }; 2689 csi20vin3: endpoint@3 { 2690 reg = <3>; 2691 remote-endpoint = <&vin3csi20>; 2692 }; 2693 csi20vin4: endpoint@4 { 2694 reg = <4>; 2695 remote-endpoint = <&vin4csi20>; 2696 }; 2697 csi20vin5: endpoint@5 { 2698 reg = <5>; 2699 remote-endpoint = <&vin5csi20>; 2700 }; 2701 csi20vin6: endpoint@6 { 2702 reg = <6>; 2703 remote-endpoint = <&vin6csi20>; 2704 }; 2705 csi20vin7: endpoint@7 { 2706 reg = <7>; 2707 remote-endpoint = <&vin7csi20>; 2708 }; 2709 }; 2710 }; 2711 }; 2712 2713 csi40: csi2@feaa0000 { 2714 compatible = "renesas,r8a77965-csi2"; 2715 reg = <0 0xfeaa0000 0 0x10000>; 2716 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; 2717 clocks = <&cpg CPG_MOD 716>; 2718 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2719 resets = <&cpg 716>; 2720 status = "disabled"; 2721 2722 ports { 2723 #address-cells = <1>; 2724 #size-cells = <0>; 2725 2726 port@0 { 2727 reg = <0>; 2728 }; 2729 2730 port@1 { 2731 #address-cells = <1>; 2732 #size-cells = <0>; 2733 2734 reg = <1>; 2735 2736 csi40vin0: endpoint@0 { 2737 reg = <0>; 2738 remote-endpoint = <&vin0csi40>; 2739 }; 2740 csi40vin1: endpoint@1 { 2741 reg = <1>; 2742 remote-endpoint = <&vin1csi40>; 2743 }; 2744 csi40vin2: endpoint@2 { 2745 reg = <2>; 2746 remote-endpoint = <&vin2csi40>; 2747 }; 2748 csi40vin3: endpoint@3 { 2749 reg = <3>; 2750 remote-endpoint = <&vin3csi40>; 2751 }; 2752 csi40vin4: endpoint@4 { 2753 reg = <4>; 2754 remote-endpoint = <&vin4csi40>; 2755 }; 2756 csi40vin5: endpoint@5 { 2757 reg = <5>; 2758 remote-endpoint = <&vin5csi40>; 2759 }; 2760 csi40vin6: endpoint@6 { 2761 reg = <6>; 2762 remote-endpoint = <&vin6csi40>; 2763 }; 2764 csi40vin7: endpoint@7 { 2765 reg = <7>; 2766 remote-endpoint = <&vin7csi40>; 2767 }; 2768 }; 2769 }; 2770 }; 2771 2772 hdmi0: hdmi@fead0000 { 2773 compatible = "renesas,r8a77965-hdmi", 2774 "renesas,rcar-gen3-hdmi"; 2775 reg = <0 0xfead0000 0 0x10000>; 2776 interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>; 2777 clocks = <&cpg CPG_MOD 729>, 2778 <&cpg CPG_CORE R8A77965_CLK_HDMI>; 2779 clock-names = "iahb", "isfr"; 2780 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2781 resets = <&cpg 729>; 2782 status = "disabled"; 2783 2784 ports { 2785 #address-cells = <1>; 2786 #size-cells = <0>; 2787 port@0 { 2788 reg = <0>; 2789 dw_hdmi0_in: endpoint { 2790 remote-endpoint = <&du_out_hdmi0>; 2791 }; 2792 }; 2793 port@1 { 2794 reg = <1>; 2795 }; 2796 }; 2797 }; 2798 2799 du: display@feb00000 { 2800 compatible = "renesas,du-r8a77965"; 2801 reg = <0 0xfeb00000 0 0x80000>; 2802 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, 2803 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>, 2804 <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>; 2805 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>, 2806 <&cpg CPG_MOD 721>; 2807 clock-names = "du.0", "du.1", "du.3"; 2808 resets = <&cpg 724>, <&cpg 722>; 2809 reset-names = "du.0", "du.3"; 2810 2811 renesas,cmms = <&cmm0>, <&cmm1>, <&cmm3>; 2812 renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd0 1>; 2813 2814 status = "disabled"; 2815 2816 ports { 2817 #address-cells = <1>; 2818 #size-cells = <0>; 2819 2820 port@0 { 2821 reg = <0>; 2822 }; 2823 port@1 { 2824 reg = <1>; 2825 du_out_hdmi0: endpoint { 2826 remote-endpoint = <&dw_hdmi0_in>; 2827 }; 2828 }; 2829 port@2 { 2830 reg = <2>; 2831 du_out_lvds0: endpoint { 2832 remote-endpoint = <&lvds0_in>; 2833 }; 2834 }; 2835 }; 2836 }; 2837 2838 lvds0: lvds@feb90000 { 2839 compatible = "renesas,r8a77965-lvds"; 2840 reg = <0 0xfeb90000 0 0x14>; 2841 clocks = <&cpg CPG_MOD 727>; 2842 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2843 resets = <&cpg 727>; 2844 status = "disabled"; 2845 2846 ports { 2847 #address-cells = <1>; 2848 #size-cells = <0>; 2849 2850 port@0 { 2851 reg = <0>; 2852 lvds0_in: endpoint { 2853 remote-endpoint = <&du_out_lvds0>; 2854 }; 2855 }; 2856 port@1 { 2857 reg = <1>; 2858 }; 2859 }; 2860 }; 2861 2862 prr: chipid@fff00044 { 2863 compatible = "renesas,prr"; 2864 reg = <0 0xfff00044 0 4>; 2865 bootph-all; 2866 }; 2867 }; 2868 2869 thermal-zones { 2870 sensor1_thermal: sensor1-thermal { 2871 polling-delay-passive = <250>; 2872 polling-delay = <1000>; 2873 thermal-sensors = <&tsc 0>; 2874 sustainable-power = <2439>; 2875 2876 trips { 2877 sensor1_crit: sensor1-crit { 2878 temperature = <120000>; 2879 hysteresis = <1000>; 2880 type = "critical"; 2881 }; 2882 }; 2883 }; 2884 2885 sensor2_thermal: sensor2-thermal { 2886 polling-delay-passive = <250>; 2887 polling-delay = <1000>; 2888 thermal-sensors = <&tsc 1>; 2889 sustainable-power = <2439>; 2890 2891 trips { 2892 sensor2_crit: sensor2-crit { 2893 temperature = <120000>; 2894 hysteresis = <1000>; 2895 type = "critical"; 2896 }; 2897 }; 2898 }; 2899 2900 sensor3_thermal: sensor3-thermal { 2901 polling-delay-passive = <250>; 2902 polling-delay = <1000>; 2903 thermal-sensors = <&tsc 2>; 2904 sustainable-power = <2439>; 2905 2906 trips { 2907 target: trip-point1 { 2908 /* miliCelsius */ 2909 temperature = <100000>; 2910 hysteresis = <1000>; 2911 type = "passive"; 2912 }; 2913 2914 sensor3_crit: sensor3-crit { 2915 temperature = <120000>; 2916 hysteresis = <1000>; 2917 type = "critical"; 2918 }; 2919 }; 2920 2921 cooling-maps { 2922 map0 { 2923 trip = <&target>; 2924 cooling-device = <&a57_0 2 4>; 2925 contribution = <1024>; 2926 }; 2927 }; 2928 }; 2929 }; 2930 2931 timer { 2932 compatible = "arm,armv8-timer"; 2933 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 2934 <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 2935 <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 2936 <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; 2937 interrupt-names = "sec-phys", "phys", "virt", "hyp-phys"; 2938 }; 2939 2940 /* External USB clocks - can be overridden by the board */ 2941 usb3s0_clk: usb3s0 { 2942 compatible = "fixed-clock"; 2943 #clock-cells = <0>; 2944 clock-frequency = <0>; 2945 }; 2946 2947 usb_extal_clk: usb_extal { 2948 compatible = "fixed-clock"; 2949 #clock-cells = <0>; 2950 clock-frequency = <0>; 2951 }; 2952};
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