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r8a77960.dtsi
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linux-6.19.14/arch/arm64/boot/dts/renesas/r8a77960.dtsi
1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for the R-Car M3-W (R8A77960) SoC 4 * 5 * Copyright (C) 2016-2017 Renesas Electronics Corp. 6 */ 7 8#include <dt-bindings/clock/r8a7796-cpg-mssr.h> 9#include <dt-bindings/interrupt-controller/arm-gic.h> 10#include <dt-bindings/power/r8a7796-sysc.h> 11 12/ { 13 compatible = "renesas,r8a7796"; 14 #address-cells = <2>; 15 #size-cells = <2>; 16 interrupt-parent = <&gic>; 17 18 /* 19 * The external audio clocks are configured as 0 Hz fixed frequency 20 * clocks by default. 21 * Boards that provide audio clocks should override them. 22 */ 23 audio_clk_a: audio_clk_a { 24 compatible = "fixed-clock"; 25 #clock-cells = <0>; 26 clock-frequency = <0>; 27 }; 28 29 audio_clk_b: audio_clk_b { 30 compatible = "fixed-clock"; 31 #clock-cells = <0>; 32 clock-frequency = <0>; 33 }; 34 35 audio_clk_c: audio_clk_c { 36 compatible = "fixed-clock"; 37 #clock-cells = <0>; 38 clock-frequency = <0>; 39 }; 40 41 /* External CAN clock - to be overridden by boards that provide it */ 42 can_clk: can { 43 compatible = "fixed-clock"; 44 #clock-cells = <0>; 45 clock-frequency = <0>; 46 }; 47 48 cluster0_opp: opp-table-0 { 49 compatible = "operating-points-v2"; 50 opp-shared; 51 52 opp-500000000 { 53 opp-hz = /bits/ 64 <500000000>; 54 opp-microvolt = <830000>; 55 clock-latency-ns = <300000>; 56 }; 57 opp-1000000000 { 58 opp-hz = /bits/ 64 <1000000000>; 59 opp-microvolt = <830000>; 60 clock-latency-ns = <300000>; 61 }; 62 opp-1500000000 { 63 opp-hz = /bits/ 64 <1500000000>; 64 opp-microvolt = <830000>; 65 clock-latency-ns = <300000>; 66 opp-suspend; 67 }; 68 opp-1600000000 { 69 opp-hz = /bits/ 64 <1600000000>; 70 opp-microvolt = <900000>; 71 clock-latency-ns = <300000>; 72 }; 73 opp-1700000000 { 74 opp-hz = /bits/ 64 <1700000000>; 75 opp-microvolt = <900000>; 76 clock-latency-ns = <300000>; 77 }; 78 opp-1800000000 { 79 opp-hz = /bits/ 64 <1800000000>; 80 opp-microvolt = <960000>; 81 clock-latency-ns = <300000>; 82 turbo-mode; 83 }; 84 }; 85 86 cluster1_opp: opp-table-1 { 87 compatible = "operating-points-v2"; 88 opp-shared; 89 90 opp-800000000 { 91 opp-hz = /bits/ 64 <800000000>; 92 opp-microvolt = <820000>; 93 clock-latency-ns = <300000>; 94 }; 95 opp-1000000000 { 96 opp-hz = /bits/ 64 <1000000000>; 97 opp-microvolt = <820000>; 98 clock-latency-ns = <300000>; 99 }; 100 opp-1200000000 { 101 opp-hz = /bits/ 64 <1200000000>; 102 opp-microvolt = <820000>; 103 clock-latency-ns = <300000>; 104 }; 105 opp-1300000000 { 106 opp-hz = /bits/ 64 <1300000000>; 107 opp-microvolt = <820000>; 108 clock-latency-ns = <300000>; 109 turbo-mode; 110 }; 111 }; 112 113 cpus { 114 #address-cells = <1>; 115 #size-cells = <0>; 116 117 cpu-map { 118 cluster0 { 119 core0 { 120 cpu = <&a57_0>; 121 }; 122 core1 { 123 cpu = <&a57_1>; 124 }; 125 }; 126 127 cluster1 { 128 core0 { 129 cpu = <&a53_0>; 130 }; 131 core1 { 132 cpu = <&a53_1>; 133 }; 134 core2 { 135 cpu = <&a53_2>; 136 }; 137 core3 { 138 cpu = <&a53_3>; 139 }; 140 }; 141 }; 142 143 a57_0: cpu@0 { 144 compatible = "arm,cortex-a57"; 145 reg = <0x0>; 146 device_type = "cpu"; 147 power-domains = <&sysc R8A7796_PD_CA57_CPU0>; 148 next-level-cache = <&L2_CA57>; 149 enable-method = "psci"; 150 cpu-idle-states = <&CPU_SLEEP_0>; 151 dynamic-power-coefficient = <854>; 152 clocks = <&cpg CPG_CORE R8A7796_CLK_Z>; 153 operating-points-v2 = <&cluster0_opp>; 154 capacity-dmips-mhz = <1024>; 155 #cooling-cells = <2>; 156 }; 157 158 a57_1: cpu@1 { 159 compatible = "arm,cortex-a57"; 160 reg = <0x1>; 161 device_type = "cpu"; 162 power-domains = <&sysc R8A7796_PD_CA57_CPU1>; 163 next-level-cache = <&L2_CA57>; 164 enable-method = "psci"; 165 cpu-idle-states = <&CPU_SLEEP_0>; 166 clocks = <&cpg CPG_CORE R8A7796_CLK_Z>; 167 operating-points-v2 = <&cluster0_opp>; 168 capacity-dmips-mhz = <1024>; 169 #cooling-cells = <2>; 170 }; 171 172 a53_0: cpu@100 { 173 compatible = "arm,cortex-a53"; 174 reg = <0x100>; 175 device_type = "cpu"; 176 power-domains = <&sysc R8A7796_PD_CA53_CPU0>; 177 next-level-cache = <&L2_CA53>; 178 enable-method = "psci"; 179 cpu-idle-states = <&CPU_SLEEP_1>; 180 #cooling-cells = <2>; 181 dynamic-power-coefficient = <277>; 182 clocks = <&cpg CPG_CORE R8A7796_CLK_Z2>; 183 operating-points-v2 = <&cluster1_opp>; 184 capacity-dmips-mhz = <535>; 185 }; 186 187 a53_1: cpu@101 { 188 compatible = "arm,cortex-a53"; 189 reg = <0x101>; 190 device_type = "cpu"; 191 power-domains = <&sysc R8A7796_PD_CA53_CPU1>; 192 next-level-cache = <&L2_CA53>; 193 enable-method = "psci"; 194 cpu-idle-states = <&CPU_SLEEP_1>; 195 clocks = <&cpg CPG_CORE R8A7796_CLK_Z2>; 196 operating-points-v2 = <&cluster1_opp>; 197 capacity-dmips-mhz = <535>; 198 }; 199 200 a53_2: cpu@102 { 201 compatible = "arm,cortex-a53"; 202 reg = <0x102>; 203 device_type = "cpu"; 204 power-domains = <&sysc R8A7796_PD_CA53_CPU2>; 205 next-level-cache = <&L2_CA53>; 206 enable-method = "psci"; 207 cpu-idle-states = <&CPU_SLEEP_1>; 208 clocks = <&cpg CPG_CORE R8A7796_CLK_Z2>; 209 operating-points-v2 = <&cluster1_opp>; 210 capacity-dmips-mhz = <535>; 211 }; 212 213 a53_3: cpu@103 { 214 compatible = "arm,cortex-a53"; 215 reg = <0x103>; 216 device_type = "cpu"; 217 power-domains = <&sysc R8A7796_PD_CA53_CPU3>; 218 next-level-cache = <&L2_CA53>; 219 enable-method = "psci"; 220 cpu-idle-states = <&CPU_SLEEP_1>; 221 clocks = <&cpg CPG_CORE R8A7796_CLK_Z2>; 222 operating-points-v2 = <&cluster1_opp>; 223 capacity-dmips-mhz = <535>; 224 }; 225 226 L2_CA57: cache-controller-0 { 227 compatible = "cache"; 228 power-domains = <&sysc R8A7796_PD_CA57_SCU>; 229 cache-unified; 230 cache-level = <2>; 231 }; 232 233 L2_CA53: cache-controller-1 { 234 compatible = "cache"; 235 power-domains = <&sysc R8A7796_PD_CA53_SCU>; 236 cache-unified; 237 cache-level = <2>; 238 }; 239 240 idle-states { 241 entry-method = "psci"; 242 243 CPU_SLEEP_0: cpu-sleep-0 { 244 compatible = "arm,idle-state"; 245 arm,psci-suspend-param = <0x0010000>; 246 local-timer-stop; 247 entry-latency-us = <400>; 248 exit-latency-us = <500>; 249 min-residency-us = <4000>; 250 }; 251 252 CPU_SLEEP_1: cpu-sleep-1 { 253 compatible = "arm,idle-state"; 254 arm,psci-suspend-param = <0x0010000>; 255 local-timer-stop; 256 entry-latency-us = <700>; 257 exit-latency-us = <700>; 258 min-residency-us = <5000>; 259 }; 260 }; 261 }; 262 263 extal_clk: extal { 264 compatible = "fixed-clock"; 265 #clock-cells = <0>; 266 /* This value must be overridden by the board */ 267 clock-frequency = <0>; 268 bootph-all; 269 }; 270 271 extalr_clk: extalr { 272 compatible = "fixed-clock"; 273 #clock-cells = <0>; 274 /* This value must be overridden by the board */ 275 clock-frequency = <0>; 276 bootph-all; 277 }; 278 279 /* External PCIe clock - can be overridden by the board */ 280 pcie_bus_clk: pcie_bus { 281 compatible = "fixed-clock"; 282 #clock-cells = <0>; 283 clock-frequency = <0>; 284 }; 285 286 pmu_a53 { 287 compatible = "arm,cortex-a53-pmu"; 288 interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>, 289 <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>, 290 <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>, 291 <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>; 292 interrupt-affinity = <&a53_0>, <&a53_1>, <&a53_2>, <&a53_3>; 293 }; 294 295 pmu_a57 { 296 compatible = "arm,cortex-a57-pmu"; 297 interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>, 298 <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; 299 interrupt-affinity = <&a57_0>, <&a57_1>; 300 }; 301 302 psci { 303 compatible = "arm,psci-1.0", "arm,psci-0.2"; 304 method = "smc"; 305 }; 306 307 /* External SCIF clock - to be overridden by boards that provide it */ 308 scif_clk: scif { 309 compatible = "fixed-clock"; 310 #clock-cells = <0>; 311 clock-frequency = <0>; 312 }; 313 314 soc { 315 compatible = "simple-bus"; 316 bootph-all; 317 318 #address-cells = <2>; 319 #size-cells = <2>; 320 ranges; 321 322 rwdt: watchdog@e6020000 { 323 compatible = "renesas,r8a7796-wdt", 324 "renesas,rcar-gen3-wdt"; 325 reg = <0 0xe6020000 0 0x0c>; 326 interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>; 327 clocks = <&cpg CPG_MOD 402>; 328 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 329 resets = <&cpg 402>; 330 status = "disabled"; 331 }; 332 333 swdt: watchdog@e6030000 { 334 compatible = "renesas,r8a7796-wdt", "renesas,rcar-gen3-wdt"; 335 reg = <0 0xe6030000 0 0x0c>; 336 interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>; 337 clocks = <&cpg CPG_CORE R8A7796_CLK_OSC>; 338 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 339 resets = <&cpg 401>; 340 status = "disabled"; 341 }; 342 343 gpio0: gpio@e6050000 { 344 compatible = "renesas,gpio-r8a7796", 345 "renesas,rcar-gen3-gpio"; 346 reg = <0 0xe6050000 0 0x50>; 347 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 348 #gpio-cells = <2>; 349 gpio-controller; 350 gpio-ranges = <&pfc 0 0 16>; 351 #interrupt-cells = <2>; 352 interrupt-controller; 353 clocks = <&cpg CPG_MOD 912>; 354 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 355 resets = <&cpg 912>; 356 }; 357 358 gpio1: gpio@e6051000 { 359 compatible = "renesas,gpio-r8a7796", 360 "renesas,rcar-gen3-gpio"; 361 reg = <0 0xe6051000 0 0x50>; 362 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 363 #gpio-cells = <2>; 364 gpio-controller; 365 gpio-ranges = <&pfc 0 32 29>; 366 #interrupt-cells = <2>; 367 interrupt-controller; 368 clocks = <&cpg CPG_MOD 911>; 369 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 370 resets = <&cpg 911>; 371 }; 372 373 gpio2: gpio@e6052000 { 374 compatible = "renesas,gpio-r8a7796", 375 "renesas,rcar-gen3-gpio"; 376 reg = <0 0xe6052000 0 0x50>; 377 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 378 #gpio-cells = <2>; 379 gpio-controller; 380 gpio-ranges = <&pfc 0 64 15>; 381 #interrupt-cells = <2>; 382 interrupt-controller; 383 clocks = <&cpg CPG_MOD 910>; 384 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 385 resets = <&cpg 910>; 386 }; 387 388 gpio3: gpio@e6053000 { 389 compatible = "renesas,gpio-r8a7796", 390 "renesas,rcar-gen3-gpio"; 391 reg = <0 0xe6053000 0 0x50>; 392 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 393 #gpio-cells = <2>; 394 gpio-controller; 395 gpio-ranges = <&pfc 0 96 16>; 396 #interrupt-cells = <2>; 397 interrupt-controller; 398 clocks = <&cpg CPG_MOD 909>; 399 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 400 resets = <&cpg 909>; 401 }; 402 403 gpio4: gpio@e6054000 { 404 compatible = "renesas,gpio-r8a7796", 405 "renesas,rcar-gen3-gpio"; 406 reg = <0 0xe6054000 0 0x50>; 407 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 408 #gpio-cells = <2>; 409 gpio-controller; 410 gpio-ranges = <&pfc 0 128 18>; 411 #interrupt-cells = <2>; 412 interrupt-controller; 413 clocks = <&cpg CPG_MOD 908>; 414 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 415 resets = <&cpg 908>; 416 }; 417 418 gpio5: gpio@e6055000 { 419 compatible = "renesas,gpio-r8a7796", 420 "renesas,rcar-gen3-gpio"; 421 reg = <0 0xe6055000 0 0x50>; 422 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 423 #gpio-cells = <2>; 424 gpio-controller; 425 gpio-ranges = <&pfc 0 160 26>; 426 #interrupt-cells = <2>; 427 interrupt-controller; 428 clocks = <&cpg CPG_MOD 907>; 429 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 430 resets = <&cpg 907>; 431 }; 432 433 gpio6: gpio@e6055400 { 434 compatible = "renesas,gpio-r8a7796", 435 "renesas,rcar-gen3-gpio"; 436 reg = <0 0xe6055400 0 0x50>; 437 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 438 #gpio-cells = <2>; 439 gpio-controller; 440 gpio-ranges = <&pfc 0 192 32>; 441 #interrupt-cells = <2>; 442 interrupt-controller; 443 clocks = <&cpg CPG_MOD 906>; 444 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 445 resets = <&cpg 906>; 446 }; 447 448 gpio7: gpio@e6055800 { 449 compatible = "renesas,gpio-r8a7796", 450 "renesas,rcar-gen3-gpio"; 451 reg = <0 0xe6055800 0 0x50>; 452 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 453 #gpio-cells = <2>; 454 gpio-controller; 455 gpio-ranges = <&pfc 0 224 4>; 456 #interrupt-cells = <2>; 457 interrupt-controller; 458 clocks = <&cpg CPG_MOD 905>; 459 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 460 resets = <&cpg 905>; 461 }; 462 463 pfc: pinctrl@e6060000 { 464 compatible = "renesas,pfc-r8a7796"; 465 reg = <0 0xe6060000 0 0x50c>; 466 bootph-all; 467 }; 468 469 cmt0: timer@e60f0000 { 470 compatible = "renesas,r8a7796-cmt0", 471 "renesas,rcar-gen3-cmt0"; 472 reg = <0 0xe60f0000 0 0x1004>; 473 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, 474 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; 475 clocks = <&cpg CPG_MOD 303>; 476 clock-names = "fck"; 477 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 478 resets = <&cpg 303>; 479 status = "disabled"; 480 }; 481 482 cmt1: timer@e6130000 { 483 compatible = "renesas,r8a7796-cmt1", 484 "renesas,rcar-gen3-cmt1"; 485 reg = <0 0xe6130000 0 0x1004>; 486 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, 487 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, 488 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, 489 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, 490 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, 491 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, 492 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, 493 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; 494 clocks = <&cpg CPG_MOD 302>; 495 clock-names = "fck"; 496 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 497 resets = <&cpg 302>; 498 status = "disabled"; 499 }; 500 501 cmt2: timer@e6140000 { 502 compatible = "renesas,r8a7796-cmt1", 503 "renesas,rcar-gen3-cmt1"; 504 reg = <0 0xe6140000 0 0x1004>; 505 interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>, 506 <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>, 507 <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>, 508 <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>, 509 <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>, 510 <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>, 511 <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>, 512 <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>; 513 clocks = <&cpg CPG_MOD 301>; 514 clock-names = "fck"; 515 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 516 resets = <&cpg 301>; 517 status = "disabled"; 518 }; 519 520 cmt3: timer@e6148000 { 521 compatible = "renesas,r8a7796-cmt1", 522 "renesas,rcar-gen3-cmt1"; 523 reg = <0 0xe6148000 0 0x1004>; 524 interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>, 525 <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>, 526 <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>, 527 <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>, 528 <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>, 529 <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>, 530 <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>, 531 <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>; 532 clocks = <&cpg CPG_MOD 300>; 533 clock-names = "fck"; 534 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 535 resets = <&cpg 300>; 536 status = "disabled"; 537 }; 538 539 cpg: clock-controller@e6150000 { 540 compatible = "renesas,r8a7796-cpg-mssr"; 541 reg = <0 0xe6150000 0 0x1000>; 542 clocks = <&extal_clk>, <&extalr_clk>; 543 clock-names = "extal", "extalr"; 544 #clock-cells = <2>; 545 #power-domain-cells = <0>; 546 #reset-cells = <1>; 547 bootph-all; 548 }; 549 550 rst: reset-controller@e6160000 { 551 compatible = "renesas,r8a7796-rst"; 552 reg = <0 0xe6160000 0 0x0200>; 553 bootph-all; 554 }; 555 556 sysc: system-controller@e6180000 { 557 compatible = "renesas,r8a7796-sysc"; 558 reg = <0 0xe6180000 0 0x0400>; 559 #power-domain-cells = <1>; 560 }; 561 562 tsc: thermal@e6198000 { 563 compatible = "renesas,r8a7796-thermal"; 564 reg = <0 0xe6198000 0 0x100>, 565 <0 0xe61a0000 0 0x100>, 566 <0 0xe61a8000 0 0x100>; 567 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>, 568 <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>, 569 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; 570 clocks = <&cpg CPG_MOD 522>; 571 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 572 resets = <&cpg 522>; 573 #thermal-sensor-cells = <1>; 574 }; 575 576 intc_ex: interrupt-controller@e61c0000 { 577 compatible = "renesas,intc-ex-r8a7796", "renesas,irqc"; 578 #interrupt-cells = <2>; 579 interrupt-controller; 580 reg = <0 0xe61c0000 0 0x200>; 581 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, 582 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, 583 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, 584 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, 585 <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>, 586 <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; 587 clocks = <&cpg CPG_MOD 407>; 588 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 589 resets = <&cpg 407>; 590 }; 591 592 tmu0: timer@e61e0000 { 593 compatible = "renesas,tmu-r8a7796", "renesas,tmu"; 594 reg = <0 0xe61e0000 0 0x30>; 595 interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, 596 <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>, 597 <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; 598 interrupt-names = "tuni0", "tuni1", "tuni2"; 599 clocks = <&cpg CPG_MOD 125>; 600 clock-names = "fck"; 601 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 602 resets = <&cpg 125>; 603 status = "disabled"; 604 }; 605 606 tmu1: timer@e6fc0000 { 607 compatible = "renesas,tmu-r8a7796", "renesas,tmu"; 608 reg = <0 0xe6fc0000 0 0x30>; 609 interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, 610 <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>, 611 <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, 612 <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>; 613 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2"; 614 clocks = <&cpg CPG_MOD 124>; 615 clock-names = "fck"; 616 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 617 resets = <&cpg 124>; 618 status = "disabled"; 619 }; 620 621 tmu2: timer@e6fd0000 { 622 compatible = "renesas,tmu-r8a7796", "renesas,tmu"; 623 reg = <0 0xe6fd0000 0 0x30>; 624 interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>, 625 <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>, 626 <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>, 627 <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>; 628 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2"; 629 clocks = <&cpg CPG_MOD 123>; 630 clock-names = "fck"; 631 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 632 resets = <&cpg 123>; 633 status = "disabled"; 634 }; 635 636 tmu3: timer@e6fe0000 { 637 compatible = "renesas,tmu-r8a7796", "renesas,tmu"; 638 reg = <0 0xe6fe0000 0 0x30>; 639 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, 640 <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>, 641 <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; 642 interrupt-names = "tuni0", "tuni1", "tuni2"; 643 clocks = <&cpg CPG_MOD 122>; 644 clock-names = "fck"; 645 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 646 resets = <&cpg 122>; 647 status = "disabled"; 648 }; 649 650 tmu4: timer@ffc00000 { 651 compatible = "renesas,tmu-r8a7796", "renesas,tmu"; 652 reg = <0 0xffc00000 0 0x30>; 653 interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>, 654 <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>, 655 <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>; 656 interrupt-names = "tuni0", "tuni1", "tuni2"; 657 clocks = <&cpg CPG_MOD 121>; 658 clock-names = "fck"; 659 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 660 resets = <&cpg 121>; 661 status = "disabled"; 662 }; 663 664 i2c0: i2c@e6500000 { 665 #address-cells = <1>; 666 #size-cells = <0>; 667 compatible = "renesas,i2c-r8a7796", 668 "renesas,rcar-gen3-i2c"; 669 reg = <0 0xe6500000 0 0x40>; 670 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; 671 clocks = <&cpg CPG_MOD 931>; 672 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 673 resets = <&cpg 931>; 674 dmas = <&dmac1 0x91>, <&dmac1 0x90>, 675 <&dmac2 0x91>, <&dmac2 0x90>; 676 dma-names = "tx", "rx", "tx", "rx"; 677 i2c-scl-internal-delay-ns = <110>; 678 status = "disabled"; 679 }; 680 681 i2c1: i2c@e6508000 { 682 #address-cells = <1>; 683 #size-cells = <0>; 684 compatible = "renesas,i2c-r8a7796", 685 "renesas,rcar-gen3-i2c"; 686 reg = <0 0xe6508000 0 0x40>; 687 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; 688 clocks = <&cpg CPG_MOD 930>; 689 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 690 resets = <&cpg 930>; 691 dmas = <&dmac1 0x93>, <&dmac1 0x92>, 692 <&dmac2 0x93>, <&dmac2 0x92>; 693 dma-names = "tx", "rx", "tx", "rx"; 694 i2c-scl-internal-delay-ns = <6>; 695 status = "disabled"; 696 }; 697 698 i2c2: i2c@e6510000 { 699 #address-cells = <1>; 700 #size-cells = <0>; 701 compatible = "renesas,i2c-r8a7796", 702 "renesas,rcar-gen3-i2c"; 703 reg = <0 0xe6510000 0 0x40>; 704 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; 705 clocks = <&cpg CPG_MOD 929>; 706 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 707 resets = <&cpg 929>; 708 dmas = <&dmac1 0x95>, <&dmac1 0x94>, 709 <&dmac2 0x95>, <&dmac2 0x94>; 710 dma-names = "tx", "rx", "tx", "rx"; 711 i2c-scl-internal-delay-ns = <6>; 712 status = "disabled"; 713 }; 714 715 i2c3: i2c@e66d0000 { 716 #address-cells = <1>; 717 #size-cells = <0>; 718 compatible = "renesas,i2c-r8a7796", 719 "renesas,rcar-gen3-i2c"; 720 reg = <0 0xe66d0000 0 0x40>; 721 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; 722 clocks = <&cpg CPG_MOD 928>; 723 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 724 resets = <&cpg 928>; 725 dmas = <&dmac0 0x97>, <&dmac0 0x96>; 726 dma-names = "tx", "rx"; 727 i2c-scl-internal-delay-ns = <110>; 728 status = "disabled"; 729 }; 730 731 i2c4: i2c@e66d8000 { 732 #address-cells = <1>; 733 #size-cells = <0>; 734 compatible = "renesas,i2c-r8a7796", 735 "renesas,rcar-gen3-i2c"; 736 reg = <0 0xe66d8000 0 0x40>; 737 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 738 clocks = <&cpg CPG_MOD 927>; 739 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 740 resets = <&cpg 927>; 741 dmas = <&dmac0 0x99>, <&dmac0 0x98>; 742 dma-names = "tx", "rx"; 743 i2c-scl-internal-delay-ns = <110>; 744 status = "disabled"; 745 }; 746 747 i2c5: i2c@e66e0000 { 748 #address-cells = <1>; 749 #size-cells = <0>; 750 compatible = "renesas,i2c-r8a7796", 751 "renesas,rcar-gen3-i2c"; 752 reg = <0 0xe66e0000 0 0x40>; 753 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 754 clocks = <&cpg CPG_MOD 919>; 755 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 756 resets = <&cpg 919>; 757 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>; 758 dma-names = "tx", "rx"; 759 i2c-scl-internal-delay-ns = <110>; 760 status = "disabled"; 761 }; 762 763 i2c6: i2c@e66e8000 { 764 #address-cells = <1>; 765 #size-cells = <0>; 766 compatible = "renesas,i2c-r8a7796", 767 "renesas,rcar-gen3-i2c"; 768 reg = <0 0xe66e8000 0 0x40>; 769 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; 770 clocks = <&cpg CPG_MOD 918>; 771 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 772 resets = <&cpg 918>; 773 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>; 774 dma-names = "tx", "rx"; 775 i2c-scl-internal-delay-ns = <6>; 776 status = "disabled"; 777 }; 778 779 i2c_dvfs: i2c@e60b0000 { 780 #address-cells = <1>; 781 #size-cells = <0>; 782 compatible = "renesas,iic-r8a7796", 783 "renesas,rcar-gen3-iic", 784 "renesas,rmobile-iic"; 785 reg = <0 0xe60b0000 0 0x425>; 786 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; 787 clocks = <&cpg CPG_MOD 926>; 788 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 789 resets = <&cpg 926>; 790 dmas = <&dmac0 0x11>, <&dmac0 0x10>; 791 dma-names = "tx", "rx"; 792 status = "disabled"; 793 }; 794 795 hscif0: serial@e6540000 { 796 compatible = "renesas,hscif-r8a7796", 797 "renesas,rcar-gen3-hscif", 798 "renesas,hscif"; 799 reg = <0 0xe6540000 0 0x60>; 800 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; 801 clocks = <&cpg CPG_MOD 520>, 802 <&cpg CPG_CORE R8A7796_CLK_S3D1>, 803 <&scif_clk>; 804 clock-names = "fck", "brg_int", "scif_clk"; 805 dmas = <&dmac1 0x31>, <&dmac1 0x30>, 806 <&dmac2 0x31>, <&dmac2 0x30>; 807 dma-names = "tx", "rx", "tx", "rx"; 808 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 809 resets = <&cpg 520>; 810 status = "disabled"; 811 }; 812 813 hscif1: serial@e6550000 { 814 compatible = "renesas,hscif-r8a7796", 815 "renesas,rcar-gen3-hscif", 816 "renesas,hscif"; 817 reg = <0 0xe6550000 0 0x60>; 818 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; 819 clocks = <&cpg CPG_MOD 519>, 820 <&cpg CPG_CORE R8A7796_CLK_S3D1>, 821 <&scif_clk>; 822 clock-names = "fck", "brg_int", "scif_clk"; 823 dmas = <&dmac1 0x33>, <&dmac1 0x32>, 824 <&dmac2 0x33>, <&dmac2 0x32>; 825 dma-names = "tx", "rx", "tx", "rx"; 826 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 827 resets = <&cpg 519>; 828 status = "disabled"; 829 }; 830 831 hscif2: serial@e6560000 { 832 compatible = "renesas,hscif-r8a7796", 833 "renesas,rcar-gen3-hscif", 834 "renesas,hscif"; 835 reg = <0 0xe6560000 0 0x60>; 836 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; 837 clocks = <&cpg CPG_MOD 518>, 838 <&cpg CPG_CORE R8A7796_CLK_S3D1>, 839 <&scif_clk>; 840 clock-names = "fck", "brg_int", "scif_clk"; 841 dmas = <&dmac1 0x35>, <&dmac1 0x34>, 842 <&dmac2 0x35>, <&dmac2 0x34>; 843 dma-names = "tx", "rx", "tx", "rx"; 844 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 845 resets = <&cpg 518>; 846 status = "disabled"; 847 }; 848 849 hscif3: serial@e66a0000 { 850 compatible = "renesas,hscif-r8a7796", 851 "renesas,rcar-gen3-hscif", 852 "renesas,hscif"; 853 reg = <0 0xe66a0000 0 0x60>; 854 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; 855 clocks = <&cpg CPG_MOD 517>, 856 <&cpg CPG_CORE R8A7796_CLK_S3D1>, 857 <&scif_clk>; 858 clock-names = "fck", "brg_int", "scif_clk"; 859 dmas = <&dmac0 0x37>, <&dmac0 0x36>; 860 dma-names = "tx", "rx"; 861 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 862 resets = <&cpg 517>; 863 status = "disabled"; 864 }; 865 866 hscif4: serial@e66b0000 { 867 compatible = "renesas,hscif-r8a7796", 868 "renesas,rcar-gen3-hscif", 869 "renesas,hscif"; 870 reg = <0 0xe66b0000 0 0x60>; 871 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; 872 clocks = <&cpg CPG_MOD 516>, 873 <&cpg CPG_CORE R8A7796_CLK_S3D1>, 874 <&scif_clk>; 875 clock-names = "fck", "brg_int", "scif_clk"; 876 dmas = <&dmac0 0x39>, <&dmac0 0x38>; 877 dma-names = "tx", "rx"; 878 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 879 resets = <&cpg 516>; 880 status = "disabled"; 881 }; 882 883 hsusb: usb@e6590000 { 884 compatible = "renesas,usbhs-r8a7796", 885 "renesas,rcar-gen3-usbhs"; 886 reg = <0 0xe6590000 0 0x200>; 887 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; 888 clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>; 889 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, 890 <&usb_dmac1 0>, <&usb_dmac1 1>; 891 dma-names = "ch0", "ch1", "ch2", "ch3"; 892 renesas,buswait = <11>; 893 phys = <&usb2_phy0 3>; 894 phy-names = "usb"; 895 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 896 resets = <&cpg 704>, <&cpg 703>; 897 status = "disabled"; 898 }; 899 900 usb_dmac0: dma-controller@e65a0000 { 901 compatible = "renesas,r8a7796-usb-dmac", 902 "renesas,usb-dmac"; 903 reg = <0 0xe65a0000 0 0x100>; 904 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, 905 <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; 906 interrupt-names = "ch0", "ch1"; 907 clocks = <&cpg CPG_MOD 330>; 908 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 909 resets = <&cpg 330>; 910 #dma-cells = <1>; 911 dma-channels = <2>; 912 }; 913 914 usb_dmac1: dma-controller@e65b0000 { 915 compatible = "renesas,r8a7796-usb-dmac", 916 "renesas,usb-dmac"; 917 reg = <0 0xe65b0000 0 0x100>; 918 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, 919 <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; 920 interrupt-names = "ch0", "ch1"; 921 clocks = <&cpg CPG_MOD 331>; 922 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 923 resets = <&cpg 331>; 924 #dma-cells = <1>; 925 dma-channels = <2>; 926 }; 927 928 usb3_phy0: usb-phy@e65ee000 { 929 compatible = "renesas,r8a7796-usb3-phy", 930 "renesas,rcar-gen3-usb3-phy"; 931 reg = <0 0xe65ee000 0 0x90>; 932 clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>, 933 <&usb_extal_clk>; 934 clock-names = "usb3-if", "usb3s_clk", "usb_extal"; 935 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 936 resets = <&cpg 328>; 937 #phy-cells = <0>; 938 status = "disabled"; 939 }; 940 941 arm_cc630p: crypto@e6601000 { 942 compatible = "arm,cryptocell-630p-ree"; 943 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; 944 reg = <0x0 0xe6601000 0 0x1000>; 945 clocks = <&cpg CPG_MOD 229>; 946 resets = <&cpg 229>; 947 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 948 }; 949 950 dmac0: dma-controller@e6700000 { 951 compatible = "renesas,dmac-r8a7796", 952 "renesas,rcar-dmac"; 953 reg = <0 0xe6700000 0 0x10000>; 954 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>, 955 <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>, 956 <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>, 957 <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>, 958 <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>, 959 <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>, 960 <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>, 961 <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>, 962 <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>, 963 <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>, 964 <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>, 965 <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>, 966 <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>, 967 <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>, 968 <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>, 969 <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>, 970 <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>; 971 interrupt-names = "error", 972 "ch0", "ch1", "ch2", "ch3", 973 "ch4", "ch5", "ch6", "ch7", 974 "ch8", "ch9", "ch10", "ch11", 975 "ch12", "ch13", "ch14", "ch15"; 976 clocks = <&cpg CPG_MOD 219>; 977 clock-names = "fck"; 978 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 979 resets = <&cpg 219>; 980 #dma-cells = <1>; 981 dma-channels = <16>; 982 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>, 983 <&ipmmu_ds0 2>, <&ipmmu_ds0 3>, 984 <&ipmmu_ds0 4>, <&ipmmu_ds0 5>, 985 <&ipmmu_ds0 6>, <&ipmmu_ds0 7>, 986 <&ipmmu_ds0 8>, <&ipmmu_ds0 9>, 987 <&ipmmu_ds0 10>, <&ipmmu_ds0 11>, 988 <&ipmmu_ds0 12>, <&ipmmu_ds0 13>, 989 <&ipmmu_ds0 14>, <&ipmmu_ds0 15>; 990 }; 991 992 dmac1: dma-controller@e7300000 { 993 compatible = "renesas,dmac-r8a7796", 994 "renesas,rcar-dmac"; 995 reg = <0 0xe7300000 0 0x10000>; 996 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>, 997 <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>, 998 <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>, 999 <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>, 1000 <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>, 1001 <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>, 1002 <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>, 1003 <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>, 1004 <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>, 1005 <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>, 1006 <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>, 1007 <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>, 1008 <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, 1009 <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, 1010 <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, 1011 <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>, 1012 <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>; 1013 interrupt-names = "error", 1014 "ch0", "ch1", "ch2", "ch3", 1015 "ch4", "ch5", "ch6", "ch7", 1016 "ch8", "ch9", "ch10", "ch11", 1017 "ch12", "ch13", "ch14", "ch15"; 1018 clocks = <&cpg CPG_MOD 218>; 1019 clock-names = "fck"; 1020 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1021 resets = <&cpg 218>; 1022 #dma-cells = <1>; 1023 dma-channels = <16>; 1024 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>, 1025 <&ipmmu_ds1 2>, <&ipmmu_ds1 3>, 1026 <&ipmmu_ds1 4>, <&ipmmu_ds1 5>, 1027 <&ipmmu_ds1 6>, <&ipmmu_ds1 7>, 1028 <&ipmmu_ds1 8>, <&ipmmu_ds1 9>, 1029 <&ipmmu_ds1 10>, <&ipmmu_ds1 11>, 1030 <&ipmmu_ds1 12>, <&ipmmu_ds1 13>, 1031 <&ipmmu_ds1 14>, <&ipmmu_ds1 15>; 1032 }; 1033 1034 dmac2: dma-controller@e7310000 { 1035 compatible = "renesas,dmac-r8a7796", 1036 "renesas,rcar-dmac"; 1037 reg = <0 0xe7310000 0 0x10000>; 1038 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>, 1039 <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>, 1040 <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>, 1041 <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>, 1042 <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>, 1043 <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>, 1044 <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>, 1045 <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>, 1046 <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>, 1047 <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>, 1048 <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>, 1049 <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>, 1050 <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>, 1051 <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>, 1052 <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>, 1053 <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>, 1054 <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>; 1055 interrupt-names = "error", 1056 "ch0", "ch1", "ch2", "ch3", 1057 "ch4", "ch5", "ch6", "ch7", 1058 "ch8", "ch9", "ch10", "ch11", 1059 "ch12", "ch13", "ch14", "ch15"; 1060 clocks = <&cpg CPG_MOD 217>; 1061 clock-names = "fck"; 1062 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1063 resets = <&cpg 217>; 1064 #dma-cells = <1>; 1065 dma-channels = <16>; 1066 iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>, 1067 <&ipmmu_ds1 18>, <&ipmmu_ds1 19>, 1068 <&ipmmu_ds1 20>, <&ipmmu_ds1 21>, 1069 <&ipmmu_ds1 22>, <&ipmmu_ds1 23>, 1070 <&ipmmu_ds1 24>, <&ipmmu_ds1 25>, 1071 <&ipmmu_ds1 26>, <&ipmmu_ds1 27>, 1072 <&ipmmu_ds1 28>, <&ipmmu_ds1 29>, 1073 <&ipmmu_ds1 30>, <&ipmmu_ds1 31>; 1074 }; 1075 1076 ipmmu_ds0: iommu@e6740000 { 1077 compatible = "renesas,ipmmu-r8a7796"; 1078 reg = <0 0xe6740000 0 0x1000>; 1079 renesas,ipmmu-main = <&ipmmu_mm 0>; 1080 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1081 #iommu-cells = <1>; 1082 }; 1083 1084 ipmmu_ds1: iommu@e7740000 { 1085 compatible = "renesas,ipmmu-r8a7796"; 1086 reg = <0 0xe7740000 0 0x1000>; 1087 renesas,ipmmu-main = <&ipmmu_mm 1>; 1088 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1089 #iommu-cells = <1>; 1090 }; 1091 1092 ipmmu_hc: iommu@e6570000 { 1093 compatible = "renesas,ipmmu-r8a7796"; 1094 reg = <0 0xe6570000 0 0x1000>; 1095 renesas,ipmmu-main = <&ipmmu_mm 2>; 1096 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1097 #iommu-cells = <1>; 1098 }; 1099 1100 ipmmu_ir: iommu@ff8b0000 { 1101 compatible = "renesas,ipmmu-r8a7796"; 1102 reg = <0 0xff8b0000 0 0x1000>; 1103 renesas,ipmmu-main = <&ipmmu_mm 3>; 1104 power-domains = <&sysc R8A7796_PD_A3IR>; 1105 #iommu-cells = <1>; 1106 }; 1107 1108 ipmmu_mm: iommu@e67b0000 { 1109 compatible = "renesas,ipmmu-r8a7796"; 1110 reg = <0 0xe67b0000 0 0x1000>; 1111 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>, 1112 <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>; 1113 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1114 #iommu-cells = <1>; 1115 }; 1116 1117 ipmmu_mp: iommu@ec670000 { 1118 compatible = "renesas,ipmmu-r8a7796"; 1119 reg = <0 0xec670000 0 0x1000>; 1120 renesas,ipmmu-main = <&ipmmu_mm 4>; 1121 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1122 #iommu-cells = <1>; 1123 }; 1124 1125 ipmmu_pv0: iommu@fd800000 { 1126 compatible = "renesas,ipmmu-r8a7796"; 1127 reg = <0 0xfd800000 0 0x1000>; 1128 renesas,ipmmu-main = <&ipmmu_mm 5>; 1129 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1130 #iommu-cells = <1>; 1131 }; 1132 1133 ipmmu_pv1: iommu@fd950000 { 1134 compatible = "renesas,ipmmu-r8a7796"; 1135 reg = <0 0xfd950000 0 0x1000>; 1136 renesas,ipmmu-main = <&ipmmu_mm 6>; 1137 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1138 #iommu-cells = <1>; 1139 }; 1140 1141 ipmmu_rt: iommu@ffc80000 { 1142 compatible = "renesas,ipmmu-r8a7796"; 1143 reg = <0 0xffc80000 0 0x1000>; 1144 renesas,ipmmu-main = <&ipmmu_mm 7>; 1145 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1146 #iommu-cells = <1>; 1147 }; 1148 1149 ipmmu_vc0: iommu@fe6b0000 { 1150 compatible = "renesas,ipmmu-r8a7796"; 1151 reg = <0 0xfe6b0000 0 0x1000>; 1152 renesas,ipmmu-main = <&ipmmu_mm 8>; 1153 power-domains = <&sysc R8A7796_PD_A3VC>; 1154 #iommu-cells = <1>; 1155 }; 1156 1157 ipmmu_vi0: iommu@febd0000 { 1158 compatible = "renesas,ipmmu-r8a7796"; 1159 reg = <0 0xfebd0000 0 0x1000>; 1160 renesas,ipmmu-main = <&ipmmu_mm 9>; 1161 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1162 #iommu-cells = <1>; 1163 }; 1164 1165 avb: ethernet@e6800000 { 1166 compatible = "renesas,etheravb-r8a7796", 1167 "renesas,etheravb-rcar-gen3"; 1168 reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>; 1169 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, 1170 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, 1171 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, 1172 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, 1173 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, 1174 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, 1175 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, 1176 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, 1177 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, 1178 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, 1179 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, 1180 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>, 1181 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, 1182 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, 1183 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, 1184 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, 1185 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, 1186 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, 1187 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, 1188 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, 1189 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, 1190 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>, 1191 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>, 1192 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>, 1193 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; 1194 interrupt-names = "ch0", "ch1", "ch2", "ch3", 1195 "ch4", "ch5", "ch6", "ch7", 1196 "ch8", "ch9", "ch10", "ch11", 1197 "ch12", "ch13", "ch14", "ch15", 1198 "ch16", "ch17", "ch18", "ch19", 1199 "ch20", "ch21", "ch22", "ch23", 1200 "ch24"; 1201 clocks = <&cpg CPG_MOD 812>; 1202 clock-names = "fck"; 1203 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1204 resets = <&cpg 812>; 1205 phy-mode = "rgmii"; 1206 rx-internal-delay-ps = <0>; 1207 tx-internal-delay-ps = <0>; 1208 iommus = <&ipmmu_ds0 16>; 1209 #address-cells = <1>; 1210 #size-cells = <0>; 1211 status = "disabled"; 1212 }; 1213 1214 can0: can@e6c30000 { 1215 compatible = "renesas,can-r8a7796", 1216 "renesas,rcar-gen3-can"; 1217 reg = <0 0xe6c30000 0 0x1000>; 1218 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; 1219 clocks = <&cpg CPG_MOD 916>, 1220 <&cpg CPG_CORE R8A7796_CLK_CANFD>, 1221 <&can_clk>; 1222 clock-names = "clkp1", "clkp2", "can_clk"; 1223 assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>; 1224 assigned-clock-rates = <40000000>; 1225 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1226 resets = <&cpg 916>; 1227 status = "disabled"; 1228 }; 1229 1230 can1: can@e6c38000 { 1231 compatible = "renesas,can-r8a7796", 1232 "renesas,rcar-gen3-can"; 1233 reg = <0 0xe6c38000 0 0x1000>; 1234 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; 1235 clocks = <&cpg CPG_MOD 915>, 1236 <&cpg CPG_CORE R8A7796_CLK_CANFD>, 1237 <&can_clk>; 1238 clock-names = "clkp1", "clkp2", "can_clk"; 1239 assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>; 1240 assigned-clock-rates = <40000000>; 1241 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1242 resets = <&cpg 915>; 1243 status = "disabled"; 1244 }; 1245 1246 canfd: can@e66c0000 { 1247 compatible = "renesas,r8a7796-canfd", 1248 "renesas,rcar-gen3-canfd"; 1249 reg = <0 0xe66c0000 0 0x8000>; 1250 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>, 1251 <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; 1252 interrupt-names = "ch_int", "g_int"; 1253 clocks = <&cpg CPG_MOD 914>, 1254 <&cpg CPG_CORE R8A7796_CLK_CANFD>, 1255 <&can_clk>; 1256 clock-names = "fck", "canfd", "can_clk"; 1257 assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>; 1258 assigned-clock-rates = <80000000>; 1259 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1260 resets = <&cpg 914>; 1261 status = "disabled"; 1262 1263 channel0 { 1264 status = "disabled"; 1265 }; 1266 1267 channel1 { 1268 status = "disabled"; 1269 }; 1270 }; 1271 1272 pwm0: pwm@e6e30000 { 1273 compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar"; 1274 reg = <0 0xe6e30000 0 8>; 1275 #pwm-cells = <2>; 1276 clocks = <&cpg CPG_MOD 523>; 1277 resets = <&cpg 523>; 1278 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1279 status = "disabled"; 1280 }; 1281 1282 pwm1: pwm@e6e31000 { 1283 compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar"; 1284 reg = <0 0xe6e31000 0 8>; 1285 #pwm-cells = <2>; 1286 clocks = <&cpg CPG_MOD 523>; 1287 resets = <&cpg 523>; 1288 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1289 status = "disabled"; 1290 }; 1291 1292 pwm2: pwm@e6e32000 { 1293 compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar"; 1294 reg = <0 0xe6e32000 0 8>; 1295 #pwm-cells = <2>; 1296 clocks = <&cpg CPG_MOD 523>; 1297 resets = <&cpg 523>; 1298 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1299 status = "disabled"; 1300 }; 1301 1302 pwm3: pwm@e6e33000 { 1303 compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar"; 1304 reg = <0 0xe6e33000 0 8>; 1305 #pwm-cells = <2>; 1306 clocks = <&cpg CPG_MOD 523>; 1307 resets = <&cpg 523>; 1308 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1309 status = "disabled"; 1310 }; 1311 1312 pwm4: pwm@e6e34000 { 1313 compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar"; 1314 reg = <0 0xe6e34000 0 8>; 1315 #pwm-cells = <2>; 1316 clocks = <&cpg CPG_MOD 523>; 1317 resets = <&cpg 523>; 1318 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1319 status = "disabled"; 1320 }; 1321 1322 pwm5: pwm@e6e35000 { 1323 compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar"; 1324 reg = <0 0xe6e35000 0 8>; 1325 #pwm-cells = <2>; 1326 clocks = <&cpg CPG_MOD 523>; 1327 resets = <&cpg 523>; 1328 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1329 status = "disabled"; 1330 }; 1331 1332 pwm6: pwm@e6e36000 { 1333 compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar"; 1334 reg = <0 0xe6e36000 0 8>; 1335 #pwm-cells = <2>; 1336 clocks = <&cpg CPG_MOD 523>; 1337 resets = <&cpg 523>; 1338 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1339 status = "disabled"; 1340 }; 1341 1342 scif0: serial@e6e60000 { 1343 compatible = "renesas,scif-r8a7796", 1344 "renesas,rcar-gen3-scif", "renesas,scif"; 1345 reg = <0 0xe6e60000 0 64>; 1346 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; 1347 clocks = <&cpg CPG_MOD 207>, 1348 <&cpg CPG_CORE R8A7796_CLK_S3D1>, 1349 <&scif_clk>; 1350 clock-names = "fck", "brg_int", "scif_clk"; 1351 dmas = <&dmac1 0x51>, <&dmac1 0x50>, 1352 <&dmac2 0x51>, <&dmac2 0x50>; 1353 dma-names = "tx", "rx", "tx", "rx"; 1354 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1355 resets = <&cpg 207>; 1356 status = "disabled"; 1357 }; 1358 1359 scif1: serial@e6e68000 { 1360 compatible = "renesas,scif-r8a7796", 1361 "renesas,rcar-gen3-scif", "renesas,scif"; 1362 reg = <0 0xe6e68000 0 64>; 1363 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; 1364 clocks = <&cpg CPG_MOD 206>, 1365 <&cpg CPG_CORE R8A7796_CLK_S3D1>, 1366 <&scif_clk>; 1367 clock-names = "fck", "brg_int", "scif_clk"; 1368 dmas = <&dmac1 0x53>, <&dmac1 0x52>, 1369 <&dmac2 0x53>, <&dmac2 0x52>; 1370 dma-names = "tx", "rx", "tx", "rx"; 1371 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1372 resets = <&cpg 206>; 1373 status = "disabled"; 1374 }; 1375 1376 scif2: serial@e6e88000 { 1377 compatible = "renesas,scif-r8a7796", 1378 "renesas,rcar-gen3-scif", "renesas,scif"; 1379 reg = <0 0xe6e88000 0 64>; 1380 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; 1381 clocks = <&cpg CPG_MOD 310>, 1382 <&cpg CPG_CORE R8A7796_CLK_S3D1>, 1383 <&scif_clk>; 1384 clock-names = "fck", "brg_int", "scif_clk"; 1385 dmas = <&dmac1 0x13>, <&dmac1 0x12>, 1386 <&dmac2 0x13>, <&dmac2 0x12>; 1387 dma-names = "tx", "rx", "tx", "rx"; 1388 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1389 resets = <&cpg 310>; 1390 status = "disabled"; 1391 }; 1392 1393 scif3: serial@e6c50000 { 1394 compatible = "renesas,scif-r8a7796", 1395 "renesas,rcar-gen3-scif", "renesas,scif"; 1396 reg = <0 0xe6c50000 0 64>; 1397 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 1398 clocks = <&cpg CPG_MOD 204>, 1399 <&cpg CPG_CORE R8A7796_CLK_S3D1>, 1400 <&scif_clk>; 1401 clock-names = "fck", "brg_int", "scif_clk"; 1402 dmas = <&dmac0 0x57>, <&dmac0 0x56>; 1403 dma-names = "tx", "rx"; 1404 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1405 resets = <&cpg 204>; 1406 status = "disabled"; 1407 }; 1408 1409 scif4: serial@e6c40000 { 1410 compatible = "renesas,scif-r8a7796", 1411 "renesas,rcar-gen3-scif", "renesas,scif"; 1412 reg = <0 0xe6c40000 0 64>; 1413 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; 1414 clocks = <&cpg CPG_MOD 203>, 1415 <&cpg CPG_CORE R8A7796_CLK_S3D1>, 1416 <&scif_clk>; 1417 clock-names = "fck", "brg_int", "scif_clk"; 1418 dmas = <&dmac0 0x59>, <&dmac0 0x58>; 1419 dma-names = "tx", "rx"; 1420 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1421 resets = <&cpg 203>; 1422 status = "disabled"; 1423 }; 1424 1425 scif5: serial@e6f30000 { 1426 compatible = "renesas,scif-r8a7796", 1427 "renesas,rcar-gen3-scif", "renesas,scif"; 1428 reg = <0 0xe6f30000 0 64>; 1429 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 1430 clocks = <&cpg CPG_MOD 202>, 1431 <&cpg CPG_CORE R8A7796_CLK_S3D1>, 1432 <&scif_clk>; 1433 clock-names = "fck", "brg_int", "scif_clk"; 1434 dmas = <&dmac1 0x5b>, <&dmac1 0x5a>, 1435 <&dmac2 0x5b>, <&dmac2 0x5a>; 1436 dma-names = "tx", "rx", "tx", "rx"; 1437 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1438 resets = <&cpg 202>; 1439 status = "disabled"; 1440 }; 1441 1442 tpu: pwm@e6e80000 { 1443 compatible = "renesas,tpu-r8a7796", "renesas,tpu"; 1444 reg = <0 0xe6e80000 0 0x148>; 1445 interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>; 1446 clocks = <&cpg CPG_MOD 304>; 1447 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1448 resets = <&cpg 304>; 1449 #pwm-cells = <3>; 1450 status = "disabled"; 1451 }; 1452 1453 msiof0: spi@e6e90000 { 1454 compatible = "renesas,msiof-r8a7796", 1455 "renesas,rcar-gen3-msiof"; 1456 reg = <0 0xe6e90000 0 0x0064>; 1457 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; 1458 clocks = <&cpg CPG_MOD 211>; 1459 dmas = <&dmac1 0x41>, <&dmac1 0x40>, 1460 <&dmac2 0x41>, <&dmac2 0x40>; 1461 dma-names = "tx", "rx", "tx", "rx"; 1462 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1463 resets = <&cpg 211>; 1464 #address-cells = <1>; 1465 #size-cells = <0>; 1466 status = "disabled"; 1467 }; 1468 1469 msiof1: spi@e6ea0000 { 1470 compatible = "renesas,msiof-r8a7796", 1471 "renesas,rcar-gen3-msiof"; 1472 reg = <0 0xe6ea0000 0 0x0064>; 1473 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; 1474 clocks = <&cpg CPG_MOD 210>; 1475 dmas = <&dmac1 0x43>, <&dmac1 0x42>, 1476 <&dmac2 0x43>, <&dmac2 0x42>; 1477 dma-names = "tx", "rx", "tx", "rx"; 1478 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1479 resets = <&cpg 210>; 1480 #address-cells = <1>; 1481 #size-cells = <0>; 1482 status = "disabled"; 1483 }; 1484 1485 msiof2: spi@e6c00000 { 1486 compatible = "renesas,msiof-r8a7796", 1487 "renesas,rcar-gen3-msiof"; 1488 reg = <0 0xe6c00000 0 0x0064>; 1489 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; 1490 clocks = <&cpg CPG_MOD 209>; 1491 dmas = <&dmac0 0x45>, <&dmac0 0x44>; 1492 dma-names = "tx", "rx"; 1493 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1494 resets = <&cpg 209>; 1495 #address-cells = <1>; 1496 #size-cells = <0>; 1497 status = "disabled"; 1498 }; 1499 1500 msiof3: spi@e6c10000 { 1501 compatible = "renesas,msiof-r8a7796", 1502 "renesas,rcar-gen3-msiof"; 1503 reg = <0 0xe6c10000 0 0x0064>; 1504 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; 1505 clocks = <&cpg CPG_MOD 208>; 1506 dmas = <&dmac0 0x47>, <&dmac0 0x46>; 1507 dma-names = "tx", "rx"; 1508 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1509 resets = <&cpg 208>; 1510 #address-cells = <1>; 1511 #size-cells = <0>; 1512 status = "disabled"; 1513 }; 1514 1515 vin0: video@e6ef0000 { 1516 compatible = "renesas,vin-r8a7796"; 1517 reg = <0 0xe6ef0000 0 0x1000>; 1518 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; 1519 clocks = <&cpg CPG_MOD 811>; 1520 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1521 resets = <&cpg 811>; 1522 renesas,id = <0>; 1523 status = "disabled"; 1524 1525 ports { 1526 #address-cells = <1>; 1527 #size-cells = <0>; 1528 1529 port@1 { 1530 #address-cells = <1>; 1531 #size-cells = <0>; 1532 1533 reg = <1>; 1534 1535 vin0csi20: endpoint@0 { 1536 reg = <0>; 1537 remote-endpoint = <&csi20vin0>; 1538 }; 1539 vin0csi40: endpoint@2 { 1540 reg = <2>; 1541 remote-endpoint = <&csi40vin0>; 1542 }; 1543 }; 1544 }; 1545 }; 1546 1547 vin1: video@e6ef1000 { 1548 compatible = "renesas,vin-r8a7796"; 1549 reg = <0 0xe6ef1000 0 0x1000>; 1550 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; 1551 clocks = <&cpg CPG_MOD 810>; 1552 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1553 resets = <&cpg 810>; 1554 renesas,id = <1>; 1555 status = "disabled"; 1556 1557 ports { 1558 #address-cells = <1>; 1559 #size-cells = <0>; 1560 1561 port@1 { 1562 #address-cells = <1>; 1563 #size-cells = <0>; 1564 1565 reg = <1>; 1566 1567 vin1csi20: endpoint@0 { 1568 reg = <0>; 1569 remote-endpoint = <&csi20vin1>; 1570 }; 1571 vin1csi40: endpoint@2 { 1572 reg = <2>; 1573 remote-endpoint = <&csi40vin1>; 1574 }; 1575 }; 1576 }; 1577 }; 1578 1579 vin2: video@e6ef2000 { 1580 compatible = "renesas,vin-r8a7796"; 1581 reg = <0 0xe6ef2000 0 0x1000>; 1582 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>; 1583 clocks = <&cpg CPG_MOD 809>; 1584 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1585 resets = <&cpg 809>; 1586 renesas,id = <2>; 1587 status = "disabled"; 1588 1589 ports { 1590 #address-cells = <1>; 1591 #size-cells = <0>; 1592 1593 port@1 { 1594 #address-cells = <1>; 1595 #size-cells = <0>; 1596 1597 reg = <1>; 1598 1599 vin2csi20: endpoint@0 { 1600 reg = <0>; 1601 remote-endpoint = <&csi20vin2>; 1602 }; 1603 vin2csi40: endpoint@2 { 1604 reg = <2>; 1605 remote-endpoint = <&csi40vin2>; 1606 }; 1607 }; 1608 }; 1609 }; 1610 1611 vin3: video@e6ef3000 { 1612 compatible = "renesas,vin-r8a7796"; 1613 reg = <0 0xe6ef3000 0 0x1000>; 1614 interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>; 1615 clocks = <&cpg CPG_MOD 808>; 1616 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1617 resets = <&cpg 808>; 1618 renesas,id = <3>; 1619 status = "disabled"; 1620 1621 ports { 1622 #address-cells = <1>; 1623 #size-cells = <0>; 1624 1625 port@1 { 1626 #address-cells = <1>; 1627 #size-cells = <0>; 1628 1629 reg = <1>; 1630 1631 vin3csi20: endpoint@0 { 1632 reg = <0>; 1633 remote-endpoint = <&csi20vin3>; 1634 }; 1635 vin3csi40: endpoint@2 { 1636 reg = <2>; 1637 remote-endpoint = <&csi40vin3>; 1638 }; 1639 }; 1640 }; 1641 }; 1642 1643 vin4: video@e6ef4000 { 1644 compatible = "renesas,vin-r8a7796"; 1645 reg = <0 0xe6ef4000 0 0x1000>; 1646 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; 1647 clocks = <&cpg CPG_MOD 807>; 1648 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1649 resets = <&cpg 807>; 1650 renesas,id = <4>; 1651 status = "disabled"; 1652 1653 ports { 1654 #address-cells = <1>; 1655 #size-cells = <0>; 1656 1657 port@1 { 1658 #address-cells = <1>; 1659 #size-cells = <0>; 1660 1661 reg = <1>; 1662 1663 vin4csi20: endpoint@0 { 1664 reg = <0>; 1665 remote-endpoint = <&csi20vin4>; 1666 }; 1667 vin4csi40: endpoint@2 { 1668 reg = <2>; 1669 remote-endpoint = <&csi40vin4>; 1670 }; 1671 }; 1672 }; 1673 }; 1674 1675 vin5: video@e6ef5000 { 1676 compatible = "renesas,vin-r8a7796"; 1677 reg = <0 0xe6ef5000 0 0x1000>; 1678 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; 1679 clocks = <&cpg CPG_MOD 806>; 1680 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1681 resets = <&cpg 806>; 1682 renesas,id = <5>; 1683 status = "disabled"; 1684 1685 ports { 1686 #address-cells = <1>; 1687 #size-cells = <0>; 1688 1689 port@1 { 1690 #address-cells = <1>; 1691 #size-cells = <0>; 1692 1693 reg = <1>; 1694 1695 vin5csi20: endpoint@0 { 1696 reg = <0>; 1697 remote-endpoint = <&csi20vin5>; 1698 }; 1699 vin5csi40: endpoint@2 { 1700 reg = <2>; 1701 remote-endpoint = <&csi40vin5>; 1702 }; 1703 }; 1704 }; 1705 }; 1706 1707 vin6: video@e6ef6000 { 1708 compatible = "renesas,vin-r8a7796"; 1709 reg = <0 0xe6ef6000 0 0x1000>; 1710 interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>; 1711 clocks = <&cpg CPG_MOD 805>; 1712 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1713 resets = <&cpg 805>; 1714 renesas,id = <6>; 1715 status = "disabled"; 1716 1717 ports { 1718 #address-cells = <1>; 1719 #size-cells = <0>; 1720 1721 port@1 { 1722 #address-cells = <1>; 1723 #size-cells = <0>; 1724 1725 reg = <1>; 1726 1727 vin6csi20: endpoint@0 { 1728 reg = <0>; 1729 remote-endpoint = <&csi20vin6>; 1730 }; 1731 vin6csi40: endpoint@2 { 1732 reg = <2>; 1733 remote-endpoint = <&csi40vin6>; 1734 }; 1735 }; 1736 }; 1737 }; 1738 1739 vin7: video@e6ef7000 { 1740 compatible = "renesas,vin-r8a7796"; 1741 reg = <0 0xe6ef7000 0 0x1000>; 1742 interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>; 1743 clocks = <&cpg CPG_MOD 804>; 1744 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1745 resets = <&cpg 804>; 1746 renesas,id = <7>; 1747 status = "disabled"; 1748 1749 ports { 1750 #address-cells = <1>; 1751 #size-cells = <0>; 1752 1753 port@1 { 1754 #address-cells = <1>; 1755 #size-cells = <0>; 1756 1757 reg = <1>; 1758 1759 vin7csi20: endpoint@0 { 1760 reg = <0>; 1761 remote-endpoint = <&csi20vin7>; 1762 }; 1763 vin7csi40: endpoint@2 { 1764 reg = <2>; 1765 remote-endpoint = <&csi40vin7>; 1766 }; 1767 }; 1768 }; 1769 }; 1770 1771 drif00: rif@e6f40000 { 1772 compatible = "renesas,r8a7796-drif", 1773 "renesas,rcar-gen3-drif"; 1774 reg = <0 0xe6f40000 0 0x64>; 1775 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; 1776 clocks = <&cpg CPG_MOD 515>; 1777 clock-names = "fck"; 1778 dmas = <&dmac1 0x20>, <&dmac2 0x20>; 1779 dma-names = "rx", "rx"; 1780 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1781 resets = <&cpg 515>; 1782 renesas,bonding = <&drif01>; 1783 status = "disabled"; 1784 }; 1785 1786 drif01: rif@e6f50000 { 1787 compatible = "renesas,r8a7796-drif", 1788 "renesas,rcar-gen3-drif"; 1789 reg = <0 0xe6f50000 0 0x64>; 1790 interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; 1791 clocks = <&cpg CPG_MOD 514>; 1792 clock-names = "fck"; 1793 dmas = <&dmac1 0x22>, <&dmac2 0x22>; 1794 dma-names = "rx", "rx"; 1795 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1796 resets = <&cpg 514>; 1797 renesas,bonding = <&drif00>; 1798 status = "disabled"; 1799 }; 1800 1801 drif10: rif@e6f60000 { 1802 compatible = "renesas,r8a7796-drif", 1803 "renesas,rcar-gen3-drif"; 1804 reg = <0 0xe6f60000 0 0x64>; 1805 interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; 1806 clocks = <&cpg CPG_MOD 513>; 1807 clock-names = "fck"; 1808 dmas = <&dmac1 0x24>, <&dmac2 0x24>; 1809 dma-names = "rx", "rx"; 1810 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1811 resets = <&cpg 513>; 1812 renesas,bonding = <&drif11>; 1813 status = "disabled"; 1814 }; 1815 1816 drif11: rif@e6f70000 { 1817 compatible = "renesas,r8a7796-drif", 1818 "renesas,rcar-gen3-drif"; 1819 reg = <0 0xe6f70000 0 0x64>; 1820 interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; 1821 clocks = <&cpg CPG_MOD 512>; 1822 clock-names = "fck"; 1823 dmas = <&dmac1 0x26>, <&dmac2 0x26>; 1824 dma-names = "rx", "rx"; 1825 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1826 resets = <&cpg 512>; 1827 renesas,bonding = <&drif10>; 1828 status = "disabled"; 1829 }; 1830 1831 drif20: rif@e6f80000 { 1832 compatible = "renesas,r8a7796-drif", 1833 "renesas,rcar-gen3-drif"; 1834 reg = <0 0xe6f80000 0 0x64>; 1835 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; 1836 clocks = <&cpg CPG_MOD 511>; 1837 clock-names = "fck"; 1838 dmas = <&dmac1 0x28>, <&dmac2 0x28>; 1839 dma-names = "rx", "rx"; 1840 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1841 resets = <&cpg 511>; 1842 renesas,bonding = <&drif21>; 1843 status = "disabled"; 1844 }; 1845 1846 drif21: rif@e6f90000 { 1847 compatible = "renesas,r8a7796-drif", 1848 "renesas,rcar-gen3-drif"; 1849 reg = <0 0xe6f90000 0 0x64>; 1850 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; 1851 clocks = <&cpg CPG_MOD 510>; 1852 clock-names = "fck"; 1853 dmas = <&dmac1 0x2a>, <&dmac2 0x2a>; 1854 dma-names = "rx", "rx"; 1855 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1856 resets = <&cpg 510>; 1857 renesas,bonding = <&drif20>; 1858 status = "disabled"; 1859 }; 1860 1861 drif30: rif@e6fa0000 { 1862 compatible = "renesas,r8a7796-drif", 1863 "renesas,rcar-gen3-drif"; 1864 reg = <0 0xe6fa0000 0 0x64>; 1865 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>; 1866 clocks = <&cpg CPG_MOD 509>; 1867 clock-names = "fck"; 1868 dmas = <&dmac1 0x2c>, <&dmac2 0x2c>; 1869 dma-names = "rx", "rx"; 1870 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1871 resets = <&cpg 509>; 1872 renesas,bonding = <&drif31>; 1873 status = "disabled"; 1874 }; 1875 1876 drif31: rif@e6fb0000 { 1877 compatible = "renesas,r8a7796-drif", 1878 "renesas,rcar-gen3-drif"; 1879 reg = <0 0xe6fb0000 0 0x64>; 1880 interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>; 1881 clocks = <&cpg CPG_MOD 508>; 1882 clock-names = "fck"; 1883 dmas = <&dmac1 0x2e>, <&dmac2 0x2e>; 1884 dma-names = "rx", "rx"; 1885 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1886 resets = <&cpg 508>; 1887 renesas,bonding = <&drif30>; 1888 status = "disabled"; 1889 }; 1890 1891 rcar_sound: sound@ec500000 { 1892 /* 1893 * #sound-dai-cells is required if simple-card 1894 * 1895 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; 1896 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; 1897 */ 1898 /* 1899 * #clock-cells is required for audio_clkout0/1/2/3 1900 * 1901 * clkout : #clock-cells = <0>; <&rcar_sound>; 1902 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>; 1903 */ 1904 compatible = "renesas,rcar_sound-r8a7796", "renesas,rcar_sound-gen3"; 1905 reg = <0 0xec500000 0 0x1000>, /* SCU */ 1906 <0 0xec5a0000 0 0x100>, /* ADG */ 1907 <0 0xec540000 0 0x1000>, /* SSIU */ 1908 <0 0xec541000 0 0x280>, /* SSI */ 1909 <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/ 1910 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; 1911 1912 clocks = <&cpg CPG_MOD 1005>, 1913 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, 1914 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, 1915 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, 1916 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, 1917 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, 1918 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, 1919 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, 1920 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, 1921 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, 1922 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, 1923 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 1924 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 1925 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, 1926 <&audio_clk_a>, <&audio_clk_b>, 1927 <&audio_clk_c>, 1928 <&cpg CPG_MOD 922>; 1929 clock-names = "ssi-all", 1930 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1931 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1932 "ssi.1", "ssi.0", 1933 "src.9", "src.8", "src.7", "src.6", 1934 "src.5", "src.4", "src.3", "src.2", 1935 "src.1", "src.0", 1936 "mix.1", "mix.0", 1937 "ctu.1", "ctu.0", 1938 "dvc.0", "dvc.1", 1939 "clk_a", "clk_b", "clk_c", "clk_i"; 1940 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1941 resets = <&cpg 1005>, 1942 <&cpg 1006>, <&cpg 1007>, 1943 <&cpg 1008>, <&cpg 1009>, 1944 <&cpg 1010>, <&cpg 1011>, 1945 <&cpg 1012>, <&cpg 1013>, 1946 <&cpg 1014>, <&cpg 1015>; 1947 reset-names = "ssi-all", 1948 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1949 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1950 "ssi.1", "ssi.0"; 1951 status = "disabled"; 1952 1953 rcar_sound,ctu { 1954 ctu00: ctu-0 { }; 1955 ctu01: ctu-1 { }; 1956 ctu02: ctu-2 { }; 1957 ctu03: ctu-3 { }; 1958 ctu10: ctu-4 { }; 1959 ctu11: ctu-5 { }; 1960 ctu12: ctu-6 { }; 1961 ctu13: ctu-7 { }; 1962 }; 1963 1964 rcar_sound,dvc { 1965 dvc0: dvc-0 { 1966 dmas = <&audma1 0xbc>; 1967 dma-names = "tx"; 1968 }; 1969 dvc1: dvc-1 { 1970 dmas = <&audma1 0xbe>; 1971 dma-names = "tx"; 1972 }; 1973 }; 1974 1975 rcar_sound,mix { 1976 mix0: mix-0 { }; 1977 mix1: mix-1 { }; 1978 }; 1979 1980 rcar_sound,src { 1981 src0: src-0 { 1982 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; 1983 dmas = <&audma0 0x85>, <&audma1 0x9a>; 1984 dma-names = "rx", "tx"; 1985 }; 1986 src1: src-1 { 1987 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; 1988 dmas = <&audma0 0x87>, <&audma1 0x9c>; 1989 dma-names = "rx", "tx"; 1990 }; 1991 src2: src-2 { 1992 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; 1993 dmas = <&audma0 0x89>, <&audma1 0x9e>; 1994 dma-names = "rx", "tx"; 1995 }; 1996 src3: src-3 { 1997 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; 1998 dmas = <&audma0 0x8b>, <&audma1 0xa0>; 1999 dma-names = "rx", "tx"; 2000 }; 2001 src4: src-4 { 2002 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; 2003 dmas = <&audma0 0x8d>, <&audma1 0xb0>; 2004 dma-names = "rx", "tx"; 2005 }; 2006 src5: src-5 { 2007 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; 2008 dmas = <&audma0 0x8f>, <&audma1 0xb2>; 2009 dma-names = "rx", "tx"; 2010 }; 2011 src6: src-6 { 2012 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; 2013 dmas = <&audma0 0x91>, <&audma1 0xb4>; 2014 dma-names = "rx", "tx"; 2015 }; 2016 src7: src-7 { 2017 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; 2018 dmas = <&audma0 0x93>, <&audma1 0xb6>; 2019 dma-names = "rx", "tx"; 2020 }; 2021 src8: src-8 { 2022 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; 2023 dmas = <&audma0 0x95>, <&audma1 0xb8>; 2024 dma-names = "rx", "tx"; 2025 }; 2026 src9: src-9 { 2027 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>; 2028 dmas = <&audma0 0x97>, <&audma1 0xba>; 2029 dma-names = "rx", "tx"; 2030 }; 2031 }; 2032 2033 rcar_sound,ssi { 2034 ssi0: ssi-0 { 2035 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; 2036 dmas = <&audma0 0x01>, <&audma1 0x02>; 2037 dma-names = "rx", "tx"; 2038 }; 2039 ssi1: ssi-1 { 2040 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; 2041 dmas = <&audma0 0x03>, <&audma1 0x04>; 2042 dma-names = "rx", "tx"; 2043 }; 2044 ssi2: ssi-2 { 2045 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; 2046 dmas = <&audma0 0x05>, <&audma1 0x06>; 2047 dma-names = "rx", "tx"; 2048 }; 2049 ssi3: ssi-3 { 2050 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; 2051 dmas = <&audma0 0x07>, <&audma1 0x08>; 2052 dma-names = "rx", "tx"; 2053 }; 2054 ssi4: ssi-4 { 2055 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; 2056 dmas = <&audma0 0x09>, <&audma1 0x0a>; 2057 dma-names = "rx", "tx"; 2058 }; 2059 ssi5: ssi-5 { 2060 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; 2061 dmas = <&audma0 0x0b>, <&audma1 0x0c>; 2062 dma-names = "rx", "tx"; 2063 }; 2064 ssi6: ssi-6 { 2065 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; 2066 dmas = <&audma0 0x0d>, <&audma1 0x0e>; 2067 dma-names = "rx", "tx"; 2068 }; 2069 ssi7: ssi-7 { 2070 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; 2071 dmas = <&audma0 0x0f>, <&audma1 0x10>; 2072 dma-names = "rx", "tx"; 2073 }; 2074 ssi8: ssi-8 { 2075 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; 2076 dmas = <&audma0 0x11>, <&audma1 0x12>; 2077 dma-names = "rx", "tx"; 2078 }; 2079 ssi9: ssi-9 { 2080 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; 2081 dmas = <&audma0 0x13>, <&audma1 0x14>; 2082 dma-names = "rx", "tx"; 2083 }; 2084 }; 2085 2086 rcar_sound,ssiu { 2087 ssiu00: ssiu-0 { 2088 dmas = <&audma0 0x15>, <&audma1 0x16>; 2089 dma-names = "rx", "tx"; 2090 }; 2091 ssiu01: ssiu-1 { 2092 dmas = <&audma0 0x35>, <&audma1 0x36>; 2093 dma-names = "rx", "tx"; 2094 }; 2095 ssiu02: ssiu-2 { 2096 dmas = <&audma0 0x37>, <&audma1 0x38>; 2097 dma-names = "rx", "tx"; 2098 }; 2099 ssiu03: ssiu-3 { 2100 dmas = <&audma0 0x47>, <&audma1 0x48>; 2101 dma-names = "rx", "tx"; 2102 }; 2103 ssiu04: ssiu-4 { 2104 dmas = <&audma0 0x3F>, <&audma1 0x40>; 2105 dma-names = "rx", "tx"; 2106 }; 2107 ssiu05: ssiu-5 { 2108 dmas = <&audma0 0x43>, <&audma1 0x44>; 2109 dma-names = "rx", "tx"; 2110 }; 2111 ssiu06: ssiu-6 { 2112 dmas = <&audma0 0x4F>, <&audma1 0x50>; 2113 dma-names = "rx", "tx"; 2114 }; 2115 ssiu07: ssiu-7 { 2116 dmas = <&audma0 0x53>, <&audma1 0x54>; 2117 dma-names = "rx", "tx"; 2118 }; 2119 ssiu10: ssiu-8 { 2120 dmas = <&audma0 0x49>, <&audma1 0x4a>; 2121 dma-names = "rx", "tx"; 2122 }; 2123 ssiu11: ssiu-9 { 2124 dmas = <&audma0 0x4B>, <&audma1 0x4C>; 2125 dma-names = "rx", "tx"; 2126 }; 2127 ssiu12: ssiu-10 { 2128 dmas = <&audma0 0x57>, <&audma1 0x58>; 2129 dma-names = "rx", "tx"; 2130 }; 2131 ssiu13: ssiu-11 { 2132 dmas = <&audma0 0x59>, <&audma1 0x5A>; 2133 dma-names = "rx", "tx"; 2134 }; 2135 ssiu14: ssiu-12 { 2136 dmas = <&audma0 0x5F>, <&audma1 0x60>; 2137 dma-names = "rx", "tx"; 2138 }; 2139 ssiu15: ssiu-13 { 2140 dmas = <&audma0 0xC3>, <&audma1 0xC4>; 2141 dma-names = "rx", "tx"; 2142 }; 2143 ssiu16: ssiu-14 { 2144 dmas = <&audma0 0xC7>, <&audma1 0xC8>; 2145 dma-names = "rx", "tx"; 2146 }; 2147 ssiu17: ssiu-15 { 2148 dmas = <&audma0 0xCB>, <&audma1 0xCC>; 2149 dma-names = "rx", "tx"; 2150 }; 2151 ssiu20: ssiu-16 { 2152 dmas = <&audma0 0x63>, <&audma1 0x64>; 2153 dma-names = "rx", "tx"; 2154 }; 2155 ssiu21: ssiu-17 { 2156 dmas = <&audma0 0x67>, <&audma1 0x68>; 2157 dma-names = "rx", "tx"; 2158 }; 2159 ssiu22: ssiu-18 { 2160 dmas = <&audma0 0x6B>, <&audma1 0x6C>; 2161 dma-names = "rx", "tx"; 2162 }; 2163 ssiu23: ssiu-19 { 2164 dmas = <&audma0 0x6D>, <&audma1 0x6E>; 2165 dma-names = "rx", "tx"; 2166 }; 2167 ssiu24: ssiu-20 { 2168 dmas = <&audma0 0xCF>, <&audma1 0xCE>; 2169 dma-names = "rx", "tx"; 2170 }; 2171 ssiu25: ssiu-21 { 2172 dmas = <&audma0 0xEB>, <&audma1 0xEC>; 2173 dma-names = "rx", "tx"; 2174 }; 2175 ssiu26: ssiu-22 { 2176 dmas = <&audma0 0xED>, <&audma1 0xEE>; 2177 dma-names = "rx", "tx"; 2178 }; 2179 ssiu27: ssiu-23 { 2180 dmas = <&audma0 0xEF>, <&audma1 0xF0>; 2181 dma-names = "rx", "tx"; 2182 }; 2183 ssiu30: ssiu-24 { 2184 dmas = <&audma0 0x6f>, <&audma1 0x70>; 2185 dma-names = "rx", "tx"; 2186 }; 2187 ssiu31: ssiu-25 { 2188 dmas = <&audma0 0x21>, <&audma1 0x22>; 2189 dma-names = "rx", "tx"; 2190 }; 2191 ssiu32: ssiu-26 { 2192 dmas = <&audma0 0x23>, <&audma1 0x24>; 2193 dma-names = "rx", "tx"; 2194 }; 2195 ssiu33: ssiu-27 { 2196 dmas = <&audma0 0x25>, <&audma1 0x26>; 2197 dma-names = "rx", "tx"; 2198 }; 2199 ssiu34: ssiu-28 { 2200 dmas = <&audma0 0x27>, <&audma1 0x28>; 2201 dma-names = "rx", "tx"; 2202 }; 2203 ssiu35: ssiu-29 { 2204 dmas = <&audma0 0x29>, <&audma1 0x2A>; 2205 dma-names = "rx", "tx"; 2206 }; 2207 ssiu36: ssiu-30 { 2208 dmas = <&audma0 0x2B>, <&audma1 0x2C>; 2209 dma-names = "rx", "tx"; 2210 }; 2211 ssiu37: ssiu-31 { 2212 dmas = <&audma0 0x2D>, <&audma1 0x2E>; 2213 dma-names = "rx", "tx"; 2214 }; 2215 ssiu40: ssiu-32 { 2216 dmas = <&audma0 0x71>, <&audma1 0x72>; 2217 dma-names = "rx", "tx"; 2218 }; 2219 ssiu41: ssiu-33 { 2220 dmas = <&audma0 0x17>, <&audma1 0x18>; 2221 dma-names = "rx", "tx"; 2222 }; 2223 ssiu42: ssiu-34 { 2224 dmas = <&audma0 0x19>, <&audma1 0x1A>; 2225 dma-names = "rx", "tx"; 2226 }; 2227 ssiu43: ssiu-35 { 2228 dmas = <&audma0 0x1B>, <&audma1 0x1C>; 2229 dma-names = "rx", "tx"; 2230 }; 2231 ssiu44: ssiu-36 { 2232 dmas = <&audma0 0x1D>, <&audma1 0x1E>; 2233 dma-names = "rx", "tx"; 2234 }; 2235 ssiu45: ssiu-37 { 2236 dmas = <&audma0 0x1F>, <&audma1 0x20>; 2237 dma-names = "rx", "tx"; 2238 }; 2239 ssiu46: ssiu-38 { 2240 dmas = <&audma0 0x31>, <&audma1 0x32>; 2241 dma-names = "rx", "tx"; 2242 }; 2243 ssiu47: ssiu-39 { 2244 dmas = <&audma0 0x33>, <&audma1 0x34>; 2245 dma-names = "rx", "tx"; 2246 }; 2247 ssiu50: ssiu-40 { 2248 dmas = <&audma0 0x73>, <&audma1 0x74>; 2249 dma-names = "rx", "tx"; 2250 }; 2251 ssiu60: ssiu-41 { 2252 dmas = <&audma0 0x75>, <&audma1 0x76>; 2253 dma-names = "rx", "tx"; 2254 }; 2255 ssiu70: ssiu-42 { 2256 dmas = <&audma0 0x79>, <&audma1 0x7a>; 2257 dma-names = "rx", "tx"; 2258 }; 2259 ssiu80: ssiu-43 { 2260 dmas = <&audma0 0x7b>, <&audma1 0x7c>; 2261 dma-names = "rx", "tx"; 2262 }; 2263 ssiu90: ssiu-44 { 2264 dmas = <&audma0 0x7d>, <&audma1 0x7e>; 2265 dma-names = "rx", "tx"; 2266 }; 2267 ssiu91: ssiu-45 { 2268 dmas = <&audma0 0x7F>, <&audma1 0x80>; 2269 dma-names = "rx", "tx"; 2270 }; 2271 ssiu92: ssiu-46 { 2272 dmas = <&audma0 0x81>, <&audma1 0x82>; 2273 dma-names = "rx", "tx"; 2274 }; 2275 ssiu93: ssiu-47 { 2276 dmas = <&audma0 0x83>, <&audma1 0x84>; 2277 dma-names = "rx", "tx"; 2278 }; 2279 ssiu94: ssiu-48 { 2280 dmas = <&audma0 0xA3>, <&audma1 0xA4>; 2281 dma-names = "rx", "tx"; 2282 }; 2283 ssiu95: ssiu-49 { 2284 dmas = <&audma0 0xA5>, <&audma1 0xA6>; 2285 dma-names = "rx", "tx"; 2286 }; 2287 ssiu96: ssiu-50 { 2288 dmas = <&audma0 0xA7>, <&audma1 0xA8>; 2289 dma-names = "rx", "tx"; 2290 }; 2291 ssiu97: ssiu-51 { 2292 dmas = <&audma0 0xA9>, <&audma1 0xAA>; 2293 dma-names = "rx", "tx"; 2294 }; 2295 }; 2296 }; 2297 2298 mlp: mlp@ec520000 { 2299 compatible = "renesas,r8a7796-mlp", 2300 "renesas,rcar-gen3-mlp"; 2301 reg = <0 0xec520000 0 0x800>; 2302 interrupts = <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>, 2303 <GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH>; 2304 clocks = <&cpg CPG_MOD 802>; 2305 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2306 resets = <&cpg 802>; 2307 status = "disabled"; 2308 }; 2309 2310 audma0: dma-controller@ec700000 { 2311 compatible = "renesas,dmac-r8a7796", 2312 "renesas,rcar-dmac"; 2313 reg = <0 0xec700000 0 0x10000>; 2314 interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>, 2315 <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>, 2316 <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>, 2317 <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>, 2318 <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>, 2319 <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>, 2320 <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>, 2321 <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>, 2322 <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>, 2323 <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>, 2324 <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>, 2325 <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>, 2326 <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>, 2327 <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>, 2328 <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>, 2329 <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>, 2330 <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>; 2331 interrupt-names = "error", 2332 "ch0", "ch1", "ch2", "ch3", 2333 "ch4", "ch5", "ch6", "ch7", 2334 "ch8", "ch9", "ch10", "ch11", 2335 "ch12", "ch13", "ch14", "ch15"; 2336 clocks = <&cpg CPG_MOD 502>; 2337 clock-names = "fck"; 2338 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2339 resets = <&cpg 502>; 2340 #dma-cells = <1>; 2341 dma-channels = <16>; 2342 iommus = <&ipmmu_mp 0>, <&ipmmu_mp 1>, 2343 <&ipmmu_mp 2>, <&ipmmu_mp 3>, 2344 <&ipmmu_mp 4>, <&ipmmu_mp 5>, 2345 <&ipmmu_mp 6>, <&ipmmu_mp 7>, 2346 <&ipmmu_mp 8>, <&ipmmu_mp 9>, 2347 <&ipmmu_mp 10>, <&ipmmu_mp 11>, 2348 <&ipmmu_mp 12>, <&ipmmu_mp 13>, 2349 <&ipmmu_mp 14>, <&ipmmu_mp 15>; 2350 }; 2351 2352 audma1: dma-controller@ec720000 { 2353 compatible = "renesas,dmac-r8a7796", 2354 "renesas,rcar-dmac"; 2355 reg = <0 0xec720000 0 0x10000>; 2356 interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>, 2357 <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>, 2358 <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>, 2359 <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>, 2360 <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>, 2361 <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>, 2362 <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>, 2363 <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>, 2364 <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>, 2365 <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>, 2366 <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>, 2367 <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>, 2368 <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>, 2369 <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>, 2370 <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>, 2371 <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>, 2372 <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>; 2373 interrupt-names = "error", 2374 "ch0", "ch1", "ch2", "ch3", 2375 "ch4", "ch5", "ch6", "ch7", 2376 "ch8", "ch9", "ch10", "ch11", 2377 "ch12", "ch13", "ch14", "ch15"; 2378 clocks = <&cpg CPG_MOD 501>; 2379 clock-names = "fck"; 2380 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2381 resets = <&cpg 501>; 2382 #dma-cells = <1>; 2383 dma-channels = <16>; 2384 iommus = <&ipmmu_mp 16>, <&ipmmu_mp 17>, 2385 <&ipmmu_mp 18>, <&ipmmu_mp 19>, 2386 <&ipmmu_mp 20>, <&ipmmu_mp 21>, 2387 <&ipmmu_mp 22>, <&ipmmu_mp 23>, 2388 <&ipmmu_mp 24>, <&ipmmu_mp 25>, 2389 <&ipmmu_mp 26>, <&ipmmu_mp 27>, 2390 <&ipmmu_mp 28>, <&ipmmu_mp 29>, 2391 <&ipmmu_mp 30>, <&ipmmu_mp 31>; 2392 }; 2393 2394 xhci0: usb@ee000000 { 2395 compatible = "renesas,xhci-r8a7796", 2396 "renesas,rcar-gen3-xhci"; 2397 reg = <0 0xee000000 0 0xc00>; 2398 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; 2399 clocks = <&cpg CPG_MOD 328>; 2400 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2401 resets = <&cpg 328>; 2402 status = "disabled"; 2403 }; 2404 2405 usb3_peri0: usb@ee020000 { 2406 compatible = "renesas,r8a7796-usb3-peri", 2407 "renesas,rcar-gen3-usb3-peri"; 2408 reg = <0 0xee020000 0 0x400>; 2409 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>; 2410 clocks = <&cpg CPG_MOD 328>; 2411 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2412 resets = <&cpg 328>; 2413 status = "disabled"; 2414 }; 2415 2416 ohci0: usb@ee080000 { 2417 compatible = "generic-ohci"; 2418 reg = <0 0xee080000 0 0x100>; 2419 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 2420 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 2421 phys = <&usb2_phy0 1>; 2422 phy-names = "usb"; 2423 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2424 resets = <&cpg 703>, <&cpg 704>; 2425 status = "disabled"; 2426 }; 2427 2428 ohci1: usb@ee0a0000 { 2429 compatible = "generic-ohci"; 2430 reg = <0 0xee0a0000 0 0x100>; 2431 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; 2432 clocks = <&cpg CPG_MOD 702>; 2433 phys = <&usb2_phy1 1>; 2434 phy-names = "usb"; 2435 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2436 resets = <&cpg 702>; 2437 status = "disabled"; 2438 }; 2439 2440 ehci0: usb@ee080100 { 2441 compatible = "generic-ehci"; 2442 reg = <0 0xee080100 0 0x100>; 2443 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 2444 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 2445 phys = <&usb2_phy0 2>; 2446 phy-names = "usb"; 2447 companion = <&ohci0>; 2448 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2449 resets = <&cpg 703>, <&cpg 704>; 2450 status = "disabled"; 2451 }; 2452 2453 ehci1: usb@ee0a0100 { 2454 compatible = "generic-ehci"; 2455 reg = <0 0xee0a0100 0 0x100>; 2456 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; 2457 clocks = <&cpg CPG_MOD 702>; 2458 phys = <&usb2_phy1 2>; 2459 phy-names = "usb"; 2460 companion = <&ohci1>; 2461 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2462 resets = <&cpg 702>; 2463 status = "disabled"; 2464 }; 2465 2466 usb2_phy0: usb-phy@ee080200 { 2467 compatible = "renesas,usb2-phy-r8a7796", 2468 "renesas,rcar-gen3-usb2-phy"; 2469 reg = <0 0xee080200 0 0x700>; 2470 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 2471 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 2472 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2473 resets = <&cpg 703>, <&cpg 704>; 2474 #phy-cells = <1>; 2475 status = "disabled"; 2476 }; 2477 2478 usb2_phy1: usb-phy@ee0a0200 { 2479 compatible = "renesas,usb2-phy-r8a7796", 2480 "renesas,rcar-gen3-usb2-phy"; 2481 reg = <0 0xee0a0200 0 0x700>; 2482 clocks = <&cpg CPG_MOD 702>; 2483 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2484 resets = <&cpg 702>; 2485 #phy-cells = <1>; 2486 status = "disabled"; 2487 }; 2488 2489 sdhi0: mmc@ee100000 { 2490 compatible = "renesas,sdhi-r8a7796", 2491 "renesas,rcar-gen3-sdhi"; 2492 reg = <0 0xee100000 0 0x2000>; 2493 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; 2494 clocks = <&cpg CPG_MOD 314>, <&cpg CPG_CORE R8A7796_CLK_SD0H>; 2495 clock-names = "core", "clkh"; 2496 max-frequency = <200000000>; 2497 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2498 resets = <&cpg 314>; 2499 iommus = <&ipmmu_ds1 32>; 2500 status = "disabled"; 2501 }; 2502 2503 sdhi1: mmc@ee120000 { 2504 compatible = "renesas,sdhi-r8a7796", 2505 "renesas,rcar-gen3-sdhi"; 2506 reg = <0 0xee120000 0 0x2000>; 2507 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; 2508 clocks = <&cpg CPG_MOD 313>, <&cpg CPG_CORE R8A7796_CLK_SD1H>; 2509 clock-names = "core", "clkh"; 2510 max-frequency = <200000000>; 2511 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2512 resets = <&cpg 313>; 2513 iommus = <&ipmmu_ds1 33>; 2514 status = "disabled"; 2515 }; 2516 2517 sdhi2: mmc@ee140000 { 2518 compatible = "renesas,sdhi-r8a7796", 2519 "renesas,rcar-gen3-sdhi"; 2520 reg = <0 0xee140000 0 0x2000>; 2521 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; 2522 clocks = <&cpg CPG_MOD 312>, <&cpg CPG_CORE R8A7796_CLK_SD2H>; 2523 clock-names = "core", "clkh"; 2524 max-frequency = <200000000>; 2525 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2526 resets = <&cpg 312>; 2527 iommus = <&ipmmu_ds1 34>; 2528 status = "disabled"; 2529 }; 2530 2531 sdhi3: mmc@ee160000 { 2532 compatible = "renesas,sdhi-r8a7796", 2533 "renesas,rcar-gen3-sdhi"; 2534 reg = <0 0xee160000 0 0x2000>; 2535 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; 2536 clocks = <&cpg CPG_MOD 311>, <&cpg CPG_CORE R8A7796_CLK_SD3H>; 2537 clock-names = "core", "clkh"; 2538 max-frequency = <200000000>; 2539 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2540 resets = <&cpg 311>; 2541 iommus = <&ipmmu_ds1 35>; 2542 status = "disabled"; 2543 }; 2544 2545 rpc: spi@ee200000 { 2546 compatible = "renesas,r8a7796-rpc-if", 2547 "renesas,rcar-gen3-rpc-if"; 2548 reg = <0 0xee200000 0 0x200>, 2549 <0 0x08000000 0 0x04000000>, 2550 <0 0xee208000 0 0x100>; 2551 reg-names = "regs", "dirmap", "wbuf"; 2552 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; 2553 clocks = <&cpg CPG_MOD 917>; 2554 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2555 resets = <&cpg 917>; 2556 #address-cells = <1>; 2557 #size-cells = <0>; 2558 status = "disabled"; 2559 }; 2560 2561 gic: interrupt-controller@f1010000 { 2562 compatible = "arm,gic-400"; 2563 #interrupt-cells = <3>; 2564 #address-cells = <0>; 2565 interrupt-controller; 2566 reg = <0x0 0xf1010000 0 0x1000>, 2567 <0x0 0xf1020000 0 0x20000>, 2568 <0x0 0xf1040000 0 0x20000>, 2569 <0x0 0xf1060000 0 0x20000>; 2570 interrupts = <GIC_PPI 9 2571 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_HIGH)>; 2572 clocks = <&cpg CPG_MOD 408>; 2573 clock-names = "clk"; 2574 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2575 resets = <&cpg 408>; 2576 }; 2577 2578 gpu: gpu@fd000000 { 2579 compatible = "renesas,r8a7796-gpu", 2580 "img,img-gx6250", 2581 "img,img-rogue"; 2582 reg = <0 0xfd000000 0 0x40000>; 2583 interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>; 2584 clocks = <&cpg CPG_CORE R8A7796_CLK_ZG>, 2585 <&cpg CPG_CORE R8A7796_CLK_S2D1>, 2586 <&cpg CPG_MOD 112>; 2587 clock-names = "core", "mem", "sys"; 2588 power-domains = <&sysc R8A7796_PD_3DG_A>, 2589 <&sysc R8A7796_PD_3DG_B>; 2590 power-domain-names = "a", "b"; 2591 resets = <&cpg 112>; 2592 status = "disabled"; 2593 }; 2594 2595 pciec0: pcie@fe000000 { 2596 compatible = "renesas,pcie-r8a7796", 2597 "renesas,pcie-rcar-gen3"; 2598 reg = <0 0xfe000000 0 0x80000>; 2599 #address-cells = <3>; 2600 #size-cells = <2>; 2601 bus-range = <0x00 0xff>; 2602 device_type = "pci"; 2603 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>, 2604 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>, 2605 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>, 2606 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; 2607 /* Map all possible DDR/IOMMU as inbound ranges */ 2608 dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>; 2609 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, 2610 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, 2611 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; 2612 #interrupt-cells = <1>; 2613 interrupt-map-mask = <0 0 0 0>; 2614 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; 2615 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>; 2616 clock-names = "pcie", "pcie_bus"; 2617 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2618 resets = <&cpg 319>; 2619 iommu-map = <0 &ipmmu_hc 0 1>; 2620 iommu-map-mask = <0>; 2621 status = "disabled"; 2622 }; 2623 2624 pciec1: pcie@ee800000 { 2625 compatible = "renesas,pcie-r8a7796", 2626 "renesas,pcie-rcar-gen3"; 2627 reg = <0 0xee800000 0 0x80000>; 2628 #address-cells = <3>; 2629 #size-cells = <2>; 2630 bus-range = <0x00 0xff>; 2631 device_type = "pci"; 2632 ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000>, 2633 <0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000>, 2634 <0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000>, 2635 <0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>; 2636 /* Map all possible DDR/IOMMU as inbound ranges */ 2637 dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>; 2638 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>, 2639 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>, 2640 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; 2641 #interrupt-cells = <1>; 2642 interrupt-map-mask = <0 0 0 0>; 2643 interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; 2644 clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>; 2645 clock-names = "pcie", "pcie_bus"; 2646 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2647 resets = <&cpg 318>; 2648 iommu-map = <0 &ipmmu_hc 1 1>; 2649 iommu-map-mask = <0>; 2650 status = "disabled"; 2651 }; 2652 2653 imr-lx4@fe860000 { 2654 compatible = "renesas,r8a7796-imr-lx4", 2655 "renesas,imr-lx4"; 2656 reg = <0 0xfe860000 0 0x2000>; 2657 interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>; 2658 clocks = <&cpg CPG_MOD 823>; 2659 power-domains = <&sysc R8A7796_PD_A3VC>; 2660 resets = <&cpg 823>; 2661 }; 2662 2663 imr-lx4@fe870000 { 2664 compatible = "renesas,r8a7796-imr-lx4", 2665 "renesas,imr-lx4"; 2666 reg = <0 0xfe870000 0 0x2000>; 2667 interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>; 2668 clocks = <&cpg CPG_MOD 822>; 2669 power-domains = <&sysc R8A7796_PD_A3VC>; 2670 resets = <&cpg 822>; 2671 }; 2672 2673 fdp1@fe940000 { 2674 compatible = "renesas,fdp1"; 2675 reg = <0 0xfe940000 0 0x2400>; 2676 interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>; 2677 clocks = <&cpg CPG_MOD 119>; 2678 power-domains = <&sysc R8A7796_PD_A3VC>; 2679 resets = <&cpg 119>; 2680 renesas,fcp = <&fcpf0>; 2681 }; 2682 2683 fcpf0: fcp@fe950000 { 2684 compatible = "renesas,fcpf"; 2685 reg = <0 0xfe950000 0 0x200>; 2686 clocks = <&cpg CPG_MOD 615>; 2687 power-domains = <&sysc R8A7796_PD_A3VC>; 2688 resets = <&cpg 615>; 2689 iommus = <&ipmmu_vc0 16>; 2690 }; 2691 2692 fcpvb0: fcp@fe96f000 { 2693 compatible = "renesas,fcpv"; 2694 reg = <0 0xfe96f000 0 0x200>; 2695 clocks = <&cpg CPG_MOD 607>; 2696 power-domains = <&sysc R8A7796_PD_A3VC>; 2697 resets = <&cpg 607>; 2698 iommus = <&ipmmu_vi0 5>; 2699 }; 2700 2701 fcpvi0: fcp@fe9af000 { 2702 compatible = "renesas,fcpv"; 2703 reg = <0 0xfe9af000 0 0x200>; 2704 clocks = <&cpg CPG_MOD 611>; 2705 power-domains = <&sysc R8A7796_PD_A3VC>; 2706 resets = <&cpg 611>; 2707 iommus = <&ipmmu_vc0 19>; 2708 }; 2709 2710 fcpvd0: fcp@fea27000 { 2711 compatible = "renesas,fcpv"; 2712 reg = <0 0xfea27000 0 0x200>; 2713 clocks = <&cpg CPG_MOD 603>; 2714 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2715 resets = <&cpg 603>; 2716 iommus = <&ipmmu_vi0 8>; 2717 }; 2718 2719 fcpvd1: fcp@fea2f000 { 2720 compatible = "renesas,fcpv"; 2721 reg = <0 0xfea2f000 0 0x200>; 2722 clocks = <&cpg CPG_MOD 602>; 2723 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2724 resets = <&cpg 602>; 2725 iommus = <&ipmmu_vi0 9>; 2726 }; 2727 2728 fcpvd2: fcp@fea37000 { 2729 compatible = "renesas,fcpv"; 2730 reg = <0 0xfea37000 0 0x200>; 2731 clocks = <&cpg CPG_MOD 601>; 2732 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2733 resets = <&cpg 601>; 2734 iommus = <&ipmmu_vi0 10>; 2735 }; 2736 2737 vspb: vsp@fe960000 { 2738 compatible = "renesas,vsp2"; 2739 reg = <0 0xfe960000 0 0x8000>; 2740 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>; 2741 clocks = <&cpg CPG_MOD 626>; 2742 power-domains = <&sysc R8A7796_PD_A3VC>; 2743 resets = <&cpg 626>; 2744 2745 renesas,fcp = <&fcpvb0>; 2746 }; 2747 2748 vspd0: vsp@fea20000 { 2749 compatible = "renesas,vsp2"; 2750 reg = <0 0xfea20000 0 0x5000>; 2751 interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>; 2752 clocks = <&cpg CPG_MOD 623>; 2753 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2754 resets = <&cpg 623>; 2755 2756 renesas,fcp = <&fcpvd0>; 2757 }; 2758 2759 vspd1: vsp@fea28000 { 2760 compatible = "renesas,vsp2"; 2761 reg = <0 0xfea28000 0 0x5000>; 2762 interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>; 2763 clocks = <&cpg CPG_MOD 622>; 2764 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2765 resets = <&cpg 622>; 2766 2767 renesas,fcp = <&fcpvd1>; 2768 }; 2769 2770 vspd2: vsp@fea30000 { 2771 compatible = "renesas,vsp2"; 2772 reg = <0 0xfea30000 0 0x5000>; 2773 interrupts = <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>; 2774 clocks = <&cpg CPG_MOD 621>; 2775 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2776 resets = <&cpg 621>; 2777 2778 renesas,fcp = <&fcpvd2>; 2779 }; 2780 2781 vspi0: vsp@fe9a0000 { 2782 compatible = "renesas,vsp2"; 2783 reg = <0 0xfe9a0000 0 0x8000>; 2784 interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>; 2785 clocks = <&cpg CPG_MOD 631>; 2786 power-domains = <&sysc R8A7796_PD_A3VC>; 2787 resets = <&cpg 631>; 2788 2789 renesas,fcp = <&fcpvi0>; 2790 }; 2791 2792 cmm0: cmm@fea40000 { 2793 compatible = "renesas,r8a7796-cmm", 2794 "renesas,rcar-gen3-cmm"; 2795 reg = <0 0xfea40000 0 0x1000>; 2796 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2797 clocks = <&cpg CPG_MOD 711>; 2798 resets = <&cpg 711>; 2799 }; 2800 2801 cmm1: cmm@fea50000 { 2802 compatible = "renesas,r8a7796-cmm", 2803 "renesas,rcar-gen3-cmm"; 2804 reg = <0 0xfea50000 0 0x1000>; 2805 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2806 clocks = <&cpg CPG_MOD 710>; 2807 resets = <&cpg 710>; 2808 }; 2809 2810 cmm2: cmm@fea60000 { 2811 compatible = "renesas,r8a7796-cmm", 2812 "renesas,rcar-gen3-cmm"; 2813 reg = <0 0xfea60000 0 0x1000>; 2814 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2815 clocks = <&cpg CPG_MOD 709>; 2816 resets = <&cpg 709>; 2817 }; 2818 2819 csi20: csi2@fea80000 { 2820 compatible = "renesas,r8a7796-csi2"; 2821 reg = <0 0xfea80000 0 0x10000>; 2822 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; 2823 clocks = <&cpg CPG_MOD 714>; 2824 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2825 resets = <&cpg 714>; 2826 status = "disabled"; 2827 2828 ports { 2829 #address-cells = <1>; 2830 #size-cells = <0>; 2831 2832 port@0 { 2833 reg = <0>; 2834 }; 2835 2836 port@1 { 2837 #address-cells = <1>; 2838 #size-cells = <0>; 2839 2840 reg = <1>; 2841 2842 csi20vin0: endpoint@0 { 2843 reg = <0>; 2844 remote-endpoint = <&vin0csi20>; 2845 }; 2846 csi20vin1: endpoint@1 { 2847 reg = <1>; 2848 remote-endpoint = <&vin1csi20>; 2849 }; 2850 csi20vin2: endpoint@2 { 2851 reg = <2>; 2852 remote-endpoint = <&vin2csi20>; 2853 }; 2854 csi20vin3: endpoint@3 { 2855 reg = <3>; 2856 remote-endpoint = <&vin3csi20>; 2857 }; 2858 csi20vin4: endpoint@4 { 2859 reg = <4>; 2860 remote-endpoint = <&vin4csi20>; 2861 }; 2862 csi20vin5: endpoint@5 { 2863 reg = <5>; 2864 remote-endpoint = <&vin5csi20>; 2865 }; 2866 csi20vin6: endpoint@6 { 2867 reg = <6>; 2868 remote-endpoint = <&vin6csi20>; 2869 }; 2870 csi20vin7: endpoint@7 { 2871 reg = <7>; 2872 remote-endpoint = <&vin7csi20>; 2873 }; 2874 }; 2875 }; 2876 }; 2877 2878 csi40: csi2@feaa0000 { 2879 compatible = "renesas,r8a7796-csi2"; 2880 reg = <0 0xfeaa0000 0 0x10000>; 2881 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; 2882 clocks = <&cpg CPG_MOD 716>; 2883 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2884 resets = <&cpg 716>; 2885 status = "disabled"; 2886 2887 ports { 2888 #address-cells = <1>; 2889 #size-cells = <0>; 2890 2891 port@0 { 2892 reg = <0>; 2893 }; 2894 2895 port@1 { 2896 #address-cells = <1>; 2897 #size-cells = <0>; 2898 2899 reg = <1>; 2900 2901 csi40vin0: endpoint@0 { 2902 reg = <0>; 2903 remote-endpoint = <&vin0csi40>; 2904 }; 2905 csi40vin1: endpoint@1 { 2906 reg = <1>; 2907 remote-endpoint = <&vin1csi40>; 2908 }; 2909 csi40vin2: endpoint@2 { 2910 reg = <2>; 2911 remote-endpoint = <&vin2csi40>; 2912 }; 2913 csi40vin3: endpoint@3 { 2914 reg = <3>; 2915 remote-endpoint = <&vin3csi40>; 2916 }; 2917 csi40vin4: endpoint@4 { 2918 reg = <4>; 2919 remote-endpoint = <&vin4csi40>; 2920 }; 2921 csi40vin5: endpoint@5 { 2922 reg = <5>; 2923 remote-endpoint = <&vin5csi40>; 2924 }; 2925 csi40vin6: endpoint@6 { 2926 reg = <6>; 2927 remote-endpoint = <&vin6csi40>; 2928 }; 2929 csi40vin7: endpoint@7 { 2930 reg = <7>; 2931 remote-endpoint = <&vin7csi40>; 2932 }; 2933 }; 2934 2935 }; 2936 }; 2937 2938 hdmi0: hdmi@fead0000 { 2939 compatible = "renesas,r8a7796-hdmi", "renesas,rcar-gen3-hdmi"; 2940 reg = <0 0xfead0000 0 0x10000>; 2941 interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>; 2942 clocks = <&cpg CPG_MOD 729>, <&cpg CPG_CORE R8A7796_CLK_HDMI>; 2943 clock-names = "iahb", "isfr"; 2944 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2945 resets = <&cpg 729>; 2946 status = "disabled"; 2947 2948 ports { 2949 #address-cells = <1>; 2950 #size-cells = <0>; 2951 port@0 { 2952 reg = <0>; 2953 dw_hdmi0_in: endpoint { 2954 remote-endpoint = <&du_out_hdmi0>; 2955 }; 2956 }; 2957 port@1 { 2958 reg = <1>; 2959 }; 2960 port@2 { 2961 /* HDMI sound */ 2962 reg = <2>; 2963 }; 2964 }; 2965 }; 2966 2967 du: display@feb00000 { 2968 compatible = "renesas,du-r8a7796"; 2969 reg = <0 0xfeb00000 0 0x70000>; 2970 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, 2971 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>, 2972 <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>; 2973 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>, 2974 <&cpg CPG_MOD 722>; 2975 clock-names = "du.0", "du.1", "du.2"; 2976 resets = <&cpg 724>, <&cpg 722>; 2977 reset-names = "du.0", "du.2"; 2978 2979 renesas,cmms = <&cmm0>, <&cmm1>, <&cmm2>; 2980 renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd2 0>; 2981 2982 status = "disabled"; 2983 2984 ports { 2985 #address-cells = <1>; 2986 #size-cells = <0>; 2987 2988 port@0 { 2989 reg = <0>; 2990 }; 2991 port@1 { 2992 reg = <1>; 2993 du_out_hdmi0: endpoint { 2994 remote-endpoint = <&dw_hdmi0_in>; 2995 }; 2996 }; 2997 port@2 { 2998 reg = <2>; 2999 du_out_lvds0: endpoint { 3000 remote-endpoint = <&lvds0_in>; 3001 }; 3002 }; 3003 }; 3004 }; 3005 3006 lvds0: lvds@feb90000 { 3007 compatible = "renesas,r8a7796-lvds"; 3008 reg = <0 0xfeb90000 0 0x14>; 3009 clocks = <&cpg CPG_MOD 727>; 3010 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 3011 resets = <&cpg 727>; 3012 status = "disabled"; 3013 3014 ports { 3015 #address-cells = <1>; 3016 #size-cells = <0>; 3017 3018 port@0 { 3019 reg = <0>; 3020 lvds0_in: endpoint { 3021 remote-endpoint = <&du_out_lvds0>; 3022 }; 3023 }; 3024 port@1 { 3025 reg = <1>; 3026 }; 3027 }; 3028 }; 3029 3030 prr: chipid@fff00044 { 3031 compatible = "renesas,prr"; 3032 reg = <0 0xfff00044 0 4>; 3033 bootph-all; 3034 }; 3035 }; 3036 3037 thermal-zones { 3038 sensor1_thermal: sensor1-thermal { 3039 polling-delay-passive = <250>; 3040 polling-delay = <1000>; 3041 thermal-sensors = <&tsc 0>; 3042 sustainable-power = <3874>; 3043 3044 trips { 3045 sensor1_crit: sensor1-crit { 3046 temperature = <120000>; 3047 hysteresis = <1000>; 3048 type = "critical"; 3049 }; 3050 }; 3051 }; 3052 3053 sensor2_thermal: sensor2-thermal { 3054 polling-delay-passive = <250>; 3055 polling-delay = <1000>; 3056 thermal-sensors = <&tsc 1>; 3057 sustainable-power = <3874>; 3058 3059 trips { 3060 sensor2_crit: sensor2-crit { 3061 temperature = <120000>; 3062 hysteresis = <1000>; 3063 type = "critical"; 3064 }; 3065 }; 3066 }; 3067 3068 sensor3_thermal: sensor3-thermal { 3069 polling-delay-passive = <250>; 3070 polling-delay = <1000>; 3071 thermal-sensors = <&tsc 2>; 3072 sustainable-power = <3874>; 3073 3074 cooling-maps { 3075 map0 { 3076 trip = <&target>; 3077 cooling-device = <&a57_0 2 4>; 3078 contribution = <1024>; 3079 }; 3080 map1 { 3081 trip = <&target>; 3082 cooling-device = <&a53_0 0 2>; 3083 contribution = <1024>; 3084 }; 3085 }; 3086 trips { 3087 target: trip-point1 { 3088 temperature = <100000>; 3089 hysteresis = <1000>; 3090 type = "passive"; 3091 }; 3092 3093 sensor3_crit: sensor3-crit { 3094 temperature = <120000>; 3095 hysteresis = <1000>; 3096 type = "critical"; 3097 }; 3098 }; 3099 }; 3100 }; 3101 3102 timer { 3103 compatible = "arm,armv8-timer"; 3104 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>, 3105 <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>, 3106 <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>, 3107 <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>; 3108 interrupt-names = "sec-phys", "phys", "virt", "hyp-phys"; 3109 }; 3110 3111 /* External USB clocks - can be overridden by the board */ 3112 usb3s0_clk: usb3s0 { 3113 compatible = "fixed-clock"; 3114 #clock-cells = <0>; 3115 clock-frequency = <0>; 3116 }; 3117 3118 usb_extal_clk: usb_extal { 3119 compatible = "fixed-clock"; 3120 #clock-cells = <0>; 3121 clock-frequency = <0>; 3122 }; 3123};
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