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sc7280-idp-ec-h1.dtsi

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linux-6.19.14/arch/arm64/boot/dts/qcom/sc7280-idp-ec-h1.dtsi DEVICETREE
  1// SPDX-License-Identifier: BSD-3-Clause
  2/*
  3 * sc7280 EC/H1 over SPI (common between IDP2 and CRD)
  4 *
  5 * Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved.
  6 */
  7
  8ap_ec_spi: &spi10 {
  9	status = "okay";
 10
 11	pinctrl-0 = <&qup_spi10_data_clk>, <&qup_spi10_cs_gpio_init_high>, <&qup_spi10_cs_gpio>;
 12	cs-gpios = <&tlmm 43 GPIO_ACTIVE_LOW>;
 13
 14	cros_ec: ec@0 {
 15		compatible = "google,cros-ec-spi";
 16		reg = <0>;
 17		interrupt-parent = <&tlmm>;
 18		interrupts = <18 IRQ_TYPE_LEVEL_LOW>;
 19		pinctrl-names = "default";
 20		pinctrl-0 = <&ap_ec_int_l>;
 21		spi-max-frequency = <3000000>;
 22		wakeup-source;
 23
 24		cros_ec_pwm: pwm {
 25			compatible = "google,cros-ec-pwm";
 26			#pwm-cells = <1>;
 27		};
 28
 29		i2c_tunnel: i2c-tunnel {
 30			compatible = "google,cros-ec-i2c-tunnel";
 31			google,remote-bus = <0>;
 32			#address-cells = <1>;
 33			#size-cells = <0>;
 34		};
 35
 36		typec {
 37			compatible = "google,cros-ec-typec";
 38			#address-cells = <1>;
 39			#size-cells = <0>;
 40
 41			usb_c0: connector@0 {
 42				compatible = "usb-c-connector";
 43				reg = <0>;
 44				label = "left";
 45				power-role = "dual";
 46				data-role = "host";
 47				try-power-role = "source";
 48			};
 49
 50			usb_c1: connector@1 {
 51				compatible = "usb-c-connector";
 52				reg = <1>;
 53				label = "right";
 54				power-role = "dual";
 55				data-role = "host";
 56				try-power-role = "source";
 57			};
 58		};
 59	};
 60};
 61
 62#include <arm/cros-ec-keyboard.dtsi>
 63#include <arm/cros-ec-sbs.dtsi>
 64
 65ap_h1_spi: &spi14 {
 66	status = "okay";
 67
 68	pinctrl-0 = <&qup_spi14_data_clk>, <&qup_spi14_cs_gpio_init_high>, <&qup_spi14_cs_gpio>;
 69	cs-gpios = <&tlmm 59 GPIO_ACTIVE_LOW>;
 70
 71	cr50: tpm@0 {
 72		compatible = "google,cr50";
 73		reg = <0>;
 74		pinctrl-names = "default";
 75		pinctrl-0 = <&h1_ap_int_odl>;
 76		spi-max-frequency = <800000>;
 77		interrupt-parent = <&tlmm>;
 78		interrupts = <104 IRQ_TYPE_EDGE_RISING>;
 79	};
 80};
 81
 82&tlmm {
 83	ap_ec_int_l: ap-ec-int-l-state {
 84		pins = "gpio18";
 85		function = "gpio";
 86		bias-pull-up;
 87	};
 88
 89	h1_ap_int_odl: h1-ap-int-odl-state {
 90		pins = "gpio104";
 91		function = "gpio";
 92		bias-pull-up;
 93	};
 94
 95	qup_spi10_cs_gpio_init_high: qup-spi10-cs-gpio-init-high-state {
 96		pins = "gpio43";
 97		function = "gpio";
 98		output-high;
 99	};
100
101	qup_spi14_cs_gpio_init_high: qup-spi14-cs-gpio-init-high-state {
102		pins = "gpio59";
103		function = "gpio";
104		output-high;
105	};
106};
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