nuvoton-common-npcm8xx.dtsi

  1// SPDX-License-Identifier: GPL-2.0
  2// Copyright (c) 2021 Nuvoton Technology tomer.maimon@nuvoton.com
  3
  4#include <dt-bindings/clock/nuvoton,npcm845-clk.h>
  5#include <dt-bindings/interrupt-controller/arm-gic.h>
  6#include <dt-bindings/interrupt-controller/irq.h>
  7
  8/ {
  9	#address-cells = <2>;
 10	#size-cells = <2>;
 11	interrupt-parent = <&gic>;
 12
 13	soc {
 14		#address-cells = <2>;
 15		#size-cells = <2>;
 16		compatible = "simple-bus";
 17		interrupt-parent = <&gic>;
 18		ranges;
 19
 20		gcr: system-controller@f0800000 {
 21			compatible = "nuvoton,npcm845-gcr", "syscon";
 22			reg = <0x0 0xf0800000 0x0 0x1000>;
 23		};
 24
 25		gic: interrupt-controller@dfff9000 {
 26			compatible = "arm,gic-400";
 27			reg = <0x0 0xdfff9000 0x0 0x1000>,
 28			      <0x0 0xdfffa000 0x0 0x2000>,
 29			      <0x0 0xdfffc000 0x0 0x2000>,
 30			      <0x0 0xdfffe000 0x0 0x2000>;
 31			interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
 32			#interrupt-cells = <3>;
 33			interrupt-controller;
 34			#address-cells = <0>;
 35		};
 36	};
 37
 38	ahb {
 39		#address-cells = <2>;
 40		#size-cells = <2>;
 41		compatible = "simple-bus";
 42		interrupt-parent = <&gic>;
 43		ranges;
 44
 45		clk: rstc: reset-controller@f0801000 {
 46			compatible = "nuvoton,npcm845-reset";
 47			reg = <0x0 0xf0801000 0x0 0xC4>;
 48			nuvoton,sysgcr = <&gcr>;
 49			#reset-cells = <2>;
 50			clocks = <&refclk>;
 51			#clock-cells = <1>;
 52		};
 53
 54		apb {
 55			#address-cells = <1>;
 56			#size-cells = <1>;
 57			compatible = "simple-bus";
 58			interrupt-parent = <&gic>;
 59			ranges = <0x0 0x0 0xf0000000 0x00300000>,
 60				<0xfff00000 0x0 0xfff00000 0x00016000>;
 61
 62			peci: peci-controller@100000 {
 63				compatible = "nuvoton,npcm845-peci";
 64				reg = <0x100000 0x1000>;
 65				interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
 66				clocks = <&clk NPCM8XX_CLK_APB3>;
 67				cmd-timeout-ms = <1000>;
 68				status = "disabled";
 69			};
 70
 71			timer0: timer@8000 {
 72				compatible = "nuvoton,npcm845-timer";
 73				interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
 74				reg = <0x8000 0x1C>;
 75				clocks = <&refclk>;
 76				clock-names = "refclk";
 77			};
 78
 79			serial0: serial@0 {
 80				compatible = "nuvoton,npcm845-uart", "nuvoton,npcm750-uart";
 81				reg = <0x0 0x1000>;
 82				clocks = <&clk NPCM8XX_CLK_UART>;
 83				interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>;
 84				reg-shift = <2>;
 85				status = "disabled";
 86			};
 87
 88			serial1: serial@1000 {
 89				compatible = "nuvoton,npcm845-uart", "nuvoton,npcm750-uart";
 90				reg = <0x1000 0x1000>;
 91				clocks = <&clk NPCM8XX_CLK_UART>;
 92				interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>;
 93				reg-shift = <2>;
 94				status = "disabled";
 95			};
 96
 97			serial2: serial@2000 {
 98				compatible = "nuvoton,npcm845-uart", "nuvoton,npcm750-uart";
 99				reg = <0x2000 0x1000>;
100				clocks = <&clk NPCM8XX_CLK_UART>;
101				interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH>;
102				reg-shift = <2>;
103				status = "disabled";
104			};
105
106			serial3: serial@3000 {
107				compatible = "nuvoton,npcm845-uart", "nuvoton,npcm750-uart";
108				reg = <0x3000 0x1000>;
109				clocks = <&clk NPCM8XX_CLK_UART>;
110				interrupts = <GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH>;
111				reg-shift = <2>;
112				status = "disabled";
113			};
114
115			serial4: serial@4000 {
116				compatible = "nuvoton,npcm845-uart", "nuvoton,npcm750-uart";
117				reg = <0x4000 0x1000>;
118				clocks = <&clk NPCM8XX_CLK_UART>;
119				interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>;
120				reg-shift = <2>;
121				status = "disabled";
122			};
123
124			serial5: serial@5000 {
125				compatible = "nuvoton,npcm845-uart", "nuvoton,npcm750-uart";
126				reg = <0x5000 0x1000>;
127				clocks = <&clk NPCM8XX_CLK_UART>;
128				interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
129				reg-shift = <2>;
130				status = "disabled";
131			};
132
133			serial6: serial@6000 {
134				compatible = "nuvoton,npcm845-uart", "nuvoton,npcm750-uart";
135				reg = <0x6000 0x1000>;
136				clocks = <&clk NPCM8XX_CLK_UART>;
137				interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>;
138				reg-shift = <2>;
139				status = "disabled";
140			};
141
142			watchdog0: watchdog@801c {
143				compatible = "nuvoton,npcm845-wdt", "nuvoton,npcm750-wdt";
144				interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
145				reg = <0x801c 0x4>;
146				status = "disabled";
147				clocks = <&refclk>;
148				syscon = <&gcr>;
149			};
150
151			watchdog1: watchdog@901c {
152				compatible = "nuvoton,npcm845-wdt", "nuvoton,npcm750-wdt";
153				interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
154				reg = <0x901c 0x4>;
155				status = "disabled";
156				clocks = <&refclk>;
157				syscon = <&gcr>;
158			};
159
160			watchdog2: watchdog@a01c {
161				compatible = "nuvoton,npcm845-wdt", "nuvoton,npcm750-wdt";
162				interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
163				reg = <0xa01c 0x4>;
164				status = "disabled";
165				clocks = <&refclk>;
166				syscon = <&gcr>;
167			};
168		};
169	};
170
171	pinctrl: pinctrl@f0010000 {
172		compatible = "nuvoton,npcm845-pinctrl";
173		ranges = <0x0 0x0 0xf0010000 0x8000>;
174		#address-cells = <1>;
175		#size-cells = <1>;
176		nuvoton,sysgcr = <&gcr>;
177		status = "okay";
178		gpio0: gpio@f0010000 {
179			gpio-controller;
180			#gpio-cells = <2>;
181			reg = <0x0 0xB0>;
182			interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
183			gpio-ranges = <&pinctrl 0 0 32>;
184		};
185		gpio1: gpio@f0011000 {
186			gpio-controller;
187			#gpio-cells = <2>;
188			reg = <0x1000 0xB0>;
189			interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
190			gpio-ranges = <&pinctrl 0 32 32>;
191		};
192		gpio2: gpio@f0012000 {
193			gpio-controller;
194			#gpio-cells = <2>;
195			reg = <0x2000 0xB0>;
196			interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
197			gpio-ranges = <&pinctrl 0 64 32>;
198		};
199		gpio3: gpio@f0013000 {
200			gpio-controller;
201			#gpio-cells = <2>;
202			reg = <0x3000 0xB0>;
203			interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
204			gpio-ranges = <&pinctrl 0 96 32>;
205		};
206		gpio4: gpio@f0014000 {
207			gpio-controller;
208			#gpio-cells = <2>;
209			reg = <0x4000 0xB0>;
210			interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
211			gpio-ranges = <&pinctrl 0 128 32>;
212		};
213		gpio5: gpio@f0015000 {
214			gpio-controller;
215			#gpio-cells = <2>;
216			reg = <0x5000 0xB0>;
217			interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
218			gpio-ranges = <&pinctrl 0 160 32>;
219		};
220		gpio6: gpio@f0016000 {
221			gpio-controller;
222			#gpio-cells = <2>;
223			reg = <0x6000 0xB0>;
224			interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
225			gpio-ranges = <&pinctrl 0 192 32>;
226		};
227		gpio7: gpio@f0017000 {
228			gpio-controller;
229			#gpio-cells = <2>;
230			reg = <0x7000 0xB0>;
231			interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
232			gpio-ranges = <&pinctrl 0 224 32>;
233		};
234
235		iox1_pins: iox1-mux {
236			groups = "iox1";
237			function = "iox1";
238		};
239		iox2_pins: iox2-mux {
240			groups = "iox2";
241			function = "iox2";
242		};
243		smb1d_pins: smb1d-mux {
244			groups = "smb1d";
245			function = "smb1d";
246		};
247		smb2d_pins: smb2d-mux {
248			groups = "smb2d";
249			function = "smb2d";
250		};
251		lkgpo1_pins: lkgpo1-mux {
252			groups = "lkgpo1";
253			function = "lkgpo1";
254		};
255		lkgpo2_pins: lkgpo2-mux {
256			groups = "lkgpo2";
257			function = "lkgpo2";
258		};
259		ioxh_pins: ioxh-mux {
260			groups = "ioxh";
261			function = "ioxh";
262		};
263		gspi_pins: gspi-mux {
264			groups = "gspi";
265			function = "gspi";
266		};
267		smb5b_pins: smb5b-mux {
268			groups = "smb5b";
269			function = "smb5b";
270		};
271		smb5c_pins: smb5c-mux {
272			groups = "smb5c";
273			function = "smb5c";
274		};
275		lkgpo0_pins: lkgpo0-mux {
276			groups = "lkgpo0";
277			function = "lkgpo0";
278		};
279		pspi_pins: pspi-mux {
280			groups = "pspi";
281			function = "pspi";
282		};
283		jm1_pins: jm1-mux {
284			groups = "jm1";
285			function = "jm1";
286		};
287		jm2_pins: jm2-mux {
288			groups = "jm2";
289			function = "jm2";
290		};
291		smb4b_pins: smb4b-mux {
292			groups = "smb4b";
293			function = "smb4b";
294		};
295		smb4c_pins: smb4c-mux {
296			groups = "smb4c";
297			function = "smb4c";
298		};
299		smb15_pins: smb15-mux {
300			groups = "smb15";
301			function = "smb15";
302		};
303		smb16_pins: smb16-mux {
304			groups = "smb16";
305			function = "smb16";
306		};
307		smb17_pins: smb17-mux {
308			groups = "smb17";
309			function = "smb17";
310		};
311		smb18_pins: smb18-mux {
312			groups = "smb18";
313			function = "smb18";
314		};
315		smb19_pins: smb19-mux {
316			groups = "smb19";
317			function = "smb19";
318		};
319		smb20_pins: smb20-mux {
320			groups = "smb20";
321			function = "smb20";
322		};
323		smb21_pins: smb21-mux {
324			groups = "smb21";
325			function = "smb21";
326		};
327		smb22_pins: smb22-mux {
328			groups = "smb22";
329			function = "smb22";
330		};
331		smb23_pins: smb23-mux {
332			groups = "smb23";
333			function = "smb23";
334		};
335		smb23b_pins: smb23b-mux {
336			groups = "smb23b";
337			function = "smb23b";
338		};
339		smb4d_pins: smb4d-mux {
340			groups = "smb4d";
341			function = "smb4d";
342		};
343		smb14_pins: smb14-mux {
344			groups = "smb14";
345			function = "smb14";
346		};
347		smb5_pins: smb5-mux {
348			groups = "smb5";
349			function = "smb5";
350		};
351		smb4_pins: smb4-mux {
352			groups = "smb4";
353			function = "smb4";
354		};
355		smb3_pins: smb3-mux {
356			groups = "smb3";
357			function = "smb3";
358		};
359		spi0cs1_pins: spi0cs1-mux {
360			groups = "spi0cs1";
361			function = "spi0cs1";
362		};
363		spi1cs0_pins: spi1cs0-mux {
364			groups = "spi1cs0";
365			function = "spi1cs0";
366		};
367		spi1cs1_pins: spi1cs1-mux {
368			groups = "spi1cs1";
369			function = "spi1cs1";
370		};
371		spi1cs2_pins: spi1cs2-mux {
372			groups = "spi1cs2";
373			function = "spi1cs2";
374		};
375		spi1cs3_pins: spi1cs3-mux {
376			groups = "spi1cs3";
377			function = "spi1cs3";
378		};
379		smb3c_pins: smb3c-mux {
380			groups = "smb3c";
381			function = "smb3c";
382		};
383		smb3b_pins: smb3b-mux {
384			groups = "smb3b";
385			function = "smb3b";
386		};
387		bmcuart0a_pins: bmcuart0a-mux {
388			groups = "bmcuart0a";
389			function = "bmcuart0a";
390		};
391		uart1_pins: uart1-mux {
392			groups = "uart1";
393			function = "uart1";
394		};
395		jtag2_pins: jtag2-mux {
396			groups = "jtag2";
397			function = "jtag2";
398		};
399		bmcuart1_pins: bmcuart1-mux {
400			groups = "bmcuart1";
401			function = "bmcuart1";
402		};
403		uart2_pins: uart2-mux {
404			groups = "uart2";
405			function = "uart2";
406		};
407		bmcuart0b_pins: bmcuart0b-mux {
408			groups = "bmcuart0b";
409			function = "bmcuart0b";
410		};
411		r1err_pins: r1err-mux {
412			groups = "r1err";
413			function = "r1err";
414		};
415		r1md_pins: r1md-mux {
416			groups = "r1md";
417			function = "r1md";
418		};
419		r1oen_pins: r1oen-mux {
420			groups = "r1oen";
421			function = "r1oen";
422		};
423		r2oen_pins: r2oen-mux {
424			groups = "r2oen";
425			function = "r2oen";
426		};
427		rmii3_pins: rmii3-mux {
428			groups = "rmii3";
429			function = "rmii3";
430		};
431		r3oen_pins: r3oen-mux {
432			groups = "r3oen";
433			function = "r3oen";
434		};
435		smb3d_pins: smb3d-mux {
436			groups = "smb3d";
437			function = "smb3d";
438		};
439		fanin0_pins: fanin0-mux {
440			groups = "fanin0";
441			function = "fanin0";
442		};
443		fanin1_pins: fanin1-mux {
444			groups = "fanin1";
445			function = "fanin1";
446		};
447		fanin2_pins: fanin2-mux {
448			groups = "fanin2";
449			function = "fanin2";
450		};
451		fanin3_pins: fanin3-mux {
452			groups = "fanin3";
453			function = "fanin3";
454		};
455		fanin4_pins: fanin4-mux {
456			groups = "fanin4";
457			function = "fanin4";
458		};
459		fanin5_pins: fanin5-mux {
460			groups = "fanin5";
461			function = "fanin5";
462		};
463		fanin6_pins: fanin6-mux {
464			groups = "fanin6";
465			function = "fanin6";
466		};
467		fanin7_pins: fanin7-mux {
468			groups = "fanin7";
469			function = "fanin7";
470		};
471		fanin8_pins: fanin8-mux {
472			groups = "fanin8";
473			function = "fanin8";
474		};
475		fanin9_pins: fanin9-mux {
476			groups = "fanin9";
477			function = "fanin9";
478		};
479		fanin10_pins: fanin10-mux {
480			groups = "fanin10";
481			function = "fanin10";
482		};
483		fanin11_pins: fanin11-mux {
484			groups = "fanin11";
485			function = "fanin11";
486		};
487		fanin12_pins: fanin12-mux {
488			groups = "fanin12";
489			function = "fanin12";
490		};
491		fanin13_pins: fanin13-mux {
492			groups = "fanin13";
493			function = "fanin13";
494		};
495		fanin14_pins: fanin14-mux {
496			groups = "fanin14";
497			function = "fanin14";
498		};
499		fanin15_pins: fanin15-mux {
500			groups = "fanin15";
501			function = "fanin15";
502		};
503		pwm0_pins: pwm0-mux {
504			groups = "pwm0";
505			function = "pwm0";
506		};
507		pwm1_pins: pwm1-mux {
508			groups = "pwm1";
509			function = "pwm1";
510		};
511		pwm2_pins: pwm2-mux {
512			groups = "pwm2";
513			function = "pwm2";
514		};
515		pwm3_pins: pwm3-mux {
516			groups = "pwm3";
517			function = "pwm3";
518		};
519		r2_pins: r2-mux {
520			groups = "r2";
521			function = "r2";
522		};
523		r2err_pins: r2err-mux {
524			groups = "r2err";
525			function = "r2err";
526		};
527		r2md_pins: r2md-mux {
528			groups = "r2md";
529			function = "r2md";
530		};
531		r3rxer_pins: r3rxer-mux {
532			groups = "r3rxer";
533			function = "r3rxer";
534		};
535		ga20kbc_pins: ga20kbc-mux {
536			groups = "ga20kbc";
537			function = "ga20kbc";
538		};
539		smb5d_pins: smb5d-mux {
540			groups = "smb5d";
541			function = "smb5d";
542		};
543		lpc_pins: lpc-mux {
544			groups = "lpc";
545			function = "lpc";
546		};
547		espi_pins: espi-mux {
548			groups = "espi";
549			function = "espi";
550		};
551		sg1mdio_pins: sg1mdio-mux {
552			groups = "sg1mdio";
553			function = "sg1mdio";
554		};
555		rg2_pins: rg2-mux {
556			groups = "rg2";
557			function = "rg2";
558		};
559		ddr_pins: ddr-mux {
560			groups = "ddr";
561			function = "ddr";
562		};
563		i3c0_pins: i3c0-mux {
564			groups = "i3c0";
565			function = "i3c0";
566		};
567		i3c1_pins: i3c1-mux {
568			groups = "i3c1";
569			function = "i3c1";
570		};
571		i3c2_pins: i3c2-mux {
572			groups = "i3c2";
573			function = "i3c2";
574		};
575		i3c3_pins: i3c3-mux {
576			groups = "i3c3";
577			function = "i3c3";
578		};
579		i3c4_pins: i3c4-mux {
580			groups = "i3c4";
581			function = "i3c4";
582		};
583		i3c5_pins: i3c5-mux {
584			groups = "i3c5";
585			function = "i3c5";
586		};
587		smb0_pins: smb0-mux {
588			groups = "smb0";
589			function = "smb0";
590		};
591		smb1_pins: smb1-mux {
592			groups = "smb1";
593			function = "smb1";
594		};
595		smb2_pins: smb2-mux {
596			groups = "smb2";
597			function = "smb2";
598		};
599		smb2c_pins: smb2c-mux {
600			groups = "smb2c";
601			function = "smb2c";
602		};
603		smb2b_pins: smb2b-mux {
604			groups = "smb2b";
605			function = "smb2b";
606		};
607		smb1c_pins: smb1c-mux {
608			groups = "smb1c";
609			function = "smb1c";
610		};
611		smb1b_pins: smb1b-mux {
612			groups = "smb1b";
613			function = "smb1b";
614		};
615		smb8_pins: smb8-mux {
616			groups = "smb8";
617			function = "smb8";
618		};
619		smb9_pins: smb9-mux {
620			groups = "smb9";
621			function = "smb9";
622		};
623		smb10_pins: smb10-mux {
624			groups = "smb10";
625			function = "smb10";
626		};
627		smb11_pins: smb11-mux {
628			groups = "smb11";
629			function = "smb11";
630		};
631		sd1_pins: sd1-mux {
632			groups = "sd1";
633			function = "sd1";
634		};
635		sd1pwr_pins: sd1pwr-mux {
636			groups = "sd1pwr";
637			function = "sd1pwr";
638		};
639		pwm4_pins: pwm4-mux {
640			groups = "pwm4";
641			function = "pwm4";
642		};
643		pwm5_pins: pwm5-mux {
644			groups = "pwm5";
645			function = "pwm5";
646		};
647		pwm6_pins: pwm6-mux {
648			groups = "pwm6";
649			function = "pwm6";
650		};
651		pwm7_pins: pwm7-mux {
652			groups = "pwm7";
653			function = "pwm7";
654		};
655		pwm8_pins: pwm8-mux {
656			groups = "pwm8";
657			function = "pwm8";
658		};
659		pwm9_pins: pwm9-mux {
660			groups = "pwm9";
661			function = "pwm9";
662		};
663		pwm10_pins: pwm10-mux {
664			groups = "pwm10";
665			function = "pwm10";
666		};
667		pwm11_pins: pwm11-mux {
668			groups = "pwm11";
669			function = "pwm11";
670		};
671		mmc8_pins: mmc8-mux {
672			groups = "mmc8";
673			function = "mmc8";
674		};
675		mmc_pins: mmc-mux {
676			groups = "mmc";
677			function = "mmc";
678		};
679		mmcwp_pins: mmcwp-mux {
680			groups = "mmcwp";
681			function = "mmcwp";
682		};
683		mmccd_pins: mmccd-mux {
684			groups = "mmccd";
685			function = "mmccd";
686		};
687		mmcrst_pins: mmcrst-mux {
688			groups = "mmcrst";
689			function = "mmcrst";
690		};
691		clkout_pins: clkout-mux {
692			groups = "clkout";
693			function = "clkout";
694		};
695		serirq_pins: serirq-mux {
696			groups = "serirq";
697			function = "serirq";
698		};
699		scipme_pins: scipme-mux {
700			groups = "scipme";
701			function = "scipme";
702		};
703		smb6_pins: smb6-mux {
704			groups = "smb6";
705			function = "smb6";
706		};
707		smb6b_pins: smb6b-mux {
708			groups = "smb6b";
709			function = "smb6b";
710		};
711		smb6c_pins: smb6c-mux {
712			groups = "smb6c";
713			function = "smb6c";
714		};
715		smb6d_pins: smb6d-mux {
716			groups = "smb6d";
717			function = "smb6d";
718		};
719		smb7_pins: smb7-mux {
720			groups = "smb7";
721			function = "smb7";
722		};
723		smb7b_pins: smb7b-mux {
724			groups = "smb7b";
725			function = "smb7b";
726		};
727		smb7c_pins: smb7c-mux {
728			groups = "smb7c";
729			function = "smb7c";
730		};
731		smb7d_pins: smb7d-mux {
732			groups = "smb7d";
733			function = "smb7d";
734		};
735		spi1_pins: spi1-mux {
736			groups = "spi1";
737			function = "spi1";
738		};
739		faninx_pins: faninx-mux {
740			groups = "faninx";
741			function = "faninx";
742		};
743		r1_pins: r1-mux {
744			groups = "r1";
745			function = "r1";
746		};
747		spi3_pins: spi3-mux {
748			groups = "spi3";
749			function = "spi3";
750		};
751		spi3cs1_pins: spi3cs1-mux {
752			groups = "spi3cs1";
753			function = "spi3cs1";
754		};
755		spi3quad_pins: spi3quad-mux {
756			groups = "spi3quad";
757			function = "spi3quad";
758		};
759		spi3cs2_pins: spi3cs2-mux {
760			groups = "spi3cs2";
761			function = "spi3cs2";
762		};
763		spi3cs3_pins: spi3cs3-mux {
764			groups = "spi3cs3";
765			function = "spi3cs3";
766		};
767		nprd_smi_pins: nprd-smi-mux {
768			groups = "nprd_smi";
769			function = "nprd_smi";
770		};
771		smi_pins: smi-mux {
772			groups = "smi";
773			function = "smi";
774		};
775		smb0b_pins: smb0b-mux {
776			groups = "smb0b";
777			function = "smb0b";
778		};
779		smb0c_pins: smb0c-mux {
780			groups = "smb0c";
781			function = "smb0c";
782		};
783		smb0den_pins: smb0den-mux {
784			groups = "smb0den";
785			function = "smb0den";
786		};
787		smb0d_pins: smb0d-mux {
788			groups = "smb0d";
789			function = "smb0d";
790		};
791		ddc_pins: ddc-mux {
792			groups = "ddc";
793			function = "ddc";
794		};
795		rg2mdio_pins: rg2mdio-mux {
796			groups = "rg2mdio";
797			function = "rg2mdio";
798		};
799		wdog1_pins: wdog1-mux {
800			groups = "wdog1";
801			function = "wdog1";
802		};
803		wdog2_pins: wdog2-mux {
804			groups = "wdog2";
805			function = "wdog2";
806		};
807		smb12_pins: smb12-mux {
808			groups = "smb12";
809			function = "smb12";
810		};
811		smb13_pins: smb13-mux {
812			groups = "smb13";
813			function = "smb13";
814		};
815		spix_pins: spix-mux {
816			groups = "spix";
817			function = "spix";
818		};
819		spixcs1_pins: spixcs1-mux {
820			groups = "spixcs1";
821			function = "spixcs1";
822		};
823		clkreq_pins: clkreq-mux {
824			groups = "clkreq";
825			function = "clkreq";
826		};
827		hgpio0_pins: hgpio0-mux {
828			groups = "hgpio0";
829			function = "hgpio0";
830		};
831		hgpio1_pins: hgpio1-mux {
832			groups = "hgpio1";
833			function = "hgpio1";
834		};
835		hgpio2_pins: hgpio2-mux {
836			groups = "hgpio2";
837			function = "hgpio2";
838		};
839		hgpio3_pins: hgpio3-mux {
840			groups = "hgpio3";
841			function = "hgpio3";
842		};
843		hgpio4_pins: hgpio4-mux {
844			groups = "hgpio4";
845			function = "hgpio4";
846		};
847		hgpio5_pins: hgpio5-mux {
848			groups = "hgpio5";
849			function = "hgpio5";
850		};
851		hgpio6_pins: hgpio6-mux {
852			groups = "hgpio6";
853			function = "hgpio6";
854		};
855		hgpio7_pins: hgpio7-mux {
856			groups = "hgpio7";
857			function = "hgpio7";
858		};
859		bu4_pins: bu4-mux {
860			groups = "bu4";
861			function = "bu4";
862		};
863		bu4b_pins: bu4b-mux {
864			groups = "bu4b";
865			function = "bu4b";
866		};
867		bu5_pins: bu5-mux {
868			groups = "bu5";
869			function = "bu5";
870		};
871		bu5b_pins: bu5b-mux {
872			groups = "bu5b";
873			function = "bu5b";
874		};
875		bu6_pins: bu6-mux {
876			groups = "bu6";
877			function = "bu6";
878		};
879		gpo187_pins: gpo187-mux {
880			groups = "gpo187";
881			function = "gpo187";
882		};
883	};
884};