mt8390-grinn-genio-som.dtsi

  1// SPDX-License-Identifier: (GPL-2.0 OR MIT)
  2/*
  3 * Copyright (C) 2025 Grinn sp. z o.o.
  4 * Author: Mateusz Koza <mateusz.koza@grinn-global.com>
  5 */
  6
  7#include "mt6359.dtsi"
  8#include <dt-bindings/input/input.h>
  9
 10/ {
 11	aliases {
 12		i2c1 = &i2c1;
 13		mmc0 = &mmc0;
 14	};
 15};
 16
 17&i2c1 {
 18	pinctrl-names = "default";
 19	pinctrl-0 = <&i2c1_pins>;
 20	clock-frequency = <400000>;
 21	status = "okay";
 22};
 23
 24&mfg0 {
 25	domain-supply = <&mt6359_vproc2_buck_reg>;
 26};
 27
 28&mfg1 {
 29	domain-supply = <&mt6359_vsram_others_ldo_reg>;
 30};
 31
 32&mmc0 {
 33	status = "okay";
 34	pinctrl-names = "default", "state_uhs";
 35	pinctrl-0 = <&mmc0_default_pins>;
 36	pinctrl-1 = <&mmc0_uhs_pins>;
 37	bus-width = <8>;
 38	max-frequency = <200000000>;
 39	cap-mmc-highspeed;
 40	mmc-hs200-1_8v;
 41	mmc-hs400-1_8v;
 42	supports-cqe;
 43	cap-mmc-hw-reset;
 44	no-sdio;
 45	no-sd;
 46	hs400-ds-delay = <0x1481b>;
 47	vmmc-supply = <&mt6359_vemc_1_ldo_reg>;
 48	vqmmc-supply = <&mt6359_vufs_ldo_reg>;
 49	non-removable;
 50};
 51
 52&mt6359_vbbck_ldo_reg {
 53	regulator-always-on;
 54};
 55
 56&mt6359_vcn18_ldo_reg {
 57	regulator-name = "vcn18_pmu";
 58	regulator-always-on;
 59};
 60
 61&mt6359_vcn33_2_bt_ldo_reg {
 62	regulator-name = "vcn33_2_pmu";
 63	regulator-always-on;
 64};
 65
 66&mt6359_vcore_buck_reg {
 67	regulator-name = "dvdd_proc_l";
 68	regulator-always-on;
 69};
 70
 71&mt6359_vgpu11_buck_reg {
 72	regulator-name = "dvdd_core";
 73	regulator-always-on;
 74};
 75
 76&mt6359_vpa_buck_reg {
 77	regulator-name = "vpa_pmu";
 78	regulator-max-microvolt = <3100000>;
 79};
 80
 81&mt6359_vproc2_buck_reg {
 82	/* The name "vgpu" is required by mtk-regulator-coupler */
 83	regulator-name = "vgpu";
 84	regulator-min-microvolt = <550000>;
 85	regulator-max-microvolt = <800000>;
 86	regulator-coupled-with = <&mt6359_vsram_others_ldo_reg>;
 87	regulator-coupled-max-spread = <6250>;
 88};
 89
 90&mt6359_vpu_buck_reg {
 91	regulator-name = "dvdd_adsp";
 92	regulator-always-on;
 93};
 94
 95&mt6359_vrf12_ldo_reg {
 96	regulator-name = "va12_abb2_pmu";
 97	regulator-always-on;
 98};
 99
100&mt6359_vsim1_ldo_reg {
101	regulator-name = "vsim1_pmu";
102	regulator-enable-ramp-delay = <480>;
103};
104
105&mt6359_vsram_others_ldo_reg {
106	/* The name "vsram_gpu" is required by mtk-regulator-coupler */
107	regulator-name = "vsram_gpu";
108	regulator-min-microvolt = <750000>;
109	regulator-max-microvolt = <800000>;
110	regulator-coupled-with = <&mt6359_vproc2_buck_reg>;
111	regulator-coupled-max-spread = <6250>;
112};
113
114&mt6359_vufs_ldo_reg {
115	regulator-name = "vufs18_pmu";
116	regulator-always-on;
117};
118
119&pio {
120
121	i2c1_pins: i2c1-pins {
122		pins {
123			pinmux = <PINMUX_GPIO58__FUNC_B1_SDA1>,
124				 <PINMUX_GPIO57__FUNC_B1_SCL1>;
125			bias-pull-up = <MTK_PULL_SET_RSEL_011>;
126			drive-strength-microamp = <1000>;
127		};
128	};
129
130	mmc0_default_pins: mmc0-default-pins {
131		pins-clk {
132			pinmux = <PINMUX_GPIO157__FUNC_B1_MSDC0_CLK>;
133			drive-strength = <6>;
134			bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
135		};
136
137		pins-cmd-dat {
138			pinmux = <PINMUX_GPIO161__FUNC_B1_MSDC0_DAT0>,
139				 <PINMUX_GPIO160__FUNC_B1_MSDC0_DAT1>,
140				 <PINMUX_GPIO159__FUNC_B1_MSDC0_DAT2>,
141				 <PINMUX_GPIO158__FUNC_B1_MSDC0_DAT3>,
142				 <PINMUX_GPIO154__FUNC_B1_MSDC0_DAT4>,
143				 <PINMUX_GPIO153__FUNC_B1_MSDC0_DAT5>,
144				 <PINMUX_GPIO152__FUNC_B1_MSDC0_DAT6>,
145				 <PINMUX_GPIO151__FUNC_B1_MSDC0_DAT7>,
146				 <PINMUX_GPIO156__FUNC_B1_MSDC0_CMD>;
147			input-enable;
148			drive-strength = <6>;
149			bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
150		};
151
152		pins-rst {
153			pinmux = <PINMUX_GPIO155__FUNC_O_MSDC0_RSTB>;
154			drive-strength = <6>;
155			bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
156		};
157	};
158
159	mmc0_uhs_pins: mmc0-uhs-pins {
160		pins-clk {
161			pinmux = <PINMUX_GPIO157__FUNC_B1_MSDC0_CLK>;
162			drive-strength = <8>;
163			bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
164		};
165
166		pins-cmd-dat {
167			pinmux = <PINMUX_GPIO161__FUNC_B1_MSDC0_DAT0>,
168				 <PINMUX_GPIO160__FUNC_B1_MSDC0_DAT1>,
169				 <PINMUX_GPIO159__FUNC_B1_MSDC0_DAT2>,
170				 <PINMUX_GPIO158__FUNC_B1_MSDC0_DAT3>,
171				 <PINMUX_GPIO154__FUNC_B1_MSDC0_DAT4>,
172				 <PINMUX_GPIO153__FUNC_B1_MSDC0_DAT5>,
173				 <PINMUX_GPIO152__FUNC_B1_MSDC0_DAT6>,
174				 <PINMUX_GPIO151__FUNC_B1_MSDC0_DAT7>,
175				 <PINMUX_GPIO156__FUNC_B1_MSDC0_CMD>;
176			input-enable;
177			drive-strength = <8>;
178			bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
179		};
180
181		pins-ds {
182			pinmux = <PINMUX_GPIO162__FUNC_B0_MSDC0_DSL>;
183			drive-strength = <8>;
184			bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
185		};
186
187		pins-rst {
188			pinmux = <PINMUX_GPIO155__FUNC_O_MSDC0_RSTB>;
189			drive-strength = <8>;
190			bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
191		};
192	};
193};
194
195&pmic {
196	interrupt-parent = <&pio>;
197	interrupts = <222 IRQ_TYPE_LEVEL_HIGH>;
198	interrupts-extended = <&pio 222 IRQ_TYPE_LEVEL_HIGH>;
199
200	keys {
201		compatible = "mediatek,mt6359-keys";
202		mediatek,long-press-mode = <1>;
203		power-off-time-sec = <0>;
204
205		power-key {
206			linux,keycodes = <KEY_POWER>;
207			wakeup-source;
208		};
209	};
210};