mt8183-kukui-krane.dtsi

  1// SPDX-License-Identifier: (GPL-2.0 OR MIT)
  2/*
  3 * Copyright 2019 Google LLC
  4 */
  5
  6#include "mt8183-kukui.dtsi"
  7#include "mt8183-kukui-audio-max98357a.dtsi"
  8
  9/ {
 10	ppvarn_lcd: ppvarn-lcd {
 11		compatible = "regulator-fixed";
 12		regulator-name = "ppvarn_lcd";
 13		pinctrl-names = "default";
 14		pinctrl-0 = <&ppvarn_lcd_en>;
 15
 16		enable-active-high;
 17
 18		gpio = <&pio 66 GPIO_ACTIVE_HIGH>;
 19	};
 20
 21	ppvarp_lcd: ppvarp-lcd {
 22		compatible = "regulator-fixed";
 23		regulator-name = "ppvarp_lcd";
 24		pinctrl-names = "default";
 25		pinctrl-0 = <&ppvarp_lcd_en>;
 26
 27		enable-active-high;
 28
 29		gpio = <&pio 166 GPIO_ACTIVE_HIGH>;
 30	};
 31
 32	pp1800_lcd: pp1800-lcd {
 33		compatible = "regulator-fixed";
 34		regulator-name = "pp1800_lcd";
 35		pinctrl-names = "default";
 36		pinctrl-0 = <&pp1800_lcd_en>;
 37
 38		enable-active-high;
 39
 40		gpio = <&pio 36 GPIO_ACTIVE_HIGH>;
 41	};
 42};
 43
 44&bluetooth {
 45	firmware-name = "nvm_00440302_i2s_eu.bin";
 46};
 47
 48&dsi0 {
 49	#address-cells = <1>;
 50	#size-cells = <0>;
 51	status = "okay";
 52
 53	panel: panel@0 {
 54		/* compatible will be set in board dts */
 55		reg = <0>;
 56		enable-gpios = <&pio 45 0>;
 57		pinctrl-names = "default";
 58		pinctrl-0 = <&panel_pins_default>;
 59		avdd-supply = <&ppvarn_lcd>;
 60		avee-supply = <&ppvarp_lcd>;
 61		pp1800-supply = <&pp1800_lcd>;
 62		backlight = <&backlight_lcd0>;
 63		rotation = <270>;
 64		port {
 65			panel_in: endpoint {
 66				remote-endpoint = <&dsi_out>;
 67			};
 68		};
 69	};
 70};
 71
 72&dsi_out {
 73	remote-endpoint = <&panel_in>;
 74};
 75
 76&i2c0 {
 77	status = "okay";
 78
 79	touchscreen4: touchscreen@5d {
 80		compatible = "hid-over-i2c";
 81		reg = <0x5d>;
 82		pinctrl-names = "default";
 83		pinctrl-0 = <&open_touch>;
 84
 85		interrupts-extended = <&pio 155 IRQ_TYPE_EDGE_FALLING>;
 86
 87		post-power-on-delay-ms = <10>;
 88		hid-descr-addr = <0x0001>;
 89	};
 90};
 91
 92&mt6358_vcama2_reg {
 93	regulator-min-microvolt = <2800000>;
 94	regulator-max-microvolt = <2800000>;
 95};
 96
 97&i2c2 {
 98	pinctrl-names = "default";
 99	pinctrl-0 = <&i2c2_pins>;
100	status = "okay";
101	clock-frequency = <400000>;
102	vbus-supply = <&mt6358_vcamio_reg>;
103
104	eeprom@58 {
105		compatible = "atmel,24c32";
106		reg = <0x58>;
107		pagesize = <32>;
108		vcc-supply = <&mt6358_vcama2_reg>;
109	};
110};
111
112&i2c4 {
113	pinctrl-names = "default";
114	pinctrl-0 = <&i2c4_pins>;
115	status = "okay";
116	clock-frequency = <400000>;
117	vbus-supply = <&mt6358_vcn18_reg>;
118
119	eeprom@50 {
120		compatible = "atmel,24c32";
121		reg = <0x50>;
122		pagesize = <32>;
123		vcc-supply = <&mt6358_vcn18_reg>;
124	};
125};
126
127&pio {
128	/* 192 lines */
129	gpio-line-names =
130		"SPI_AP_EC_CS_L",
131		"SPI_AP_EC_MOSI",
132		"SPI_AP_EC_CLK",
133		"I2S3_DO",
134		"USB_PD_INT_ODL",
135		"",
136		"",
137		"",
138		"",
139		"IT6505_HPD_L",
140		"I2S3_TDM_D3",
141		"SOC_I2C6_1V8_SCL",
142		"SOC_I2C6_1V8_SDA",
143		"DPI_D0",
144		"DPI_D1",
145		"DPI_D2",
146		"DPI_D3",
147		"DPI_D4",
148		"DPI_D5",
149		"DPI_D6",
150		"DPI_D7",
151		"DPI_D8",
152		"DPI_D9",
153		"DPI_D10",
154		"DPI_D11",
155		"DPI_HSYNC",
156		"DPI_VSYNC",
157		"DPI_DE",
158		"DPI_CK",
159		"AP_MSDC1_CLK",
160		"AP_MSDC1_DAT3",
161		"AP_MSDC1_CMD",
162		"AP_MSDC1_DAT0",
163		"AP_MSDC1_DAT2",
164		"AP_MSDC1_DAT1",
165		"",
166		"",
167		"",
168		"",
169		"",
170		"",
171		"OTG_EN",
172		"DRVBUS",
173		"DISP_PWM",
174		"DSI_TE",
175		"LCM_RST_1V8",
176		"AP_CTS_WIFI_RTS",
177		"AP_RTS_WIFI_CTS",
178		"SOC_I2C5_1V8_SCL",
179		"SOC_I2C5_1V8_SDA",
180		"SOC_I2C3_1V8_SCL",
181		"SOC_I2C3_1V8_SDA",
182		"",
183		"",
184		"",
185		"",
186		"",
187		"",
188		"",
189		"",
190		"",
191		"",
192		"",
193		"",
194		"",
195		"",
196		"",
197		"",
198		"",
199		"",
200		"",
201		"",
202		"",
203		"",
204		"",
205		"",
206		"",
207		"",
208		"",
209		"",
210		"",
211		"SOC_I2C1_1V8_SDA",
212		"SOC_I2C0_1V8_SDA",
213		"SOC_I2C0_1V8_SCL",
214		"SOC_I2C1_1V8_SCL",
215		"AP_SPI_H1_MISO",
216		"AP_SPI_H1_CS_L",
217		"AP_SPI_H1_MOSI",
218		"AP_SPI_H1_CLK",
219		"I2S5_BCK",
220		"I2S5_LRCK",
221		"I2S5_DO",
222		"BOOTBLOCK_EN_L",
223		"MT8183_KPCOL0",
224		"SPI_AP_EC_MISO",
225		"UART_DBG_TX_AP_RX",
226		"UART_AP_TX_DBG_RX",
227		"I2S2_MCK",
228		"I2S2_BCK",
229		"CLK_5M_WCAM",
230		"CLK_2M_UCAM",
231		"I2S2_LRCK",
232		"I2S2_DI",
233		"SOC_I2C2_1V8_SCL",
234		"SOC_I2C2_1V8_SDA",
235		"SOC_I2C4_1V8_SCL",
236		"SOC_I2C4_1V8_SDA",
237		"",
238		"SCL8",
239		"SDA8",
240		"FCAM_PWDN_L",
241		"",
242		"",
243		"",
244		"",
245		"",
246		"",
247		"",
248		"",
249		"",
250		"",
251		"",
252		"",
253		"",
254		"",
255		"",
256		"",
257		"",
258		"",
259		"",
260		"",
261		"",
262		"",
263		"",
264		"",
265		"",
266		"I2S_PMIC",
267		"I2S_PMIC",
268		"I2S_PMIC",
269		"I2S_PMIC",
270		"I2S_PMIC",
271		"I2S_PMIC",
272		"I2S_PMIC",
273		"I2S_PMIC",
274		"",
275		"",
276		"",
277		"",
278		"",
279		"",
280		/*
281		 * AP_FLASH_WP_L is crossystem ABI. Rev1 schematics
282		 * call it BIOS_FLASH_WP_R_L.
283		 */
284		"AP_FLASH_WP_L",
285		"EC_AP_INT_ODL",
286		"IT6505_INT_ODL",
287		"H1_INT_OD_L",
288		"",
289		"",
290		"",
291		"",
292		"",
293		"",
294		"",
295		"AP_SPI_FLASH_MISO",
296		"AP_SPI_FLASH_CS_L",
297		"AP_SPI_FLASH_MOSI",
298		"AP_SPI_FLASH_CLK",
299		"DA7219_IRQ",
300		"",
301		"",
302		"",
303		"",
304		"",
305		"",
306		"",
307		"",
308		"",
309		"",
310		"",
311		"",
312		"",
313		"",
314		"",
315		"",
316		"",
317		"",
318		"",
319		"",
320		"",
321		"",
322		"",
323		"",
324		"",
325		"";
326
327	ppvarp_lcd_en: ppvarp-lcd-en-pins {
328		pins1 {
329			pinmux = <PINMUX_GPIO66__FUNC_GPIO66>;
330			output-low;
331		};
332	};
333
334	ppvarn_lcd_en: ppvarn-lcd-en-pins {
335		pins1 {
336			pinmux = <PINMUX_GPIO166__FUNC_GPIO166>;
337			output-low;
338		};
339	};
340
341	pp1800_lcd_en: pp1800-lcd-en-pins {
342		pins1 {
343			pinmux = <PINMUX_GPIO36__FUNC_GPIO36>;
344			output-low;
345		};
346	};
347
348	open_touch: opentouch-pins {
349		pins-intn {
350			pinmux = <PINMUX_GPIO155__FUNC_GPIO155>;
351			input-enable;
352			bias-pull-up;
353		};
354
355		pins-rst {
356			pinmux = <PINMUX_GPIO156__FUNC_GPIO156>;
357
358			/*
359			 * The pen driver doesn't currently support  driving
360			 * this reset line.  By specifying output-high here
361			 * we're relying on the fact that this pin has a default
362			 * pulldown at boot (which makes sure the pen was in
363			 * reset if it was powered) and then we set it high here
364			 * to take it out of reset.  Better would be if the pen
365			 * driver could control this and we could remove
366			 * "output-high" here.
367			 */
368			output-high;
369		};
370	};
371};
372
373&cros_ec {
374	cbas {
375		compatible = "google,cros-cbas";
376	};
377
378	keyboard-controller {
379		compatible = "google,cros-ec-keyb-switches";
380	};
381};
382
383&qca_wifi {
384	qcom,ath10k-calibration-variant = "LE_Krane";
385};
386
387&sound {
388	compatible = "mediatek,mt8183_mt6358_ts3a227_max98357";
389};