pxa1908.dtsi

  1// SPDX-License-Identifier: GPL-2.0-only
  2/dts-v1/;
  3
  4#include <dt-bindings/interrupt-controller/arm-gic.h>
  5#include <dt-bindings/clock/marvell,pxa1908.h>
  6#include <dt-bindings/power/marvell,pxa1908-power.h>
  7
  8/ {
  9	model = "Marvell Armada PXA1908";
 10	compatible = "marvell,pxa1908";
 11	#address-cells = <2>;
 12	#size-cells = <2>;
 13	interrupt-parent = <&gic>;
 14
 15	cpus {
 16		#address-cells = <2>;
 17		#size-cells = <0>;
 18
 19		cpu0: cpu@0 {
 20			device_type = "cpu";
 21			compatible = "arm,cortex-a53";
 22			reg = <0 0>;
 23			enable-method = "psci";
 24		};
 25
 26		cpu1: cpu@1 {
 27			device_type = "cpu";
 28			compatible = "arm,cortex-a53";
 29			reg = <0 1>;
 30			enable-method = "psci";
 31		};
 32
 33		cpu2: cpu@2 {
 34			device_type = "cpu";
 35			compatible = "arm,cortex-a53";
 36			reg = <0 2>;
 37			enable-method = "psci";
 38		};
 39
 40		cpu3: cpu@3 {
 41			device_type = "cpu";
 42			compatible = "arm,cortex-a53";
 43			reg = <0 3>;
 44			enable-method = "psci";
 45		};
 46	};
 47
 48	pmu {
 49		compatible = "arm,cortex-a53-pmu";
 50		interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
 51			<GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
 52			<GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
 53			<GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
 54		interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
 55	};
 56
 57	psci {
 58		compatible = "arm,psci-0.2";
 59		method = "smc";
 60	};
 61
 62	reserved-memory {
 63		#address-cells = <2>;
 64		#size-cells = <2>;
 65		ranges;
 66
 67		ramoops@8100000 {
 68			compatible = "ramoops";
 69			reg = <0 0x8100000 0 0x40000>;
 70			record-size = <0x8000>;
 71			console-size = <0x20000>;
 72			max-reason = <5>;
 73		};
 74	};
 75
 76	timer {
 77		compatible = "arm,armv8-timer";
 78		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
 79			<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
 80			<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
 81			<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
 82	};
 83
 84	soc {
 85		compatible = "simple-bus";
 86		#address-cells = <2>;
 87		#size-cells = <2>;
 88		ranges;
 89
 90		smmu: iommu@c0010000 {
 91			compatible = "arm,mmu-400";
 92			reg = <0 0xc0010000 0 0x10000>;
 93			#global-interrupts = <1>;
 94			#iommu-cells = <1>;
 95			interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>,
 96				<GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
 97			power-domains = <&apmu PXA1908_POWER_DOMAIN_VPU>;
 98			status = "disabled";
 99		};
100
101		gic: interrupt-controller@d1df9000 {
102			compatible = "arm,gic-400";
103			reg = <0 0xd1df9000 0 0x1000>,
104				<0 0xd1dfa000 0 0x2000>,
105				/* The subsequent registers are guesses. */
106				<0 0xd1dfc000 0 0x2000>,
107				<0 0xd1dfe000 0 0x2000>;
108			interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
109			interrupt-controller;
110			#interrupt-cells = <3>;
111		};
112
113		apb@d4000000 {
114			compatible = "simple-bus";
115			reg = <0 0xd4000000 0 0x200000>;
116			#address-cells = <1>;
117			#size-cells = <1>;
118			ranges = <0 0 0xd4000000 0x200000>;
119
120			pdma: dma-controller@0 {
121				compatible = "marvell,pdma-1.0";
122				reg = <0 0x10000>;
123				interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
124				dma-channels = <30>;
125				#dma-cells = <2>;
126			};
127
128			twsi1: i2c@10800 {
129				compatible = "mrvl,mmp-twsi";
130				#address-cells = <1>;
131				#size-cells = <0>;
132				reg = <0x10800 0x64>;
133				interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
134				clocks = <&apbc PXA1908_CLK_TWSI1>;
135				mrvl,i2c-fast-mode;
136				status = "disabled";
137			};
138
139			twsi0: i2c@11000 {
140				compatible = "mrvl,mmp-twsi";
141				#address-cells = <1>;
142				#size-cells = <0>;
143				reg = <0x11000 0x64>;
144				interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
145				clocks = <&apbc PXA1908_CLK_TWSI0>;
146				mrvl,i2c-fast-mode;
147				status = "disabled";
148			};
149
150			twsi3: i2c@13800 {
151				compatible = "mrvl,mmp-twsi";
152				#address-cells = <1>;
153				#size-cells = <0>;
154				reg = <0x13800 0x64>;
155				interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
156				clocks = <&apbc PXA1908_CLK_TWSI3>;
157				mrvl,i2c-fast-mode;
158				status = "disabled";
159			};
160
161			apbc: clock-controller@15000 {
162				compatible = "marvell,pxa1908-apbc";
163				reg = <0x15000 0x1000>;
164				#clock-cells = <1>;
165			};
166
167			uart0: serial@17000 {
168				compatible = "mrvl,mmp-uart", "intel,xscale-uart";
169				reg = <0x17000 0x1000>;
170				interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
171				clocks = <&apbc PXA1908_CLK_UART0>;
172				reg-shift = <2>;
173			};
174
175			uart1: serial@18000 {
176				compatible = "mrvl,mmp-uart", "intel,xscale-uart";
177				reg = <0x18000 0x1000>;
178				interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
179				clocks = <&apbc PXA1908_CLK_UART1>;
180				reg-shift = <2>;
181			};
182
183			gpio: gpio@19000 {
184				compatible = "marvell,mmp-gpio";
185				reg = <0x19000 0x800>;
186				#address-cells = <1>;
187				#size-cells = <1>;
188				gpio-controller;
189				#gpio-cells = <2>;
190				clocks = <&apbc PXA1908_CLK_GPIO>;
191				interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
192				interrupt-names = "gpio_mux";
193				interrupt-controller;
194				#interrupt-cells = <2>;
195				ranges = <0 0x19000 0x800>;
196
197				gpio@0 {
198					reg = <0x0 0x4>;
199				};
200
201				gpio@4 {
202					reg = <0x4 0x4>;
203				};
204
205				gpio@8 {
206					reg = <0x8 0x4>;
207				};
208
209				gpio@100 {
210					reg = <0x100 0x4>;
211				};
212			};
213
214			pwm0: pwm@1a000 {
215				compatible = "marvell,pxa250-pwm";
216				reg = <0x1a000 0x10>;
217				clocks = <&apbc PXA1908_CLK_PWM0>;
218				#pwm-cells = <1>;
219				status = "disabled";
220			};
221
222			pwm1: pwm@1a400 {
223				compatible = "marvell,pxa250-pwm";
224				reg = <0x1a400 0x10>;
225				clocks = <&apbc PXA1908_CLK_PWM1>;
226				#pwm-cells = <1>;
227				status = "disabled";
228			};
229
230			pwm2: pwm@1a800 {
231				compatible = "marvell,pxa250-pwm";
232				reg = <0x1a800 0x10>;
233				clocks = <&apbc PXA1908_CLK_PWM2>;
234				#pwm-cells = <1>;
235				status = "disabled";
236			};
237
238			pwm3: pwm@1ac00 {
239				compatible = "marvell,pxa250-pwm";
240				reg = <0x1ac00 0x10>;
241				clocks = <&apbc PXA1908_CLK_PWM3>;
242				#pwm-cells = <1>;
243				status = "disabled";
244			};
245
246			pmx: pinmux@1e000 {
247				compatible = "marvell,pxa1908-padconf", "pinconf-single";
248				reg = <0x1e000 0x330>;
249
250				#pinctrl-cells = <1>;
251				pinctrl-single,register-width = <32>;
252				pinctrl-single,function-mask = <7>;
253
254				range: gpio-range {
255					#pinctrl-single,gpio-range-cells = <3>;
256				};
257			};
258
259			uart2: serial@36000 {
260				compatible = "mrvl,mmp-uart", "intel,xscale-uart";
261				reg = <0x36000 0x1000>;
262				interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
263				clocks = <&apbcp PXA1908_CLK_UART2>;
264				reg-shift = <2>;
265			};
266
267			twsi2: i2c@37000 {
268				compatible = "mrvl,mmp-twsi";
269				#address-cells = <1>;
270				#size-cells = <0>;
271				reg = <0x37000 0x64>;
272				interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
273				clocks = <&apbcp PXA1908_CLK_TWSI2>;
274				mrvl,i2c-fast-mode;
275				status = "disabled";
276			};
277
278			apbcp: clock-controller@3b000 {
279				compatible = "marvell,pxa1908-apbcp";
280				reg = <0x3b000 0x1000>;
281				#clock-cells = <1>;
282			};
283
284			mpmu: clock-controller@50000 {
285				compatible = "marvell,pxa1908-mpmu";
286				reg = <0x50000 0x1000>;
287				#clock-cells = <1>;
288			};
289		};
290
291		axi@d4200000 {
292			compatible = "simple-bus";
293			reg = <0 0xd4200000 0 0x200000>;
294			#address-cells = <1>;
295			#size-cells = <1>;
296			ranges = <0 0 0xd4200000 0x200000>;
297
298			usbphy: phy@7000 {
299				compatible = "marvell,pxa1928-usb-phy";
300				reg = <0x7000 0x200>;
301				clocks = <&apmu PXA1908_CLK_USB>;
302				#phy-cells = <0>;
303			};
304
305			usb: usb@8000 {
306				compatible = "chipidea,usb2";
307				reg = <0x8000 0x200>;
308				interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
309				clocks = <&apmu PXA1908_CLK_USB>;
310				phys = <&usbphy>;
311				phy-names = "usb-phy";
312			};
313
314			sdh0: mmc@80000 {
315				compatible = "mrvl,pxav3-mmc";
316				reg = <0x80000 0x120>;
317				interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
318				clocks = <&apmu PXA1908_CLK_SDH0>;
319				clock-names = "io";
320				mrvl,clk-delay-cycles = <31>;
321			};
322
323			sdh1: mmc@80800 {
324				compatible = "mrvl,pxav3-mmc";
325				reg = <0x80800 0x120>;
326				interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
327				clocks = <&apmu PXA1908_CLK_SDH1>;
328				clock-names = "io";
329				mrvl,clk-delay-cycles = <31>;
330			};
331
332			sdh2: mmc@81000 {
333				compatible = "mrvl,pxav3-mmc";
334				reg = <0x81000 0x120>;
335				interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
336				clocks = <&apmu PXA1908_CLK_SDH2>;
337				clock-names = "io";
338				mrvl,clk-delay-cycles = <31>;
339			};
340
341			apmu: clock-controller@82800 {
342				compatible = "marvell,pxa1908-apmu", "syscon";
343				reg = <0x82800 0x400>;
344				#clock-cells = <1>;
345				#power-domain-cells = <1>;
346			};
347		};
348	};
349};