armada-ap810-ap0.dtsi

  1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
  2/*
  3 * Copyright (C) 2017 Marvell Technology Group Ltd.
  4 *
  5 * Device Tree file for Marvell Armada AP810.
  6 */
  7
  8#include <dt-bindings/interrupt-controller/arm-gic.h>
  9
 10/dts-v1/;
 11
 12/ {
 13	#address-cells = <2>;
 14	#size-cells = <2>;
 15	interrupt-parent = <&gic>;
 16
 17	aliases {
 18		serial0 = &uart0_ap0;
 19		serial1 = &uart1_ap0;
 20	};
 21
 22	psci {
 23		compatible = "arm,psci-0.2";
 24		method = "smc";
 25	};
 26
 27	timer {
 28		compatible = "arm,armv8-timer";
 29		interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
 30				<GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
 31				<GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
 32				<GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>;
 33	};
 34
 35	soc {
 36		#address-cells = <2>;
 37		#size-cells = <2>;
 38		compatible = "simple-bus";
 39		ranges;
 40
 41		bus@e8000000 {
 42			#address-cells = <1>;
 43			#size-cells = <1>;
 44			compatible = "simple-bus";
 45			ranges = <0x0 0x0 0xe8000000 0x4000000>;
 46			interrupt-parent = <&gic>;
 47
 48			gic: interrupt-controller@3000000 {
 49				compatible = "arm,gic-v3";
 50				#interrupt-cells = <3>;
 51				#address-cells = <1>;
 52				#size-cells = <1>;
 53				interrupt-controller;
 54				interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
 55				ranges;
 56
 57				reg = <0x3000000 0x10000>,	/* GICD */
 58				      <0x3060000 0x100000>,	/* GICR */
 59				      <0x00c0000 0x2000>,	/* GICC */
 60				      <0x00d0000 0x1000>,	/* GICH */
 61				      <0x00e0000 0x2000>;	/* GICV */
 62
 63				gic_its_ap0: msi-controller@3040000 {
 64					compatible = "arm,gic-v3-its";
 65					msi-controller;
 66					#msi-cells = <1>;
 67					reg = <0x3040000 0x20000>;
 68				};
 69			};
 70
 71			xor@400000 {
 72				compatible = "marvell,armada-7k-xor", "marvell,xor-v2";
 73				reg = <0x400000 0x1000>,
 74				      <0x410000 0x1000>;
 75				msi-parent = <&gic_its_ap0 0xa0>;
 76				dma-coherent;
 77			};
 78
 79			xor@420000 {
 80				compatible = "marvell,armada-7k-xor", "marvell,xor-v2";
 81				reg = <0x420000 0x1000>,
 82				      <0x430000 0x1000>;
 83				msi-parent = <&gic_its_ap0 0xa1>;
 84				dma-coherent;
 85			};
 86
 87			xor@440000 {
 88				compatible = "marvell,armada-7k-xor", "marvell,xor-v2";
 89				reg = <0x440000 0x1000>,
 90				      <0x450000 0x1000>;
 91				msi-parent = <&gic_its_ap0 0xa2>;
 92				dma-coherent;
 93			};
 94
 95			xor@460000 {
 96				compatible = "marvell,armada-7k-xor", "marvell,xor-v2";
 97				reg = <0x460000 0x1000>,
 98				      <0x470000 0x1000>;
 99				msi-parent = <&gic_its_ap0 0xa3>;
100				dma-coherent;
101			};
102
103			uart0_ap0: serial@512000 {
104				compatible = "snps,dw-apb-uart";
105				reg = <0x512000 0x100>;
106				reg-shift = <2>;
107				interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
108				reg-io-width = <1>;
109				status = "disabled";
110			};
111
112			uart1_ap0: serial@512100 {
113				compatible = "snps,dw-apb-uart";
114				reg = <0x512100 0x100>;
115				reg-shift = <2>;
116				interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
117				reg-io-width = <1>;
118				status = "disabled";
119			};
120		};
121	};
122};