imx8qm-apalis.dtsi

  1// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
  2/*
  3 * Copyright 2022 Toradex
  4 */
  5
  6#include "imx8qm-apalis-v1.1.dtsi"
  7
  8/ {
  9	model = "Toradex Apalis iMX8QM";
 10};
 11
 12&ethphy0 {
 13	interrupts = <5 IRQ_TYPE_LEVEL_LOW>;
 14};
 15
 16/*
 17 * Apalis iMX8QM V1.0 has PHY KSZ9031. the Micrel PHY driver
 18 * doesn't support setting internal PHY delay for TXC line for
 19 * this PHY model. Use delay on MAC side instead.
 20 */
 21&fec1 {
 22	phy-mode = "rgmii-rxid";
 23};
 24
 25&hsio_refa_clk {
 26	enable-gpios = <&lsio_gpio4 27 GPIO_ACTIVE_HIGH>;
 27};
 28
 29/* TODO: Apalis HDMI1 */
 30
 31/* Apalis I2C2 (DDC) */
 32&i2c0 {
 33	pinctrl-names = "default";
 34	pinctrl-0 = <&pinctrl_lpi2c0>;
 35	#address-cells = <1>;
 36	#size-cells = <0>;
 37	clock-frequency = <100000>;
 38};
 39
 40&lsio_gpio0 {
 41	gpio-line-names = "MXM3_279",
 42			  "MXM3_277",
 43			  "MXM3_135",
 44			  "MXM3_203",
 45			  "MXM3_201",
 46			  "MXM3_275",
 47			  "MXM3_110",
 48			  "MXM3_120",
 49			  "MXM3_1/GPIO1",
 50			  "MXM3_3/GPIO2",
 51			  "MXM3_124",
 52			  "MXM3_122",
 53			  "MXM3_5/GPIO3",
 54			  "MXM3_7/GPIO4",
 55			  "",
 56			  "",
 57			  "MXM3_4",
 58			  "MXM3_211",
 59			  "MXM3_209",
 60			  "MXM3_2",
 61			  "MXM3_136",
 62			  "MXM3_134",
 63			  "MXM3_6",
 64			  "MXM3_8",
 65			  "MXM3_112",
 66			  "MXM3_118",
 67			  "MXM3_114",
 68			  "MXM3_116";
 69};
 70
 71&lsio_gpio1 {
 72	gpio-line-names = "",
 73			  "",
 74			  "",
 75			  "",
 76			  "MXM3_286",
 77			  "",
 78			  "MXM3_87",
 79			  "MXM3_99",
 80			  "MXM3_138",
 81			  "MXM3_140",
 82			  "MXM3_239",
 83			  "",
 84			  "MXM3_281",
 85			  "MXM3_283",
 86			  "MXM3_126",
 87			  "MXM3_132",
 88			  "",
 89			  "",
 90			  "",
 91			  "",
 92			  "MXM3_173",
 93			  "MXM3_175",
 94			  "MXM3_123";
 95};
 96
 97&lsio_gpio2 {
 98	gpio-line-names = "",
 99			  "",
100			  "",
101			  "",
102			  "",
103			  "",
104			  "",
105			  "MXM3_198",
106			  "MXM3_35",
107			  "MXM3_164",
108			  "",
109			  "",
110			  "",
111			  "",
112			  "MXM3_217",
113			  "MXM3_215",
114			  "",
115			  "",
116			  "MXM3_193",
117			  "MXM3_194",
118			  "MXM3_37",
119			  "",
120			  "MXM3_271",
121			  "MXM3_273",
122			  "MXM3_195",
123			  "MXM3_197",
124			  "MXM3_177",
125			  "MXM3_179",
126			  "MXM3_181",
127			  "MXM3_183",
128			  "MXM3_185",
129			  "MXM3_187";
130};
131
132&lsio_gpio3 {
133	gpio-line-names = "MXM3_191",
134			  "",
135			  "MXM3_221",
136			  "MXM3_225",
137			  "MXM3_223",
138			  "MXM3_227",
139			  "MXM3_200",
140			  "MXM3_235",
141			  "MXM3_231",
142			  "MXM3_229",
143			  "MXM3_233",
144			  "MXM3_204",
145			  "MXM3_196",
146			  "",
147			  "MXM3_202",
148			  "",
149			  "",
150			  "",
151			  "MXM3_305",
152			  "MXM3_307",
153			  "MXM3_309",
154			  "MXM3_311",
155			  "MXM3_315",
156			  "MXM3_317",
157			  "MXM3_319",
158			  "MXM3_321",
159			  "MXM3_15/GPIO7",
160			  "MXM3_63",
161			  "MXM3_17/GPIO8",
162			  "MXM3_12",
163			  "MXM3_14",
164			  "MXM3_16";
165};
166
167&lsio_gpio4 {
168	gpio-line-names = "MXM3_18",
169			  "MXM3_11/GPIO5",
170			  "MXM3_13/GPIO6",
171			  "MXM3_274",
172			  "MXM3_84",
173			  "MXM3_262",
174			  "MXM3_96",
175			  "",
176			  "",
177			  "",
178			  "",
179			  "",
180			  "MXM3_190",
181			  "",
182			  "",
183			  "",
184			  "MXM3_269",
185			  "MXM3_251",
186			  "MXM3_253",
187			  "MXM3_295",
188			  "MXM3_299",
189			  "MXM3_301",
190			  "MXM3_297",
191			  "MXM3_293",
192			  "MXM3_291",
193			  "MXM3_289",
194			  "MXM3_287";
195};
196
197&lsio_gpio5 {
198	gpio-line-names = "",
199			  "",
200			  "",
201			  "",
202			  "",
203			  "",
204			  "",
205			  "",
206			  "",
207			  "",
208			  "",
209			  "",
210			  "",
211			  "",
212			  "MXM3_150",
213			  "MXM3_160",
214			  "MXM3_162",
215			  "MXM3_144",
216			  "MXM3_146",
217			  "MXM3_148",
218			  "MXM3_152",
219			  "MXM3_156",
220			  "MXM3_158",
221			  "MXM3_159",
222			  "MXM3_184",
223			  "MXM3_180",
224			  "MXM3_186",
225			  "MXM3_188",
226			  "MXM3_176",
227			  "MXM3_178";
228};
229
230&lsio_gpio6 {
231	gpio-line-names = "",
232			  "",
233			  "",
234			  "",
235			  "",
236			  "",
237			  "",
238			  "",
239			  "",
240			  "",
241			  "MXM3_261",
242			  "MXM3_263",
243			  "MXM3_259",
244			  "MXM3_257",
245			  "MXM3_255",
246			  "MXM3_128",
247			  "MXM3_130",
248			  "MXM3_265",
249			  "MXM3_249",
250			  "MXM3_247",
251			  "MXM3_245",
252			  "MXM3_243";
253};
254
255&pinctrl_fec1 {
256	fsl,pins =
257		/* Use pads in 1.8V mode */
258		<IMX8QM_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB_PAD			0x000014a0>,
259		<IMX8QM_ENET0_MDC_CONN_ENET0_MDC				0x06000020>,
260		<IMX8QM_ENET0_MDIO_CONN_ENET0_MDIO				0x06000020>,
261		<IMX8QM_ENET0_RGMII_TX_CTL_CONN_ENET0_RGMII_TX_CTL		0x06000020>,
262		<IMX8QM_ENET0_RGMII_TXC_CONN_ENET0_RGMII_TXC			0x06000020>,
263		<IMX8QM_ENET0_RGMII_TXD0_CONN_ENET0_RGMII_TXD0			0x06000020>,
264		<IMX8QM_ENET0_RGMII_TXD1_CONN_ENET0_RGMII_TXD1			0x06000020>,
265		<IMX8QM_ENET0_RGMII_TXD2_CONN_ENET0_RGMII_TXD2			0x06000020>,
266		<IMX8QM_ENET0_RGMII_TXD3_CONN_ENET0_RGMII_TXD3			0x06000020>,
267		<IMX8QM_ENET0_RGMII_RXC_CONN_ENET0_RGMII_RXC			0x06000020>,
268		<IMX8QM_ENET0_RGMII_RX_CTL_CONN_ENET0_RGMII_RX_CTL		0x06000020>,
269		<IMX8QM_ENET0_RGMII_RXD0_CONN_ENET0_RGMII_RXD0			0x06000020>,
270		<IMX8QM_ENET0_RGMII_RXD1_CONN_ENET0_RGMII_RXD1			0x06000020>,
271		<IMX8QM_ENET0_RGMII_RXD2_CONN_ENET0_RGMII_RXD2			0x06000020>,
272		<IMX8QM_ENET0_RGMII_RXD3_CONN_ENET0_RGMII_RXD3			0x06000020>,
273		<IMX8QM_ENET0_REFCLK_125M_25M_CONN_ENET0_REFCLK_125M_25M	0x06000020>,
274		/* On-module ETH_RESET# */
275		<IMX8QM_LVDS1_GPIO01_LSIO_GPIO1_IO11				0x06000020>,
276		/* On-module ETH_INT# */
277		<IMX8QM_LVDS0_GPIO01_LSIO_GPIO1_IO05				0x04000060>;
278};
279
280&pinctrl_fec1_sleep {
281	fsl,pins =
282		<IMX8QM_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB_PAD			0x000014a0>,
283		<IMX8QM_ENET0_MDC_LSIO_GPIO4_IO14				0x04000040>,
284		<IMX8QM_ENET0_MDIO_LSIO_GPIO4_IO13				0x04000040>,
285		<IMX8QM_ENET0_RGMII_TX_CTL_LSIO_GPIO5_IO31			0x04000040>,
286		<IMX8QM_ENET0_RGMII_TXC_LSIO_GPIO5_IO30				0x04000040>,
287		<IMX8QM_ENET0_RGMII_TXD0_LSIO_GPIO6_IO00			0x04000040>,
288		<IMX8QM_ENET0_RGMII_TXD1_LSIO_GPIO6_IO01			0x04000040>,
289		<IMX8QM_ENET0_RGMII_TXD2_LSIO_GPIO6_IO02			0x04000040>,
290		<IMX8QM_ENET0_RGMII_TXD3_LSIO_GPIO6_IO03			0x04000040>,
291		<IMX8QM_ENET0_RGMII_RXC_LSIO_GPIO6_IO04				0x04000040>,
292		<IMX8QM_ENET0_RGMII_RX_CTL_LSIO_GPIO6_IO05			0x04000040>,
293		<IMX8QM_ENET0_RGMII_RXD0_LSIO_GPIO6_IO06			0x04000040>,
294		<IMX8QM_ENET0_RGMII_RXD1_LSIO_GPIO6_IO07			0x04000040>,
295		<IMX8QM_ENET0_RGMII_RXD2_LSIO_GPIO6_IO08			0x04000040>,
296		<IMX8QM_ENET0_RGMII_RXD3_LSIO_GPIO6_IO09			0x04000040>,
297		<IMX8QM_ENET0_REFCLK_125M_25M_LSIO_GPIO4_IO15			0x04000040>,
298		<IMX8QM_LVDS1_GPIO01_LSIO_GPIO1_IO11				0x04000040>,
299		<IMX8QM_LVDS0_GPIO01_LSIO_GPIO1_IO05				0x04000040>;
300};
301
302&iomuxc {
303	/* Apalis I2C2 (DDC) */
304	pinctrl_lpi2c0: lpi2c0grp {
305		fsl,pins =
306			<IMX8QM_HDMI_TX0_TS_SCL_DMA_I2C0_SCL			0x04000022>,
307			<IMX8QM_HDMI_TX0_TS_SDA_DMA_I2C0_SDA			0x04000022>;
308	};
309};
310
311/* On-module PCIe_CTRL0_CLKREQ */
312&pinctrl_pcie_sata_refclk {
313	fsl,pins =
314		<IMX8QM_PCIE_CTRL0_CLKREQ_B_LSIO_GPIO4_IO27			0x00000021>;
315};
316
317/* Apalis MMC1 */
318&usdhc2 {
319	/*
320	 * The PMIC on V1.0A HW generates 1.6V instead of 1.8V which creates
321	 * issues with certain SD cards, disable 1.8V signaling for now.
322	 */
323	no-1-8-v;
324};
325
326/* Apalis SD1 */
327&usdhc3 {
328	/*
329	 * The PMIC on V1.0A HW generates 1.6V instead of 1.8V which creates
330	 * issues with certain SD cards, disable 1.8V signaling for now.
331	 */
332	no-1-8-v;
333};