imx8mm-phycore-rpmsg.dtso

 1// SPDX-License-Identifier: GPL-2.0
 2/*
 3 * Copyright (C) 2025 PHYTEC Messtechnik GmbH
 4 * Author: Dominik Haller <d.haller@phytec.de>
 5 */
 6
 7/dts-v1/;
 8/plugin/;
 9
10#include <dt-bindings/clock/imx8mm-clock.h>
11
12&{/} {
13	#address-cells = <2>;
14	#size-cells = <2>;
15
16	reserved-memory {
17		#address-cells = <2>;
18		#size-cells = <2>;
19		ranges;
20
21		m4_reserved: m4@80000000 {
22			reg = <0 0x80000000 0 0x1000000>;
23			no-map;
24		};
25
26		vdev0vring0: vdev0vring0@b8000000 {
27			reg = <0 0xb8000000 0 0x8000>;
28			no-map;
29		};
30
31		vdev0vring1: vdev0vring1@b8008000 {
32			reg = <0 0xb8008000 0 0x8000>;
33			no-map;
34		};
35
36		rsc_table: rsc_table@b80ff000 {
37			reg = <0 0xb80ff000 0 0x1000>;
38			no-map;
39		};
40
41		vdevbuffer: vdevbuffer@b8400000 {
42			compatible = "shared-dma-pool";
43			reg = <0 0xb8400000 0 0x100000>;
44			no-map;
45		};
46	};
47
48	core-m4 {
49		compatible = "fsl,imx8mm-cm4";
50		clocks = <&clk IMX8MM_CLK_M4_DIV>;
51		mboxes = <&mu 0 1
52			&mu 1 1
53			&mu 3 1>;
54		mbox-names = "tx", "rx", "rxdb";
55		memory-region = <&vdevbuffer>, <&vdev0vring0>, <&vdev0vring1>, <&rsc_table>;
56		syscon = <&src>;
57	};
58};