imx8-apalis-v1.1.dtsi

   1// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2/*
   3 * Copyright 2022 Toradex
   4 */
   5
   6#include <dt-bindings/pwm/pwm.h>
   7
   8/ {
   9	chosen {
  10		stdout-path = &lpuart1;
  11	};
  12
  13	/* Apalis BKL1 */
  14	backlight: backlight {
  15		compatible = "pwm-backlight";
  16		pinctrl-names = "default";
  17		pinctrl-0 = <&pinctrl_gpio_bkl_on>;
  18		brightness-levels = <0 45 63 88 119 158 203 255>;
  19		default-brightness-level = <4>;
  20		enable-gpios = <&lsio_gpio1 4 GPIO_ACTIVE_HIGH>; /* Apalis BKL1_ON */
  21		pwms = <&pwm_lvds1 0 6666667 PWM_POLARITY_INVERTED>;
  22		status = "disabled";
  23	};
  24
  25	gpio_fan: gpio-fan {
  26		compatible = "gpio-fan";
  27		pinctrl-names = "default";
  28		pinctrl-0 = <&pinctrl_gpio8>;
  29		gpios = <&lsio_gpio3 28 GPIO_ACTIVE_HIGH>;
  30		gpio-fan,speed-map = <	 0 0
  31				      3000 1>;
  32	};
  33
  34	/*
  35	 * Power management bus used to control LDO1OUT of the
  36	 * second PMIC PF8100. This is used for controlling voltage levels of
  37	 * typespecific RGMII signals and Apalis UART2_RTS UART2_CTS.
  38	 *
  39	 * IMX_SC_R_BOARD_R1 for 3.3V
  40	 * IMX_SC_R_BOARD_R2 for 1.8V
  41	 * IMX_SC_R_BOARD_R3 for 2.5V
  42	 * Note that for 2.5V operation the pad muxing needs to be changed,
  43	 * compare with PSW_OVR field of IMX8QM_COMP_CTL_GPIO_1V8_3V3_ENET_ENETA_PAD.
  44	 *
  45	 * those power domains are mutually exclusive.
  46	 */
  47	reg_ext_rgmii: regulator-ext-rgmii {
  48		compatible = "regulator-fixed";
  49		power-domains = <&pd IMX_SC_R_BOARD_R1>;
  50		regulator-max-microvolt = <3300000>;
  51		regulator-min-microvolt = <3300000>;
  52		regulator-name = "VDD_EXT_RGMII (LDO1)";
  53
  54		regulator-state-mem {
  55			regulator-off-in-suspend;
  56		};
  57	};
  58
  59	reg_module_3v3: regulator-module-3v3 {
  60		compatible = "regulator-fixed";
  61		regulator-max-microvolt = <3300000>;
  62		regulator-min-microvolt = <3300000>;
  63		regulator-name = "+V3.3";
  64	};
  65
  66	reg_module_3v3_avdd: regulator-module-3v3-avdd {
  67		compatible = "regulator-fixed";
  68		regulator-max-microvolt = <3300000>;
  69		regulator-min-microvolt = <3300000>;
  70		regulator-name = "+V3.3_AUDIO";
  71	};
  72
  73	reg_module_wifi: regulator-module-wifi {
  74		compatible = "regulator-fixed";
  75		pinctrl-names = "default";
  76		pinctrl-0 = <&pinctrl_wifi_pdn>;
  77		gpio = <&lsio_gpio1 28 GPIO_ACTIVE_HIGH>;
  78		enable-active-high;
  79		regulator-always-on;
  80		regulator-name = "Wi-Fi_POWER_DOWN"; /* Wi-Fi module PDn */
  81		startup-delay-us = <100>;
  82	};
  83
  84	reg_pcie_switch: regulator-pcie-switch {
  85		compatible = "regulator-fixed";
  86		pinctrl-names = "default";
  87		pinctrl-0 = <&pinctrl_gpio7>;
  88		gpio = <&lsio_gpio3 26 GPIO_ACTIVE_HIGH>;
  89		enable-active-high;
  90		regulator-max-microvolt = <1800000>;
  91		regulator-min-microvolt = <1800000>;
  92		regulator-name = "pcie_switch";
  93		startup-delay-us = <100000>;
  94	};
  95
  96	reg_usb_host_vbus: regulator-usb-host-vbus {
  97		compatible = "regulator-fixed";
  98		pinctrl-names = "default";
  99		pinctrl-0 = <&pinctrl_usbh_en>;
 100		/* Apalis USBH_EN */
 101		gpio = <&lsio_gpio4 4 GPIO_ACTIVE_HIGH>;
 102		enable-active-high;
 103		regulator-always-on;
 104		regulator-max-microvolt = <5000000>;
 105		regulator-min-microvolt = <5000000>;
 106		regulator-name = "usb-host-vbus";
 107	};
 108
 109	reg_usb_hsic: regulator-usb-hsic {
 110		compatible = "regulator-fixed";
 111		regulator-max-microvolt = <3000000>;
 112		regulator-min-microvolt = <3000000>;
 113		regulator-name = "usb-hsic-dummy";
 114	};
 115
 116	reg_usb_phy: regulator-usb-hsic1 {
 117		compatible = "regulator-fixed";
 118		regulator-max-microvolt = <3000000>;
 119		regulator-min-microvolt = <3000000>;
 120		regulator-name = "usb-phy-dummy";
 121	};
 122
 123	reg_vref_1v8: regulator-vref-1v8 {
 124		compatible = "regulator-fixed";
 125		regulator-name = "+V1.8";
 126		regulator-min-microvolt = <1800000>;
 127		regulator-max-microvolt = <1800000>;
 128	};
 129
 130	reserved-memory {
 131		#address-cells = <2>;
 132		#size-cells = <2>;
 133		ranges;
 134
 135		decoder_boot: decoder-boot@84000000 {
 136			reg = <0 0x84000000 0 0x2000000>;
 137			no-map;
 138		};
 139
 140		encoder1_boot: encoder1-boot@86000000 {
 141			reg = <0 0x86000000 0 0x200000>;
 142			no-map;
 143		};
 144
 145		encoder2_boot: encoder2-boot@86200000 {
 146			reg = <0 0x86200000 0 0x200000>;
 147			no-map;
 148		};
 149
 150		/*
 151		 * reserved-memory layout
 152		 * 0x8800_0000 ~ 0x8FFF_FFFF is reserved for M4
 153		 * Shouldn't be used at A core and Linux side.
 154		 *
 155		 */
 156		m4_reserved: m4@88000000 {
 157			reg = <0 0x88000000 0 0x8000000>;
 158			no-map;
 159		};
 160
 161		rpmsg_reserved: rpmsg@90200000 {
 162			reg = <0 0x90200000 0 0x200000>;
 163			no-map;
 164		};
 165
 166		vdevbuffer: vdevbuffer@90400000 {
 167			compatible = "shared-dma-pool";
 168			reg = <0 0x90400000 0 0x100000>;
 169			no-map;
 170		};
 171
 172		decoder_rpc: decoder-rpc@92000000 {
 173			reg = <0 0x92000000 0 0x200000>;
 174			no-map;
 175		};
 176
 177		dsp_reserved: dsp@92400000 {
 178			reg = <0 0x92400000 0 0x2000000>;
 179			no-map;
 180		};
 181
 182		encoder1_rpc: encoder1-rpc@94400000 {
 183			reg = <0 0x94400000 0 0x700000>;
 184			no-map;
 185		};
 186
 187		encoder2_rpc: encoder2-rpc@94b00000 {
 188			reg = <0 0x94b00000 0 0x700000>;
 189			no-map;
 190		};
 191
 192		/* global autoconfigured region for contiguous allocations */
 193		linux,cma {
 194			compatible = "shared-dma-pool";
 195			alloc-ranges = <0 0xc0000000 0 0x3c000000>;
 196			linux,cma-default;
 197			reusable;
 198			size = <0 0x3c000000>;
 199		};
 200	};
 201
 202	sound {
 203		compatible = "simple-audio-card";
 204		simple-audio-card,bitclock-master = <&dailink_master>;
 205		simple-audio-card,format = "i2s";
 206		simple-audio-card,frame-master = <&dailink_master>;
 207		simple-audio-card,name = "apalis-imx8qm";
 208
 209		simple-audio-card,cpu {
 210			sound-dai = <&sai1>;
 211		};
 212
 213		dailink_master: simple-audio-card,codec {
 214			sound-dai = <&sgtl5000>;
 215		};
 216	};
 217
 218	/* TODO: HDMI Audio */
 219
 220	/* Apalis SPDIF1 */
 221	sound-spdif {
 222		compatible = "fsl,imx-audio-spdif";
 223		model = "imx-spdif";
 224		spdif-controller = <&spdif0>;
 225		spdif-in;
 226		spdif-out;
 227	};
 228
 229	thermal-zones {
 230		pmic-thermal {
 231			polling-delay-passive = <250>;
 232			polling-delay = <2000>;
 233			thermal-sensors = <&tsens IMX_SC_R_PMIC_0>;
 234
 235			cooling-maps {
 236				cooling_maps_map0: map0 {
 237					trip = <&pmic_alert0>;
 238				};
 239			};
 240
 241			trips {
 242				pmic_alert0: trip0 {
 243					hysteresis = <2000>;
 244					temperature = <110000>;
 245					type = "passive";
 246				};
 247
 248				pmic_crit0: trip1 {
 249					hysteresis = <2000>;
 250					temperature = <125000>;
 251					type = "critical";
 252				};
 253			};
 254		};
 255	};
 256
 257	touchscreen: touchscreen {
 258		compatible = "toradex,vf50-touchscreen";
 259		interrupt-parent = <&lsio_gpio3>;
 260		interrupts = <22 IRQ_TYPE_LEVEL_LOW>;
 261		pinctrl-names = "idle", "default";
 262		pinctrl-0 = <&pinctrl_touchctrl_idle>, <&pinctrl_touchctrl_gpios>;
 263		pinctrl-1 = <&pinctrl_adc1>, <&pinctrl_touchctrl_gpios>;
 264		io-channels = <&adc1 2>, <&adc1 1>,
 265			      <&adc1 0>, <&adc1 3>;
 266		vf50-ts-min-pressure = <200>;
 267		xp-gpios = <&lsio_gpio2 4 GPIO_ACTIVE_LOW>;
 268		xm-gpios = <&lsio_gpio2 5 GPIO_ACTIVE_HIGH>;
 269		yp-gpios = <&lsio_gpio2 17 GPIO_ACTIVE_LOW>;
 270		ym-gpios = <&lsio_gpio2 21 GPIO_ACTIVE_HIGH>;
 271		/*
 272		 * NOTE: you must remove the pinctrl-adc1 from the adc1
 273		 * node below to use the touchscreen
 274		 */
 275		status = "disabled";
 276	};
 277
 278};
 279
 280&asrc0 {
 281	fsl,asrc-rate = <48000>;
 282};
 283
 284&adc0 {
 285	pinctrl-names = "default";
 286	pinctrl-0 = <&pinctrl_adc0>;
 287	vref-supply = <&reg_vref_1v8>;
 288};
 289
 290&adc1 {
 291	pinctrl-names = "default";
 292	pinctrl-0 = <&pinctrl_adc1>;
 293	vref-supply = <&reg_vref_1v8>;
 294};
 295
 296&cpu_alert0 {
 297	temperature = <95000>;
 298};
 299
 300&cpu_alert1 {
 301	temperature = <95000>;
 302};
 303
 304&cpu_crit0 {
 305	temperature = <105000>;
 306};
 307
 308&cpu_crit1 {
 309	temperature = <105000>;
 310};
 311
 312&drc_alert0 {
 313	temperature = <95000>;
 314};
 315
 316&drc_crit0 {
 317	temperature = <105000>;
 318};
 319
 320/* Apalis ETH1 */
 321&fec1 {
 322	pinctrl-names = "default", "sleep";
 323	pinctrl-0 = <&pinctrl_fec1>;
 324	pinctrl-1 = <&pinctrl_fec1_sleep>;
 325	fsl,magic-packet;
 326	phy-handle = <&ethphy0>;
 327	phy-mode = "rgmii-id";
 328
 329	mdio {
 330		#address-cells = <1>;
 331		#size-cells = <0>;
 332
 333		ethphy0: ethernet-phy@7 {
 334			compatible = "ethernet-phy-ieee802.3-c22";
 335			reg = <7>;
 336			interrupt-parent = <&lsio_gpio1>;
 337			interrupts = <29 IRQ_TYPE_LEVEL_LOW>;
 338			micrel,led-mode = <0>;
 339			reset-assert-us = <2>;
 340			reset-deassert-us = <2>;
 341			reset-gpios = <&lsio_gpio1 11 GPIO_ACTIVE_LOW>;
 342		};
 343	};
 344};
 345
 346/* Apalis CAN1 */
 347&flexcan1 {
 348	pinctrl-names = "default";
 349	pinctrl-0 = <&pinctrl_flexcan1>;
 350};
 351
 352/* Apalis CAN2 */
 353&flexcan2 {
 354	pinctrl-names = "default";
 355	pinctrl-0 = <&pinctrl_flexcan2>;
 356};
 357
 358/* Apalis CAN3 (optional) */
 359&flexcan3 {
 360	pinctrl-names = "default";
 361	pinctrl-0 = <&pinctrl_flexcan3>;
 362};
 363
 364&hsio_phy {
 365	fsl,hsio-cfg = "pciea-pcieb-sata";
 366	fsl,refclk-pad-mode = "input";
 367	status = "okay";
 368};
 369
 370&hsio_refa_clk {
 371	pinctrl-names = "default";
 372	pinctrl-0 = <&pinctrl_pcie_sata_refclk>;
 373	enable-gpios = <&lsio_gpio4 11 GPIO_ACTIVE_HIGH>;
 374};
 375
 376&hsio_refb_clk {
 377	pinctrl-names = "default";
 378	pinctrl-0 = <&pinctrl_pcie_wifi_refclk>;
 379	clocks = <&hsio_refa_clk>;
 380	enable-gpios = <&lsio_gpio2 11 GPIO_ACTIVE_HIGH>;
 381};
 382
 383/* TODO: Apalis HDMI1 */
 384
 385&gpu_alert0 {
 386	temperature = <95000>;
 387};
 388
 389&gpu_alert1 {
 390	temperature = <95000>;
 391};
 392
 393&gpu_crit0 {
 394	temperature = <105000>;
 395};
 396
 397&gpu_crit1 {
 398	temperature = <105000>;
 399};
 400
 401/* On-module I2C */
 402&i2c1 {
 403	pinctrl-names = "default";
 404	pinctrl-0 = <&pinctrl_lpi2c1>;
 405	#address-cells = <1>;
 406	#size-cells = <0>;
 407	clock-frequency = <100000>;
 408	status = "okay";
 409
 410	/* USB3503A */
 411	usb-hub@8 {
 412		compatible = "smsc,usb3503a";
 413		reg = <0x08>;
 414		pinctrl-names = "default";
 415		pinctrl-0 = <&pinctrl_usb3503a>;
 416		connect-gpios = <&lsio_gpio0 31 GPIO_ACTIVE_LOW>;
 417		initial-mode = <1>;
 418		intn-gpios = <&lsio_gpio1 1 GPIO_ACTIVE_HIGH>;
 419		refclk-frequency = <25000000>;
 420		reset-gpios = <&lsio_gpio1 2 GPIO_ACTIVE_LOW>;
 421	};
 422	
 423	/* On Module Audio Codec */
 424	sgtl5000: audio-codec@a {
 425		compatible = "fsl,sgtl5000";
 426		reg = <0x0a>;
 427		assigned-clocks = <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_PLL>,
 428				  <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_SLV_BUS>,
 429				  <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_MST_BUS>,
 430				  <&mclkout0_lpcg IMX_LPCG_CLK_0>;
 431		assigned-clock-rates = <786432000>, <49152000>, <12288000>, <12288000>;
 432		clocks = <&mclkout0_lpcg IMX_LPCG_CLK_0>;
 433		pinctrl-names = "default";
 434		pinctrl-0 = <&pinctrl_sgtl5000>;
 435		#sound-dai-cells = <0>;
 436		VDDA-supply = <&reg_module_3v3_avdd>;
 437		VDDD-supply = <&reg_vref_1v8>;
 438		VDDIO-supply = <&reg_module_3v3>;
 439	};
 440};
 441
 442/* Apalis I2C1 */
 443&i2c2 {
 444	pinctrl-names = "default";
 445	pinctrl-0 = <&pinctrl_lpi2c2>;
 446	#address-cells = <1>;
 447	#size-cells = <0>;
 448	clock-frequency = <100000>;
 449
 450	atmel_mxt_ts: touch@4a {
 451		compatible = "atmel,maxtouch";
 452		reg = <0x4a>;
 453		interrupt-parent = <&lsio_gpio4>;
 454		interrupts = <1 IRQ_TYPE_EDGE_FALLING>;		/* Apalis GPIO5 */
 455		pinctrl-names = "default";
 456		pinctrl-0 = <&pinctrl_gpio5>, <&pinctrl_gpio6>;
 457		reset-gpios = <&lsio_gpio4 2 GPIO_ACTIVE_LOW>;	/* Apalis GPIO6 */
 458		status = "disabled";
 459	};
 460
 461	/* M41T0M6 real time clock on carrier board */
 462	rtc_i2c: rtc@68 {
 463		compatible = "st,m41t0";
 464		reg = <0x68>;
 465		status = "disabled";
 466	};
 467};
 468
 469/* Apalis I2C3 (CAM) */
 470&i2c3 {
 471	pinctrl-names = "default";
 472	pinctrl-0 = <&pinctrl_lpi2c3>;
 473	#address-cells = <1>;
 474	#size-cells = <0>;
 475	clock-frequency = <100000>;
 476};
 477
 478&jpegdec {
 479	status = "okay";
 480};
 481
 482&jpegenc {
 483	status = "okay";
 484};
 485
 486/* TODO: Apalis LVDS1 */
 487
 488/* Apalis SPI1 */
 489&lpspi0 {
 490	pinctrl-names = "default";
 491	pinctrl-0 = <&pinctrl_lpspi0>;
 492	#address-cells = <1>;
 493	#size-cells = <0>;
 494	cs-gpios = <&lsio_gpio3 5 GPIO_ACTIVE_LOW>;
 495};
 496
 497/* Apalis SPI2 */
 498&lpspi2 {
 499	pinctrl-names = "default";
 500	pinctrl-0 = <&pinctrl_lpspi2>;
 501	#address-cells = <1>;
 502	#size-cells = <0>;
 503	cs-gpios = <&lsio_gpio3 10 GPIO_ACTIVE_LOW>;
 504};
 505
 506/* Apalis UART3 */
 507&lpuart0 {
 508	pinctrl-names = "default";
 509	pinctrl-0 = <&pinctrl_lpuart0>;
 510};
 511
 512/* Apalis UART1 */
 513&lpuart1 {
 514	pinctrl-names = "default";
 515	pinctrl-0 = <&pinctrl_lpuart1>;
 516};
 517
 518/* Apalis UART4 */
 519&lpuart2 {
 520	pinctrl-names = "default";
 521	pinctrl-0 = <&pinctrl_lpuart2>;
 522};
 523
 524/* Apalis UART2 */
 525&lpuart3 {
 526	pinctrl-names = "default";
 527	pinctrl-0 = <&pinctrl_lpuart3>;
 528};
 529
 530&lsio_gpio0 {
 531	gpio-line-names = "MXM3_279",
 532			  "MXM3_277",
 533			  "MXM3_135",
 534			  "MXM3_203",
 535			  "MXM3_201",
 536			  "MXM3_275",
 537			  "MXM3_110",
 538			  "MXM3_120",
 539			  "MXM3_1/GPIO1",
 540			  "MXM3_3/GPIO2",
 541			  "MXM3_124",
 542			  "MXM3_122",
 543			  "MXM3_5/GPIO3",
 544			  "MXM3_7/GPIO4",
 545			  "",
 546			  "",
 547			  "MXM3_4",
 548			  "MXM3_211",
 549			  "MXM3_209",
 550			  "MXM3_2",
 551			  "MXM3_136",
 552			  "MXM3_134",
 553			  "MXM3_6",
 554			  "MXM3_8",
 555			  "MXM3_112",
 556			  "MXM3_118",
 557			  "MXM3_114",
 558			  "MXM3_116",
 559			  "",
 560			  "",
 561			  "MXM3_26";
 562};
 563
 564&lsio_gpio1 {
 565	gpio-line-names = "",
 566			  "",
 567			  "",
 568			  "",
 569			  "MXM3_286",
 570			  "",
 571			  "MXM3_87",
 572			  "MXM3_99",
 573			  "MXM3_138",
 574			  "MXM3_140",
 575			  "MXM3_239",
 576			  "",
 577			  "MXM3_281",
 578			  "MXM3_283",
 579			  "MXM3_126",
 580			  "MXM3_132",
 581			  "",
 582			  "",
 583			  "",
 584			  "",
 585			  "MXM3_173",
 586			  "MXM3_175",
 587			  "MXM3_123";
 588
 589	hdmi-ctrl-hog {
 590		pinctrl-names = "default";
 591		pinctrl-0 = <&pinctrl_hdmi_ctrl>;
 592		gpio-hog;
 593		gpios = <30 GPIO_ACTIVE_HIGH>;
 594		line-name = "CONNECTOR_IS_HDMI";
 595		/* Set signals depending on HDP device type, 0 DP, 1 HDMI */
 596		output-high;
 597	};
 598};
 599
 600&lsio_gpio2 {
 601	gpio-line-names = "",
 602			  "",
 603			  "",
 604			  "",
 605			  "",
 606			  "",
 607			  "",
 608			  "MXM3_198",
 609			  "MXM3_35",
 610			  "MXM3_164",
 611			  "",
 612			  "",
 613			  "",
 614			  "",
 615			  "MXM3_217",
 616			  "MXM3_215",
 617			  "",
 618			  "",
 619			  "MXM3_193",
 620			  "MXM3_194",
 621			  "MXM3_37",
 622			  "",
 623			  "MXM3_271",
 624			  "MXM3_273",
 625			  "MXM3_195",
 626			  "MXM3_197",
 627			  "MXM3_177",
 628			  "MXM3_179",
 629			  "MXM3_181",
 630			  "MXM3_183",
 631			  "MXM3_185",
 632			  "MXM3_187";
 633};
 634
 635&lsio_gpio3 {
 636	gpio-line-names = "MXM3_191",
 637			  "",
 638			  "MXM3_221",
 639			  "MXM3_225",
 640			  "MXM3_223",
 641			  "MXM3_227",
 642			  "MXM3_200",
 643			  "MXM3_235",
 644			  "MXM3_231",
 645			  "MXM3_229",
 646			  "MXM3_233",
 647			  "MXM3_204",
 648			  "MXM3_196",
 649			  "",
 650			  "MXM3_202",
 651			  "",
 652			  "",
 653			  "",
 654			  "MXM3_305",
 655			  "MXM3_307",
 656			  "MXM3_309",
 657			  "MXM3_311",
 658			  "MXM3_315",
 659			  "MXM3_317",
 660			  "MXM3_319",
 661			  "MXM3_321",
 662			  "MXM3_15/GPIO7",
 663			  "MXM3_63",
 664			  "MXM3_17/GPIO8",
 665			  "MXM3_12",
 666			  "MXM3_14",
 667			  "MXM3_16";
 668};
 669
 670&lsio_gpio4 {
 671	gpio-line-names = "MXM3_18",
 672			  "MXM3_11/GPIO5",
 673			  "MXM3_13/GPIO6",
 674			  "MXM3_274",
 675			  "MXM3_84",
 676			  "MXM3_262",
 677			  "MXM3_96",
 678			  "",
 679			  "",
 680			  "",
 681			  "",
 682			  "",
 683			  "MXM3_190",
 684			  "",
 685			  "",
 686			  "",
 687			  "MXM3_269",
 688			  "MXM3_251",
 689			  "MXM3_253",
 690			  "MXM3_295",
 691			  "MXM3_299",
 692			  "MXM3_301",
 693			  "MXM3_297",
 694			  "MXM3_293",
 695			  "MXM3_291",
 696			  "MXM3_289",
 697			  "MXM3_287";
 698};
 699
 700&lsio_gpio5 {
 701	gpio-line-names = "",
 702			  "",
 703			  "",
 704			  "",
 705			  "",
 706			  "",
 707			  "",
 708			  "",
 709			  "",
 710			  "",
 711			  "",
 712			  "",
 713			  "",
 714			  "",
 715			  "MXM3_150",
 716			  "MXM3_160",
 717			  "MXM3_162",
 718			  "MXM3_144",
 719			  "MXM3_146",
 720			  "MXM3_148",
 721			  "MXM3_152",
 722			  "MXM3_156",
 723			  "MXM3_158",
 724			  "MXM3_159",
 725			  "MXM3_184",
 726			  "MXM3_180",
 727			  "MXM3_186",
 728			  "MXM3_188",
 729			  "MXM3_176",
 730			  "MXM3_178";
 731};
 732
 733&lsio_gpio6 {
 734	gpio-line-names = "",
 735			  "",
 736			  "",
 737			  "",
 738			  "",
 739			  "",
 740			  "",
 741			  "",
 742			  "",
 743			  "",
 744			  "MXM3_261",
 745			  "MXM3_263",
 746			  "MXM3_259",
 747			  "MXM3_257",
 748			  "MXM3_255",
 749			  "MXM3_128",
 750			  "MXM3_130",
 751			  "MXM3_265",
 752			  "MXM3_249",
 753			  "MXM3_247",
 754			  "MXM3_245",
 755			  "MXM3_243";
 756};
 757
 758/* Apalis PWM3, MXM3 pin 6 */
 759&lsio_pwm0 {
 760	pinctrl-names = "default";
 761	pinctrl-0 = <&pinctrl_pwm0>;
 762	#pwm-cells = <3>;
 763};
 764
 765/* Apalis PWM4, MXM3 pin 8 */
 766&lsio_pwm1 {
 767	pinctrl-names = "default";
 768	pinctrl-0 = <&pinctrl_pwm1>;
 769	#pwm-cells = <3>;
 770};
 771
 772/* Apalis PWM1, MXM3 pin 2 */
 773&lsio_pwm2 {
 774	pinctrl-names = "default";
 775	pinctrl-0 = <&pinctrl_pwm2>;
 776	#pwm-cells = <3>;
 777};
 778
 779/* Apalis PWM2, MXM3 pin 4 */
 780&lsio_pwm3 {
 781	pinctrl-names = "default";
 782	pinctrl-0 = <&pinctrl_pwm3>;
 783	#pwm-cells = <3>;
 784};
 785
 786/* Messaging Units */
 787&mu_m0 {
 788	status = "okay";
 789};
 790
 791&mu1_m0 {
 792	status = "okay";
 793};
 794
 795&mu2_m0 {
 796	status = "okay";
 797};
 798
 799/* Apalis PCIE1 */
 800&pciea {
 801	pinctrl-names = "default";
 802	pinctrl-0 = <&pinctrl_reset_moci>;
 803	phys = <&hsio_phy 0 PHY_TYPE_PCIE 0>;
 804	phy-names = "pcie-phy";
 805	reset-gpio = <&lsio_gpio0 30 GPIO_ACTIVE_LOW>;
 806	vpcie-supply = <&reg_pcie_switch>;
 807};
 808
 809/* On-module Wi-Fi */
 810&pcieb {
 811	pinctrl-names = "default";
 812	pinctrl-0 = <&pinctrl_pcieb>, <&pinctrl_wifi>;
 813	phys = <&hsio_phy 1 PHY_TYPE_PCIE 1>;
 814	phy-names = "pcie-phy";
 815	reset-gpio = <&lsio_gpio5 0 GPIO_ACTIVE_LOW>;
 816	status = "okay";
 817};
 818
 819&phyx2_lpcg {
 820	clocks = <&hsio_refa_clk>, <&hsio_refb_clk>,
 821		 <&hsio_refa_clk>, <&hsio_per_clk>;
 822};
 823
 824&pwm_lvds1 {
 825	pinctrl-names = "default";
 826	pinctrl-0 = <&pinctrl_pwm_bkl>;
 827};
 828
 829/* Apalis DAP1 */
 830&sai1 {
 831	assigned-clocks = <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_PLL>,
 832			  <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_SLV_BUS>,
 833			  <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_MST_BUS>,
 834			  <&sai1_lpcg IMX_LPCG_CLK_0>;
 835	assigned-clock-rates = <786432000>, <49152000>, <12288000>, <49152000>;
 836	pinctrl-names = "default";
 837	pinctrl-0 = <&pinctrl_sai1>;
 838	#sound-dai-cells = <0>;
 839	status = "okay";
 840};
 841
 842/* Apalis HDMI Audio */
 843&sai5 {
 844	assigned-clocks = <&acm IMX_ADMA_ACM_SAI5_MCLK_SEL>,
 845			  <&acm IMX_ADMA_ACM_AUD_CLK1_SEL>,
 846			  <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_PLL>,
 847			  <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_SLV_BUS>,
 848			  <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_MST_BUS>,
 849			  <&clk IMX_SC_R_AUDIO_PLL_1 IMX_SC_PM_CLK_PLL>,
 850			  <&clk IMX_SC_R_AUDIO_PLL_1 IMX_SC_PM_CLK_SLV_BUS>,
 851			  <&clk IMX_SC_R_AUDIO_PLL_1 IMX_SC_PM_CLK_MST_BUS>,
 852			  <&sai5_lpcg 0>;
 853	assigned-clock-parents = <&aud_pll_div0_lpcg 0>, <&aud_rec1_lpcg 0>;
 854	assigned-clock-rates = <0>, <0>, <786432000>, <49152000>, <12288000>,
 855			       <722534400>, <45158400>, <11289600>, <49152000>;
 856};
 857
 858/* Apalis SPDIF1 */
 859&spdif0 {
 860	assigned-clocks = <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_PLL>,
 861			  <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_SLV_BUS>,
 862			  <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_MST_BUS>;
 863	assigned-clock-rates = <786432000>, <49152000>, <12288000>;
 864	pinctrl-names = "default";
 865	pinctrl-0 = <&pinctrl_spdif0>;
 866	status = "okay";
 867};
 868
 869/* TODO: Apalis USBH2, Apalis USBH3 and on-module Wi-Fi via on-module HSIC Hub */
 870
 871/* Apalis USBH4 */
 872&usb3_phy {
 873	status = "okay";
 874};
 875
 876&usbotg3 {
 877	status = "okay";
 878};
 879
 880&usbotg3_cdns3 {
 881	dr_mode = "host";
 882};
 883
 884/* Apalis USBO1 */
 885&usbphy1 {
 886	phy-3p0-supply = <&reg_usb_phy>;
 887	status = "okay";
 888};
 889
 890&usbotg1 {
 891	pinctrl-names = "default";
 892	pinctrl-0 = <&pinctrl_usbotg1>;
 893	adp-disable;
 894	hnp-disable;
 895	over-current-active-low;
 896	power-active-high;
 897	srp-disable;
 898};
 899
 900/* On-module eMMC */
 901&usdhc1 {
 902	pinctrl-names = "default", "state_100mhz", "state_200mhz";
 903	pinctrl-0 = <&pinctrl_usdhc1>;
 904	pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
 905	pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
 906	bus-width = <8>;
 907	non-removable;
 908	status = "okay";
 909};
 910
 911/* Apalis MMC1 */
 912&usdhc2 {
 913	pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep";
 914	pinctrl-0 = <&pinctrl_usdhc2_4bit>,
 915		    <&pinctrl_usdhc2_8bit>,
 916		    <&pinctrl_mmc1_cd>;
 917	pinctrl-1 = <&pinctrl_usdhc2_4bit_100mhz>,
 918		    <&pinctrl_usdhc2_8bit_100mhz>,
 919		    <&pinctrl_mmc1_cd>;
 920	pinctrl-2 = <&pinctrl_usdhc2_4bit_200mhz>,
 921		    <&pinctrl_usdhc2_8bit_200mhz>,
 922		    <&pinctrl_mmc1_cd>;
 923	pinctrl-3 = <&pinctrl_usdhc2_4bit_sleep>,
 924		    <&pinctrl_usdhc2_8bit_sleep>,
 925		    <&pinctrl_mmc1_cd_sleep>;
 926	bus-width = <8>;
 927	cd-gpios = <&lsio_gpio2 9 GPIO_ACTIVE_LOW>; /* Apalis MMC1_CD# */
 928	no-1-8-v;
 929};
 930
 931/* Apalis SD1 */
 932&usdhc3 {
 933	pinctrl-names = "default", "state_100mhz", "state_200mhz";
 934	pinctrl-0 = <&pinctrl_usdhc3>, <&pinctrl_sd1_cd>;
 935	pinctrl-1 = <&pinctrl_usdhc3_100mhz>, <&pinctrl_sd1_cd>;
 936	pinctrl-2 = <&pinctrl_usdhc3_200mhz>, <&pinctrl_sd1_cd>;
 937	bus-width = <4>;
 938	cd-gpios = <&lsio_gpio4 12 GPIO_ACTIVE_LOW>; /* Apalis SD1_CD# */
 939	no-1-8-v;
 940};
 941
 942/* Video Processing Unit */
 943&vpu {
 944	compatible = "nxp,imx8qm-vpu";
 945	status = "okay";
 946};
 947
 948&vpu_core0 {
 949	reg = <0x2d080000 0x10000>;
 950	memory-region = <&decoder_boot>, <&decoder_rpc>;
 951	status = "okay";
 952};
 953
 954&vpu_core1 {
 955	reg = <0x2d090000 0x10000>;
 956	memory-region = <&encoder1_boot>, <&encoder1_rpc>;
 957	status = "okay";
 958};
 959
 960&vpu_core2 {
 961	reg = <0x2d0a0000 0x10000>;
 962	memory-region = <&encoder2_boot>, <&encoder2_rpc>;
 963	status = "okay";
 964};
 965
 966&iomuxc {
 967	pinctrl-names = "default";
 968	pinctrl-0 = <&pinctrl_cam1_gpios>, <&pinctrl_dap1_gpios>,
 969		    <&pinctrl_esai0_gpios>, <&pinctrl_fec2_gpios>,
 970		    <&pinctrl_gpio3>, <&pinctrl_gpio4>, <&pinctrl_gpio_keys>,
 971		    <&pinctrl_gpio_usbh_oc_n>, <&pinctrl_lpuart1ctrl>,
 972		    <&pinctrl_lvds0_i2c0_gpio>, <&pinctrl_lvds1_i2c0_gpios>,
 973		    <&pinctrl_mipi_dsi_0_1_en>, <&pinctrl_mipi_dsi1_gpios>,
 974		    <&pinctrl_mlb_gpios>, <&pinctrl_qspi1a_gpios>,
 975		    <&pinctrl_sata1_act>, <&pinctrl_sim0_gpios>,
 976		    <&pinctrl_usdhc1_gpios>;
 977
 978	/* Apalis AN1_ADC */
 979	pinctrl_adc0: adc0grp {
 980		fsl,pins = /* Apalis AN1_ADC0 */
 981			   <IMX8QM_ADC_IN0_DMA_ADC0_IN0				0xc0000060>,
 982			   /* Apalis AN1_ADC1 */
 983			   <IMX8QM_ADC_IN1_DMA_ADC0_IN1				0xc0000060>,
 984			   /* Apalis AN1_ADC2 */
 985			   <IMX8QM_ADC_IN2_DMA_ADC0_IN2				0xc0000060>,
 986			   /* Apalis AN1_TSWIP_ADC3 */
 987			   <IMX8QM_ADC_IN3_DMA_ADC0_IN3				0xc0000060>;
 988	};
 989
 990	/* Apalis AN1_TS */
 991	pinctrl_adc1: adc1grp {
 992		fsl,pins = /* Apalis AN1_TSPX */
 993			   <IMX8QM_ADC_IN4_DMA_ADC1_IN0				0xc0000060>,
 994			   /* Apalis AN1_TSMX */
 995			   <IMX8QM_ADC_IN5_DMA_ADC1_IN1				0xc0000060>,
 996			   /* Apalis AN1_TSPY */
 997			   <IMX8QM_ADC_IN6_DMA_ADC1_IN2				0xc0000060>,
 998			   /* Apalis AN1_TSMY */
 999			   <IMX8QM_ADC_IN7_DMA_ADC1_IN3				0xc0000060>;
1000	};
1001
1002	/* Apalis CAM1 */
1003	pinctrl_cam1_gpios: cam1gpiosgrp {
1004		fsl,pins = /* Apalis CAM1_D7 */
1005			   <IMX8QM_MIPI_DSI1_I2C0_SCL_LSIO_GPIO1_IO20		0x00000021>,
1006			   /* Apalis CAM1_D6 */
1007			   <IMX8QM_MIPI_DSI1_I2C0_SDA_LSIO_GPIO1_IO21		0x00000021>,
1008			   /* Apalis CAM1_D5 */
1009			   <IMX8QM_ESAI0_TX0_LSIO_GPIO2_IO26			0x00000021>,
1010			   /* Apalis CAM1_D4 */
1011			   <IMX8QM_ESAI0_TX1_LSIO_GPIO2_IO27			0x00000021>,
1012			   /* Apalis CAM1_D3 */
1013			   <IMX8QM_ESAI0_TX2_RX3_LSIO_GPIO2_IO28		0x00000021>,
1014			   /* Apalis CAM1_D2 */
1015			   <IMX8QM_ESAI0_TX3_RX2_LSIO_GPIO2_IO29		0x00000021>,
1016			   /* Apalis CAM1_D1 */
1017			   <IMX8QM_ESAI0_TX4_RX1_LSIO_GPIO2_IO30		0x00000021>,
1018			   /* Apalis CAM1_D0 */
1019			   <IMX8QM_ESAI0_TX5_RX0_LSIO_GPIO2_IO31		0x00000021>,
1020			   /* Apalis CAM1_PCLK */
1021			   <IMX8QM_MCLK_IN0_LSIO_GPIO3_IO00			0x00000021>,
1022			   /* Apalis CAM1_MCLK */
1023			   <IMX8QM_SPI3_SDO_LSIO_GPIO2_IO18			0x00000021>,
1024			   /* Apalis CAM1_VSYNC */
1025			   <IMX8QM_ESAI0_SCKR_LSIO_GPIO2_IO24			0x00000021>,
1026			   /* Apalis CAM1_HSYNC */
1027			   <IMX8QM_ESAI0_SCKT_LSIO_GPIO2_IO25			0x00000021>;
1028	};
1029
1030	/* Apalis DAP1 */
1031	pinctrl_dap1_gpios: dap1gpiosgrp {
1032		fsl,pins = /* Apalis DAP1_MCLK */
1033			   <IMX8QM_SPI3_SDI_LSIO_GPIO2_IO19			0x00000021>,
1034			   /* Apalis DAP1_D_OUT */
1035			   <IMX8QM_SAI1_RXC_LSIO_GPIO3_IO12			0x00000021>,
1036			   /* Apalis DAP1_RESET */
1037			   <IMX8QM_ESAI1_SCKT_LSIO_GPIO2_IO07			0x00000021>,
1038			   /* Apalis DAP1_BIT_CLK */
1039			   <IMX8QM_SPI0_CS1_LSIO_GPIO3_IO06			0x00000021>,
1040			   /* Apalis DAP1_D_IN */
1041			   <IMX8QM_SAI1_RXFS_LSIO_GPIO3_IO14			0x00000021>,
1042			   /* Apalis DAP1_SYNC */
1043			   <IMX8QM_SPI2_CS1_LSIO_GPIO3_IO11			0x00000021>,
1044			   /* On-module Wi-Fi_I2S_EN# */
1045			   <IMX8QM_ESAI1_TX5_RX0_LSIO_GPIO2_IO13		0x00000021>;
1046	};
1047
1048	/* Apalis LCD1_G1+2 */
1049	pinctrl_esai0_gpios: esai0gpiosgrp {
1050		fsl,pins = /* Apalis LCD1_G1 */
1051			   <IMX8QM_ESAI0_FSR_LSIO_GPIO2_IO22			0x00000021>,
1052			   /* Apalis LCD1_G2 */
1053			   <IMX8QM_ESAI0_FST_LSIO_GPIO2_IO23			0x00000021>;
1054	};
1055
1056	/* On-module Gigabit Ethernet PHY Micrel KSZ9031 for Apalis GLAN */
1057	pinctrl_fec1: fec1grp {
1058		fsl,pins = /* Use pads in 3.3V mode */
1059			   <IMX8QM_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB_PAD			0x000014a0>,
1060			   <IMX8QM_ENET0_MDC_CONN_ENET0_MDC				0x06000020>,
1061			   <IMX8QM_ENET0_MDIO_CONN_ENET0_MDIO				0x06000020>,
1062			   <IMX8QM_ENET0_RGMII_TX_CTL_CONN_ENET0_RGMII_TX_CTL		0x06000020>,
1063			   <IMX8QM_ENET0_RGMII_TXC_CONN_ENET0_RGMII_TXC			0x06000020>,
1064			   <IMX8QM_ENET0_RGMII_TXD0_CONN_ENET0_RGMII_TXD0		0x06000020>,
1065			   <IMX8QM_ENET0_RGMII_TXD1_CONN_ENET0_RGMII_TXD1		0x06000020>,
1066			   <IMX8QM_ENET0_RGMII_TXD2_CONN_ENET0_RGMII_TXD2		0x06000020>,
1067			   <IMX8QM_ENET0_RGMII_TXD3_CONN_ENET0_RGMII_TXD3		0x06000020>,
1068			   <IMX8QM_ENET0_RGMII_RXC_CONN_ENET0_RGMII_RXC			0x06000020>,
1069			   <IMX8QM_ENET0_RGMII_RX_CTL_CONN_ENET0_RGMII_RX_CTL		0x06000020>,
1070			   <IMX8QM_ENET0_RGMII_RXD0_CONN_ENET0_RGMII_RXD0		0x06000020>,
1071			   <IMX8QM_ENET0_RGMII_RXD1_CONN_ENET0_RGMII_RXD1		0x06000020>,
1072			   <IMX8QM_ENET0_RGMII_RXD2_CONN_ENET0_RGMII_RXD2		0x06000020>,
1073			   <IMX8QM_ENET0_RGMII_RXD3_CONN_ENET0_RGMII_RXD3		0x06000020>,
1074			   <IMX8QM_ENET0_REFCLK_125M_25M_CONN_ENET0_REFCLK_125M_25M	0x06000020>,
1075			   /* On-module ETH_RESET# */
1076			   <IMX8QM_LVDS1_GPIO01_LSIO_GPIO1_IO11				0x06000020>,
1077			   /* On-module ETH_INT# */
1078			   <IMX8QM_MIPI_CSI1_MCLK_OUT_LSIO_GPIO1_IO29			0x04000060>;
1079	};
1080
1081	pinctrl_fec1_sleep: fec1-sleepgrp {
1082		fsl,pins = <IMX8QM_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB_PAD		0x000014a0>,
1083			   <IMX8QM_ENET0_MDC_LSIO_GPIO4_IO14			0x04000040>,
1084			   <IMX8QM_ENET0_MDIO_LSIO_GPIO4_IO13			0x04000040>,
1085			   <IMX8QM_ENET0_RGMII_TX_CTL_LSIO_GPIO5_IO31		0x04000040>,
1086			   <IMX8QM_ENET0_RGMII_TXC_LSIO_GPIO5_IO30		0x04000040>,
1087			   <IMX8QM_ENET0_RGMII_TXD0_LSIO_GPIO6_IO00		0x04000040>,
1088			   <IMX8QM_ENET0_RGMII_TXD1_LSIO_GPIO6_IO01		0x04000040>,
1089			   <IMX8QM_ENET0_RGMII_TXD2_LSIO_GPIO6_IO02		0x04000040>,
1090			   <IMX8QM_ENET0_RGMII_TXD3_LSIO_GPIO6_IO03		0x04000040>,
1091			   <IMX8QM_ENET0_RGMII_RXC_LSIO_GPIO6_IO04		0x04000040>,
1092			   <IMX8QM_ENET0_RGMII_RX_CTL_LSIO_GPIO6_IO05		0x04000040>,
1093			   <IMX8QM_ENET0_RGMII_RXD0_LSIO_GPIO6_IO06		0x04000040>,
1094			   <IMX8QM_ENET0_RGMII_RXD1_LSIO_GPIO6_IO07		0x04000040>,
1095			   <IMX8QM_ENET0_RGMII_RXD2_LSIO_GPIO6_IO08		0x04000040>,
1096			   <IMX8QM_ENET0_RGMII_RXD3_LSIO_GPIO6_IO09		0x04000040>,
1097			   <IMX8QM_ENET0_REFCLK_125M_25M_LSIO_GPIO4_IO15	0x04000040>,
1098			   <IMX8QM_LVDS1_GPIO01_LSIO_GPIO1_IO11			0x06000020>,
1099			   <IMX8QM_MIPI_CSI1_MCLK_OUT_LSIO_GPIO1_IO29		0x04000040>;
1100	};
1101
1102	/* Apalis LCD1_ */
1103	pinctrl_fec2_gpios: fec2gpiosgrp {
1104		fsl,pins = <IMX8QM_COMP_CTL_GPIO_1V8_3V3_ENET_ENETA_PAD		0x000014a0>,
1105			   /* Apalis LCD1_R1 */
1106			   <IMX8QM_ENET1_MDC_LSIO_GPIO4_IO18			0x00000021>,
1107			   /* Apalis LCD1_R0 */
1108			   <IMX8QM_ENET1_MDIO_LSIO_GPIO4_IO17			0x00000021>,
1109			   /* Apalis LCD1_G0 */
1110			   <IMX8QM_ENET1_REFCLK_125M_25M_LSIO_GPIO4_IO16	0x00000021>,
1111			   /* Apalis LCD1_R7 */
1112			   <IMX8QM_ENET1_RGMII_RX_CTL_LSIO_GPIO6_IO17		0x00000021>,
1113			   /* Apalis LCD1_DE */
1114			   <IMX8QM_ENET1_RGMII_RXD0_LSIO_GPIO6_IO18		0x00000021>,
1115			   /* Apalis LCD1_HSYNC */
1116			   <IMX8QM_ENET1_RGMII_RXD1_LSIO_GPIO6_IO19		0x00000021>,
1117			   /* Apalis LCD1_VSYNC */
1118			   <IMX8QM_ENET1_RGMII_RXD2_LSIO_GPIO6_IO20		0x00000021>,
1119			   /* Apalis LCD1_PCLK */
1120			   <IMX8QM_ENET1_RGMII_RXD3_LSIO_GPIO6_IO21		0x00000021>,
1121			   /* Apalis LCD1_R6 */
1122			   <IMX8QM_ENET1_RGMII_TX_CTL_LSIO_GPIO6_IO11		0x00000021>,
1123			   /* Apalis LCD1_R5 */
1124			   <IMX8QM_ENET1_RGMII_TXC_LSIO_GPIO6_IO10		0x00000021>,
1125			   /* Apalis LCD1_R4 */
1126			   <IMX8QM_ENET1_RGMII_TXD0_LSIO_GPIO6_IO12		0x00000021>,
1127			   /* Apalis LCD1_R3 */
1128			   <IMX8QM_ENET1_RGMII_TXD1_LSIO_GPIO6_IO13		0x00000021>,
1129			   /* Apalis LCD1_R2 */
1130			   <IMX8QM_ENET1_RGMII_TXD2_LSIO_GPIO6_IO14		0x00000021>;
1131	};
1132
1133	/* Apalis CAN1 */
1134	pinctrl_flexcan1: flexcan0grp {
1135		fsl,pins = <IMX8QM_FLEXCAN0_TX_DMA_FLEXCAN0_TX			0x00000021>,
1136			   <IMX8QM_FLEXCAN0_RX_DMA_FLEXCAN0_RX			0x00000021>;
1137	};
1138
1139	/* Apalis CAN2 */
1140	pinctrl_flexcan2: flexcan1grp {
1141		fsl,pins = <IMX8QM_FLEXCAN1_TX_DMA_FLEXCAN1_TX			0x00000021>,
1142			   <IMX8QM_FLEXCAN1_RX_DMA_FLEXCAN1_RX			0x00000021>;
1143	};
1144
1145	/* Apalis CAN3 (optional) */
1146	pinctrl_flexcan3: flexcan2grp {
1147		fsl,pins = <IMX8QM_FLEXCAN2_TX_DMA_FLEXCAN2_TX			0x00000021>,
1148			   <IMX8QM_FLEXCAN2_RX_DMA_FLEXCAN2_RX			0x00000021>;
1149	};
1150
1151	/* Apalis GPIO1 */
1152	pinctrl_gpio1: gpio1grp {
1153		fsl,pins = <IMX8QM_M40_GPIO0_00_LSIO_GPIO0_IO08			0x06000021>;
1154	};
1155
1156	/* Apalis GPIO2 */
1157	pinctrl_gpio2: gpio2grp {
1158		fsl,pins = <IMX8QM_M40_GPIO0_01_LSIO_GPIO0_IO09			0x06000021>;
1159	};
1160
1161	/* Apalis GPIO3 */
1162	pinctrl_gpio3: gpio3grp {
1163		fsl,pins = <IMX8QM_M41_GPIO0_00_LSIO_GPIO0_IO12			0x06000021>;
1164	};
1165
1166	/* Apalis GPIO4 */
1167	pinctrl_gpio4: gpio4grp {
1168		fsl,pins = <IMX8QM_M41_GPIO0_01_LSIO_GPIO0_IO13			0x06000021>;
1169	};
1170
1171	/* Apalis GPIO5 */
1172	pinctrl_gpio5: gpio5grp {
1173		fsl,pins = <IMX8QM_FLEXCAN2_RX_LSIO_GPIO4_IO01			0x06000021>;
1174	};
1175
1176	/* Apalis GPIO6 */
1177	pinctrl_gpio6: gpio6grp {
1178		fsl,pins = <IMX8QM_FLEXCAN2_TX_LSIO_GPIO4_IO02			0x00000021>;
1179	};
1180
1181	/* Apalis GPIO7 */
1182	pinctrl_gpio7: gpio7grp {
1183		fsl,pins = <IMX8QM_MLB_SIG_LSIO_GPIO3_IO26			0x00000021>;
1184	};
1185
1186	/* Apalis GPIO8 */
1187	pinctrl_gpio8: gpio8grp {
1188		fsl,pins = <IMX8QM_MLB_DATA_LSIO_GPIO3_IO28			0x00000021>;
1189	};
1190
1191	/* Apalis BKL1_ON */
1192	pinctrl_gpio_bkl_on: gpiobklongrp {
1193		fsl,pins = <IMX8QM_LVDS0_GPIO00_LSIO_GPIO1_IO04			0x00000021>;
1194	};
1195
1196	/* Apalis WAKE1_MICO */
1197	pinctrl_gpio_keys: gpiokeysgrp {
1198		fsl,pins = <IMX8QM_SPI3_CS0_LSIO_GPIO2_IO20			0x06700021>;
1199	};
1200
1201	/* Apalis USBH_OC# */
1202	pinctrl_gpio_usbh_oc_n: gpiousbhocngrp {
1203		fsl,pins = <IMX8QM_USB_SS3_TC3_LSIO_GPIO4_IO06			0x04000021>;
1204	};
1205
1206	/* On-module HDMI_CTRL */
1207	pinctrl_hdmi_ctrl: hdmictrlgrp {
1208		fsl,pins = <IMX8QM_MIPI_CSI1_GPIO0_00_LSIO_GPIO1_IO30		0x00000061>;
1209	};
1210
1211	/* On-module I2C */
1212	pinctrl_lpi2c1: lpi2c1grp {
1213		fsl,pins = <IMX8QM_GPT0_CLK_DMA_I2C1_SCL			0x04000020>,
1214			   <IMX8QM_GPT0_CAPTURE_DMA_I2C1_SDA			0x04000020>;
1215	};
1216
1217	/* Apalis I2C1 */
1218	pinctrl_lpi2c2: lpi2c2grp {
1219		fsl,pins = <IMX8QM_GPT1_CLK_DMA_I2C2_SCL			0x04000020>,
1220			   <IMX8QM_GPT1_CAPTURE_DMA_I2C2_SDA			0x04000020>;
1221	};
1222
1223	/* Apalis I2C3 (CAM) */
1224	pinctrl_lpi2c3: lpi2c3grp {
1225		fsl,pins = <IMX8QM_SIM0_PD_DMA_I2C3_SCL				0x04000020>,
1226			   <IMX8QM_SIM0_POWER_EN_DMA_I2C3_SDA			0x04000020>;
1227	};
1228
1229	/* Apalis SPI1 */
1230	pinctrl_lpspi0: lpspi0grp {
1231		fsl,pins = <IMX8QM_SPI0_SCK_DMA_SPI0_SCK			0x0600004c>,
1232			   <IMX8QM_SPI0_SDO_DMA_SPI0_SDO			0x0600004c>,
1233			   <IMX8QM_SPI0_SDI_DMA_SPI0_SDI			0x0600004c>,
1234			   <IMX8QM_SPI0_CS0_LSIO_GPIO3_IO05			0x0600004c>;
1235	};
1236
1237	/* Apalis SPI2 */
1238	pinctrl_lpspi2: lpspi2grp {
1239		fsl,pins = <IMX8QM_SPI2_SCK_DMA_SPI2_SCK			0x0600004c>,
1240			   <IMX8QM_SPI2_SDO_DMA_SPI2_SDO			0x0600004c>,
1241			   <IMX8QM_SPI2_SDI_DMA_SPI2_SDI			0x0600004c>,
1242			   <IMX8QM_SPI2_CS0_LSIO_GPIO3_IO10			0x0600004c>;
1243	};
1244
1245	/* Apalis UART3 */
1246	pinctrl_lpuart0: lpuart0grp {
1247		fsl,pins = <IMX8QM_UART0_RX_DMA_UART0_RX			0x06000020>,
1248			   <IMX8QM_UART0_TX_DMA_UART0_TX			0x06000020>;
1249	};
1250
1251	/* Apalis UART1 */
1252	pinctrl_lpuart1: lpuart1grp {
1253		fsl,pins = <IMX8QM_UART1_RX_DMA_UART1_RX			0x06000020>,
1254			   <IMX8QM_UART1_TX_DMA_UART1_TX			0x06000020>,
1255			   <IMX8QM_UART1_CTS_B_DMA_UART1_CTS_B			0x06000020>,
1256			   <IMX8QM_UART1_RTS_B_DMA_UART1_RTS_B			0x06000020>;
1257	};
1258
1259	/* Apalis UART1 */
1260	pinctrl_lpuart1ctrl: lpuart1ctrlgrp {
1261		fsl,pins = /* Apalis UART1_DTR */
1262			   <IMX8QM_M40_I2C0_SCL_LSIO_GPIO0_IO06			0x00000021>,
1263			   /* Apalis UART1_DSR */
1264			   <IMX8QM_M40_I2C0_SDA_LSIO_GPIO0_IO07			0x00000021>,
1265			   /* Apalis UART1_DCD */
1266			   <IMX8QM_M41_I2C0_SCL_LSIO_GPIO0_IO10			0x00000021>,
1267			   /* Apalis UART1_RI */
1268			   <IMX8QM_M41_I2C0_SDA_LSIO_GPIO0_IO11			0x00000021>;
1269	};
1270
1271	/* Apalis UART4 */
1272	pinctrl_lpuart2: lpuart2grp {
1273		fsl,pins = <IMX8QM_LVDS0_I2C1_SCL_DMA_UART2_TX			0x06000020>,
1274			   <IMX8QM_LVDS0_I2C1_SDA_DMA_UART2_RX			0x06000020>;
1275	};
1276
1277	/* Apalis UART2 */
1278	pinctrl_lpuart3: lpuart3grp {
1279		fsl,pins = <IMX8QM_LVDS1_I2C1_SCL_DMA_UART3_TX			0x06000020>,
1280			   <IMX8QM_LVDS1_I2C1_SDA_DMA_UART3_RX			0x06000020>,
1281			   <IMX8QM_ENET1_RGMII_TXD3_DMA_UART3_RTS_B		0x06000020>,
1282			   <IMX8QM_ENET1_RGMII_RXC_DMA_UART3_CTS_B		0x06000020>;
1283	};
1284
1285	/* Apalis TS_2 */
1286	pinctrl_lvds0_i2c0_gpio: lvds0i2c0gpiogrp {
1287		fsl,pins = <IMX8QM_LVDS0_I2C0_SCL_LSIO_GPIO1_IO06		0x00000021>;
1288	};
1289
1290	/* Apalis LCD1_G6+7 */
1291	pinctrl_lvds1_i2c0_gpios: lvds1i2c0gpiosgrp {
1292		fsl,pins = /* Apalis LCD1_G6 */
1293			   <IMX8QM_LVDS1_I2C0_SCL_LSIO_GPIO1_IO12		0x00000021>,
1294			   /* Apalis LCD1_G7 */
1295			   <IMX8QM_LVDS1_I2C0_SDA_LSIO_GPIO1_IO13		0x00000021>;
1296	};
1297
1298	/* Apalis TS_3 */
1299	pinctrl_mipi_dsi_0_1_en: mipidsi0-1engrp {
1300		fsl,pins = <IMX8QM_LVDS0_I2C0_SDA_LSIO_GPIO1_IO07		0x00000021>;
1301	};
1302
1303	/* Apalis TS_4 */
1304	pinctrl_mipi_dsi1_gpios: mipidsi1gpiosgrp {
1305		fsl,pins = <IMX8QM_MIPI_DSI1_GPIO0_00_LSIO_GPIO1_IO22		0x00000021>;
1306	};
1307
1308	/* Apalis TS_1 */
1309	pinctrl_mlb_gpios: mlbgpiosgrp {
1310		fsl,pins = <IMX8QM_MLB_CLK_LSIO_GPIO3_IO27			0x00000021>;
1311	};
1312
1313	/* Apalis MMC1_CD# */
1314	pinctrl_mmc1_cd: mmc1cdgrp {
1315		fsl,pins = <IMX8QM_ESAI1_TX1_LSIO_GPIO2_IO09			0x00000021>;
1316	};
1317
1318	pinctrl_mmc1_cd_sleep: mmc1cdsleepgrp {
1319		fsl,pins = <IMX8QM_ESAI1_TX1_LSIO_GPIO2_IO09			0x04000021>;
1320	};
1321
1322	/* On-module PCIe_Wi-Fi */
1323	pinctrl_pcieb: pciebgrp {
1324		fsl,pins = <IMX8QM_PCIE_CTRL1_CLKREQ_B_LSIO_GPIO4_IO30		0x00000021>,
1325			   <IMX8QM_PCIE_CTRL1_WAKE_B_LSIO_GPIO4_IO31		0x00000021>,
1326			   <IMX8QM_PCIE_CTRL1_PERST_B_LSIO_GPIO5_IO00		0x00000021>;
1327	};
1328
1329	/* On-module PCIe_CLK_EN1 */
1330	pinctrl_pcie_sata_refclk: pciesatarefclkgrp {
1331		fsl,pins = <IMX8QM_USDHC2_WP_LSIO_GPIO4_IO11			0x00000021>;
1332	};
1333
1334	/* On-module PCIe_CLK_EN2 */
1335	pinctrl_pcie_wifi_refclk: pciewifirefclkgrp {
1336		fsl,pins = <IMX8QM_ESAI1_TX3_RX2_LSIO_GPIO2_IO11		0x00000021>;
1337	};
1338
1339	/* Apalis PWM3 */
1340	pinctrl_pwm0: pwm0grp {
1341		fsl,pins = <IMX8QM_UART0_RTS_B_LSIO_PWM0_OUT			0x00000020>;
1342	};
1343
1344	/* Apalis PWM4 */
1345	pinctrl_pwm1: pwm1grp {
1346		fsl,pins = <IMX8QM_UART0_CTS_B_LSIO_PWM1_OUT			0x00000020>;
1347	};
1348
1349	/* Apalis PWM1 */
1350	pinctrl_pwm2: pwm2grp {
1351		fsl,pins = <IMX8QM_GPT1_COMPARE_LSIO_PWM2_OUT			0x00000020>;
1352	};
1353
1354	/* Apalis PWM2 */
1355	pinctrl_pwm3: pwm3grp {
1356		fsl,pins = <IMX8QM_GPT0_COMPARE_LSIO_PWM3_OUT			0x00000020>;
1357	};
1358
1359	/* Apalis BKL1_PWM */
1360	pinctrl_pwm_bkl: pwmbklgrp {
1361		fsl,pins = <IMX8QM_LVDS1_GPIO00_LVDS1_PWM0_OUT			0x00000020>;
1362	};
1363
1364	/* Apalis LCD1_ */
1365	pinctrl_qspi1a_gpios: qspi1agpiosgrp {
1366		fsl,pins = /* Apalis LCD1_B0 */
1367			   <IMX8QM_QSPI1A_DATA0_LSIO_GPIO4_IO26			0x00000021>,
1368			   /* Apalis LCD1_B1 */
1369			   <IMX8QM_QSPI1A_DATA1_LSIO_GPIO4_IO25			0x00000021>,
1370			   /* Apalis LCD1_B2 */
1371			   <IMX8QM_QSPI1A_DATA2_LSIO_GPIO4_IO24			0x00000021>,
1372			   /* Apalis LCD1_B3 */
1373			   <IMX8QM_QSPI1A_DATA3_LSIO_GPIO4_IO23			0x00000021>,
1374			   /* Apalis LCD1_B5 */
1375			   <IMX8QM_QSPI1A_DQS_LSIO_GPIO4_IO22			0x00000021>,
1376			   /* Apalis LCD1_B7 */
1377			   <IMX8QM_QSPI1A_SCLK_LSIO_GPIO4_IO21			0x00000021>,
1378			   /* Apalis LCD1_B4 */
1379			   <IMX8QM_QSPI1A_SS0_B_LSIO_GPIO4_IO19			0x00000021>,
1380			   /* Apalis LCD1_B6 */
1381			   <IMX8QM_QSPI1A_SS1_B_LSIO_GPIO4_IO20			0x00000021>;
1382	};
1383
1384	/* On-module RESET_MOCI#_DRV */
1385	pinctrl_reset_moci: resetmocigrp {
1386		fsl,pins = <IMX8QM_SCU_GPIO0_02_LSIO_GPIO0_IO30			0x00000021>;
1387	};
1388
1389	/* On-module I2S SGTL5000 for Apalis Analogue Audio */
1390	pinctrl_sai1: sai1grp {
1391		fsl,pins = <IMX8QM_SAI1_TXD_AUD_SAI1_TXD			0xc600006c>,
1392			   <IMX8QM_SAI1_RXD_AUD_SAI1_RXD			0xc600004c>,
1393			   <IMX8QM_SAI1_TXC_AUD_SAI1_TXC			0xc600004c>,
1394			   <IMX8QM_SAI1_TXFS_AUD_SAI1_TXFS			0xc600004c>;
1395	};
1396
1397	/* Apalis SATA1_ACT# */
1398	pinctrl_sata1_act: sata1actgrp {
1399		fsl,pins = <IMX8QM_ESAI1_TX0_LSIO_GPIO2_IO08			0x00000021>;
1400	};
1401
1402	/* Apalis SD1_CD# */
1403	pinctrl_sd1_cd: sd1cdgrp {
1404		fsl,pins = <IMX8QM_USDHC2_CD_B_LSIO_GPIO4_IO12			0x00000021>;
1405	};
1406
1407	/* On-module I2S SGTL5000 SYS_MCLK */
1408	pinctrl_sgtl5000: sgtl5000grp {
1409		fsl,pins = <IMX8QM_MCLK_OUT0_AUD_ACM_MCLK_OUT0			0xc600004c>;
1410	};
1411
1412	/* Apalis LCD1_ */
1413	pinctrl_sim0_gpios: sim0gpiosgrp {
1414		fsl,pins = /* Apalis LCD1_G5 */
1415			   <IMX8QM_SIM0_CLK_LSIO_GPIO0_IO00			0x00000021>,
1416			   /* Apalis LCD1_G3 */
1417			   <IMX8QM_SIM0_GPIO0_00_LSIO_GPIO0_IO05		0x00000021>,
1418			   /* Apalis TS_5 */
1419			   <IMX8QM_SIM0_IO_LSIO_GPIO0_IO02			0x00000021>,
1420			   /* Apalis LCD1_G4 */
1421			   <IMX8QM_SIM0_RST_LSIO_GPIO0_IO01			0x00000021>;
1422	};
1423
1424	/* Apalis SPDIF */
1425	pinctrl_spdif0: spdif0grp {
1426		fsl,pins = <IMX8QM_SPDIF0_TX_AUD_SPDIF0_TX			0xc6000040>,
1427			   <IMX8QM_SPDIF0_RX_AUD_SPDIF0_RX			0xc6000040>;
1428	};
1429
1430	pinctrl_touchctrl_gpios: touchctrlgpiosgrp {
1431		fsl,pins = <IMX8QM_ESAI1_FSR_LSIO_GPIO2_IO04			0x00000021>,
1432			   <IMX8QM_ESAI1_FST_LSIO_GPIO2_IO05			0x00000041>,
1433			   <IMX8QM_SPI3_SCK_LSIO_GPIO2_IO17			0x00000021>,
1434			   <IMX8QM_SPI3_CS1_LSIO_GPIO2_IO21			0x00000041>;
1435	};
1436
1437	pinctrl_touchctrl_idle: touchctrlidlegrp {
1438		fsl,pins = <IMX8QM_ADC_IN4_LSIO_GPIO3_IO22			0x00000021>,
1439			   <IMX8QM_ADC_IN5_LSIO_GPIO3_IO23			0x00000021>,
1440			   <IMX8QM_ADC_IN6_LSIO_GPIO3_IO24			0x00000021>,
1441			   <IMX8QM_ADC_IN7_LSIO_GPIO3_IO25			0x00000021>;
1442	};
1443
1444	/* On-module USB HSIC HUB (active) */
1445	pinctrl_usb_hsic_active: usbh1activegrp {
1446		fsl,pins = <IMX8QM_USB_HSIC0_DATA_CONN_USB_HSIC0_DATA		0x000000cf>,
1447			   <IMX8QM_USB_HSIC0_STROBE_CONN_USB_HSIC0_STROBE	0x000000ff>;
1448	};
1449
1450	/* On-module USB HSIC HUB (idle) */
1451	pinctrl_usb_hsic_idle: usbh1idlegrp {
1452		fsl,pins = <IMX8QM_USB_HSIC0_DATA_CONN_USB_HSIC0_DATA		0x000000cf>,
1453			   <IMX8QM_USB_HSIC0_STROBE_CONN_USB_HSIC0_STROBE	0x000000cf>;
1454	};
1455
1456	/* On-module USB HSIC HUB */
1457	pinctrl_usb3503a: usb3503agrp {
1458		fsl,pins = /* On-module HSIC_HUB_CONNECT */
1459			   <IMX8QM_SCU_GPIO0_03_LSIO_GPIO0_IO31			0x00000041>,
1460			   /* On-module HSIC_INT_N */
1461			   <IMX8QM_SCU_GPIO0_05_LSIO_GPIO1_IO01			0x00000021>,
1462			   /* On-module HSIC_RESET_N */
1463			   <IMX8QM_SCU_GPIO0_06_LSIO_GPIO1_IO02			0x00000041>;
1464	};
1465
1466	/* Apalis USBH_EN */
1467	pinctrl_usbh_en: usbhengrp {
1468		fsl,pins = <IMX8QM_USB_SS3_TC1_LSIO_GPIO4_IO04			0x00000021>;
1469	};
1470
1471	/* Apalis USBO1 */
1472	pinctrl_usbotg1: usbotg1grp {
1473		fsl,pins = /* Apalis USBO1_EN */
1474			   <IMX8QM_USB_SS3_TC0_CONN_USB_OTG1_PWR		0x00000021>,
1475			   /* Apalis USBO1_OC# */
1476			   <IMX8QM_USB_SS3_TC2_CONN_USB_OTG1_OC			0x04000021>;
1477	};
1478
1479	/* On-module eMMC */
1480	pinctrl_usdhc1: usdhc1grp {
1481		fsl,pins = <IMX8QM_EMMC0_CLK_CONN_EMMC0_CLK			0x06000041>,
1482			   <IMX8QM_EMMC0_CMD_CONN_EMMC0_CMD			0x00000021>,
1483			   <IMX8QM_EMMC0_DATA0_CONN_EMMC0_DATA0			0x00000021>,
1484			   <IMX8QM_EMMC0_DATA1_CONN_EMMC0_DATA1			0x00000021>,
1485			   <IMX8QM_EMMC0_DATA2_CONN_EMMC0_DATA2			0x00000021>,
1486			   <IMX8QM_EMMC0_DATA3_CONN_EMMC0_DATA3			0x00000021>,
1487			   <IMX8QM_EMMC0_DATA4_CONN_EMMC0_DATA4			0x00000021>,
1488			   <IMX8QM_EMMC0_DATA5_CONN_EMMC0_DATA5			0x00000021>,
1489			   <IMX8QM_EMMC0_DATA6_CONN_EMMC0_DATA6			0x00000021>,
1490			   <IMX8QM_EMMC0_DATA7_CONN_EMMC0_DATA7			0x00000021>,
1491			   <IMX8QM_EMMC0_STROBE_CONN_EMMC0_STROBE		0x06000041>,
1492			   <IMX8QM_EMMC0_RESET_B_CONN_EMMC0_RESET_B		0x00000021>;
1493	};
1494
1495	pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp {
1496		fsl,pins = <IMX8QM_EMMC0_CLK_CONN_EMMC0_CLK			0x06000040>,
1497			   <IMX8QM_EMMC0_CMD_CONN_EMMC0_CMD			0x00000020>,
1498			   <IMX8QM_EMMC0_DATA0_CONN_EMMC0_DATA0			0x00000020>,
1499			   <IMX8QM_EMMC0_DATA1_CONN_EMMC0_DATA1			0x00000020>,
1500			   <IMX8QM_EMMC0_DATA2_CONN_EMMC0_DATA2			0x00000020>,
1501			   <IMX8QM_EMMC0_DATA3_CONN_EMMC0_DATA3			0x00000020>,
1502			   <IMX8QM_EMMC0_DATA4_CONN_EMMC0_DATA4			0x00000020>,
1503			   <IMX8QM_EMMC0_DATA5_CONN_EMMC0_DATA5			0x00000020>,
1504			   <IMX8QM_EMMC0_DATA6_CONN_EMMC0_DATA6			0x00000020>,
1505			   <IMX8QM_EMMC0_DATA7_CONN_EMMC0_DATA7			0x00000020>,
1506			   <IMX8QM_EMMC0_STROBE_CONN_EMMC0_STROBE		0x06000040>,
1507			   <IMX8QM_EMMC0_RESET_B_CONN_EMMC0_RESET_B		0x00000020>;
1508	};
1509
1510	pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp {
1511		fsl,pins = <IMX8QM_EMMC0_CLK_CONN_EMMC0_CLK			0x06000040>,
1512			   <IMX8QM_EMMC0_CMD_CONN_EMMC0_CMD			0x00000020>,
1513			   <IMX8QM_EMMC0_DATA0_CONN_EMMC0_DATA0			0x00000020>,
1514			   <IMX8QM_EMMC0_DATA1_CONN_EMMC0_DATA1			0x00000020>,
1515			   <IMX8QM_EMMC0_DATA2_CONN_EMMC0_DATA2			0x00000020>,
1516			   <IMX8QM_EMMC0_DATA3_CONN_EMMC0_DATA3			0x00000020>,
1517			   <IMX8QM_EMMC0_DATA4_CONN_EMMC0_DATA4			0x00000020>,
1518			   <IMX8QM_EMMC0_DATA5_CONN_EMMC0_DATA5			0x00000020>,
1519			   <IMX8QM_EMMC0_DATA6_CONN_EMMC0_DATA6			0x00000020>,
1520			   <IMX8QM_EMMC0_DATA7_CONN_EMMC0_DATA7			0x00000020>,
1521			   <IMX8QM_EMMC0_STROBE_CONN_EMMC0_STROBE		0x06000040>,
1522			   <IMX8QM_EMMC0_RESET_B_CONN_EMMC0_RESET_B		0x00000020>;
1523	};
1524
1525	/* Apalis TS_6 */
1526	pinctrl_usdhc1_gpios: usdhc1gpiosgrp {
1527		fsl,pins = <IMX8QM_USDHC1_STROBE_LSIO_GPIO5_IO23		0x00000021>;
1528	};
1529
1530	/* Apalis MMC1 */
1531	pinctrl_usdhc2_4bit: usdhc2grp4bitgrp {
1532		fsl,pins = <IMX8QM_USDHC1_CLK_CONN_USDHC1_CLK			0x06000041>,
1533			   <IMX8QM_USDHC1_CMD_CONN_USDHC1_CMD			0x00000021>,
1534			   <IMX8QM_USDHC1_DATA0_CONN_USDHC1_DATA0		0x00000021>,
1535			   <IMX8QM_USDHC1_DATA1_CONN_USDHC1_DATA1		0x00000021>,
1536			   <IMX8QM_USDHC1_DATA2_CONN_USDHC1_DATA2		0x00000021>,
1537			   <IMX8QM_USDHC1_DATA3_CONN_USDHC1_DATA3		0x00000021>,
1538			   /* On-module PMIC use */
1539			   <IMX8QM_USDHC1_VSELECT_CONN_USDHC1_VSELECT		0x00000021>;
1540	};
1541
1542	pinctrl_usdhc2_4bit_100mhz: usdhc2-4bit100mhzgrp {
1543		fsl,pins = <IMX8QM_USDHC1_CLK_CONN_USDHC1_CLK			0x06000040>,
1544			   <IMX8QM_USDHC1_CMD_CONN_USDHC1_CMD			0x00000020>,
1545			   <IMX8QM_USDHC1_DATA0_CONN_USDHC1_DATA0		0x00000020>,
1546			   <IMX8QM_USDHC1_DATA1_CONN_USDHC1_DATA1		0x00000020>,
1547			   <IMX8QM_USDHC1_DATA2_CONN_USDHC1_DATA2		0x00000020>,
1548			   <IMX8QM_USDHC1_DATA3_CONN_USDHC1_DATA3		0x00000020>,
1549			   /* On-module PMIC use */
1550			   <IMX8QM_USDHC1_VSELECT_CONN_USDHC1_VSELECT		0x00000021>;
1551	};
1552
1553	pinctrl_usdhc2_4bit_200mhz: usdhc2-4bit200mhzgrp {
1554		fsl,pins = <IMX8QM_USDHC1_CLK_CONN_USDHC1_CLK			0x06000040>,
1555			   <IMX8QM_USDHC1_CMD_CONN_USDHC1_CMD			0x00000020>,
1556			   <IMX8QM_USDHC1_DATA0_CONN_USDHC1_DATA0		0x00000020>,
1557			   <IMX8QM_USDHC1_DATA1_CONN_USDHC1_DATA1		0x00000020>,
1558			   <IMX8QM_USDHC1_DATA2_CONN_USDHC1_DATA2		0x00000020>,
1559			   <IMX8QM_USDHC1_DATA3_CONN_USDHC1_DATA3		0x00000020>,
1560			   /* On-module PMIC use */
1561			   <IMX8QM_USDHC1_VSELECT_CONN_USDHC1_VSELECT		0x00000021>;
1562	};
1563
1564	pinctrl_usdhc2_8bit: usdhc2grp8bitgrp {
1565		fsl,pins = <IMX8QM_USDHC1_DATA4_CONN_USDHC1_DATA4		0x00000021>,
1566			   <IMX8QM_USDHC1_DATA5_CONN_USDHC1_DATA5		0x00000021>,
1567			   <IMX8QM_USDHC1_DATA6_CONN_USDHC1_DATA6		0x00000021>,
1568			   <IMX8QM_USDHC1_DATA7_CONN_USDHC1_DATA7		0x00000021>;
1569	};
1570
1571	pinctrl_usdhc2_8bit_100mhz: usdhc2-8bit100mhzgrp {
1572		fsl,pins = <IMX8QM_USDHC1_DATA4_CONN_USDHC1_DATA4		0x00000020>,
1573			   <IMX8QM_USDHC1_DATA5_CONN_USDHC1_DATA5		0x00000020>,
1574			   <IMX8QM_USDHC1_DATA6_CONN_USDHC1_DATA6		0x00000020>,
1575			   <IMX8QM_USDHC1_DATA7_CONN_USDHC1_DATA7		0x00000020>;
1576	};
1577
1578	pinctrl_usdhc2_8bit_200mhz: usdhc2-8bit200mhzgrp {
1579		fsl,pins = <IMX8QM_USDHC1_DATA4_CONN_USDHC1_DATA4		0x00000020>,
1580			   <IMX8QM_USDHC1_DATA5_CONN_USDHC1_DATA5		0x00000020>,
1581			   <IMX8QM_USDHC1_DATA6_CONN_USDHC1_DATA6		0x00000020>,
1582			   <IMX8QM_USDHC1_DATA7_CONN_USDHC1_DATA7		0x00000020>;
1583	};
1584
1585	pinctrl_usdhc2_4bit_sleep: usdhc2-4bitsleepgrp {
1586		fsl,pins = <IMX8QM_USDHC1_CLK_CONN_USDHC1_CLK			0x04000061>,
1587			   <IMX8QM_USDHC1_CMD_CONN_USDHC1_CMD			0x04000061>,
1588			   <IMX8QM_USDHC1_DATA0_CONN_USDHC1_DATA0		0x04000061>,
1589			   <IMX8QM_USDHC1_DATA1_CONN_USDHC1_DATA1		0x04000061>,
1590			   <IMX8QM_USDHC1_DATA2_CONN_USDHC1_DATA2		0x04000061>,
1591			   <IMX8QM_USDHC1_DATA3_CONN_USDHC1_DATA3		0x04000061>,
1592			   /* On-module PMIC use */
1593			   <IMX8QM_USDHC1_VSELECT_CONN_USDHC1_VSELECT		0x00000021>;
1594	};
1595
1596	pinctrl_usdhc2_8bit_sleep: usdhc2-8bitsleepgrp {
1597		fsl,pins = <IMX8QM_USDHC1_DATA4_CONN_USDHC1_DATA4		0x04000061>,
1598			   <IMX8QM_USDHC1_DATA5_CONN_USDHC1_DATA5		0x04000061>,
1599			   <IMX8QM_USDHC1_DATA6_CONN_USDHC1_DATA6		0x04000061>,
1600			   <IMX8QM_USDHC1_DATA7_CONN_USDHC1_DATA7		0x04000061>;
1601	};
1602
1603	/* Apalis SD1 */
1604	pinctrl_usdhc3: usdhc3grp {
1605		fsl,pins = <IMX8QM_USDHC2_CLK_CONN_USDHC2_CLK			0x06000041>,
1606			   <IMX8QM_USDHC2_CMD_CONN_USDHC2_CMD			0x00000021>,
1607			   <IMX8QM_USDHC2_DATA0_CONN_USDHC2_DATA0		0x00000021>,
1608			   <IMX8QM_USDHC2_DATA1_CONN_USDHC2_DATA1		0x00000021>,
1609			   <IMX8QM_USDHC2_DATA2_CONN_USDHC2_DATA2		0x00000021>,
1610			   <IMX8QM_USDHC2_DATA3_CONN_USDHC2_DATA3		0x00000021>,
1611			   /* On-module PMIC use */
1612			   <IMX8QM_USDHC2_VSELECT_CONN_USDHC2_VSELECT		0x00000021>;
1613	};
1614
1615	pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp {
1616		fsl,pins = <IMX8QM_USDHC2_CLK_CONN_USDHC2_CLK			0x06000041>,
1617			   <IMX8QM_USDHC2_CMD_CONN_USDHC2_CMD			0x00000021>,
1618			   <IMX8QM_USDHC2_DATA0_CONN_USDHC2_DATA0		0x00000021>,
1619			   <IMX8QM_USDHC2_DATA1_CONN_USDHC2_DATA1		0x00000021>,
1620			   <IMX8QM_USDHC2_DATA2_CONN_USDHC2_DATA2		0x00000021>,
1621			   <IMX8QM_USDHC2_DATA3_CONN_USDHC2_DATA3		0x00000021>,
1622			   /* On-module PMIC use */
1623			   <IMX8QM_USDHC2_VSELECT_CONN_USDHC2_VSELECT		0x00000021>;
1624	};
1625
1626	pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp {
1627		fsl,pins = <IMX8QM_USDHC2_CLK_CONN_USDHC2_CLK			0x06000041>,
1628			   <IMX8QM_USDHC2_CMD_CONN_USDHC2_CMD			0x00000021>,
1629			   <IMX8QM_USDHC2_DATA0_CONN_USDHC2_DATA0		0x00000021>,
1630			   <IMX8QM_USDHC2_DATA1_CONN_USDHC2_DATA1		0x00000021>,
1631			   <IMX8QM_USDHC2_DATA2_CONN_USDHC2_DATA2		0x00000021>,
1632			   <IMX8QM_USDHC2_DATA3_CONN_USDHC2_DATA3		0x00000021>,
1633			   /* On-module PMIC use */
1634			   <IMX8QM_USDHC2_VSELECT_CONN_USDHC2_VSELECT		0x00000021>;
1635	};
1636
1637	/* On-module Wi-Fi */
1638	pinctrl_wifi: wifigrp {
1639		fsl,pins = /* On-module Wi-Fi_SUSCLK_32k */
1640			   <IMX8QM_SCU_GPIO0_07_SCU_DSC_RTC_CLOCK_OUTPUT_32K	0x06000021>,
1641			   /* On-module Wi-Fi_PCIE_W_DISABLE */
1642			   <IMX8QM_MIPI_CSI0_MCLK_OUT_LSIO_GPIO1_IO24		0x06000021>;
1643	};
1644
1645	pinctrl_wifi_pdn: wifipdngrp {
1646		fsl,pins = /* On-module Wi-Fi_POWER_DOWN */
1647			   <IMX8QM_MIPI_CSI0_GPIO0_01_LSIO_GPIO1_IO28		0x06000021>;
1648	};
1649};