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fsl-ls208xa-rdb.dtsi

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linux-6.19.14/arch/arm64/boot/dts/freescale/fsl-ls208xa-rdb.dtsi DEVICETREE
  1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
  2/*
  3 * Device Tree file for Freescale LS2080A RDB Board.
  4 *
  5 * Copyright 2016 Freescale Semiconductor, Inc.
  6 * Copyright 2017-2020 NXP
  7 *
  8 * Abhimanyu Saini <abhimanyu.saini@nxp.com>
  9 *
 10 */
 11
 12&esdhc {
 13	status = "okay";
 14};
 15
 16&ifc {
 17	status = "okay";
 18	#address-cells = <2>;
 19	#size-cells = <1>;
 20	ranges = <0x0 0x0 0x5 0x80000000 0x08000000
 21		  0x2 0x0 0x5 0x30000000 0x00010000
 22		  0x3 0x0 0x5 0x20000000 0x00010000>;
 23
 24	flash@0,0 {
 25		#address-cells = <1>;
 26		#size-cells = <1>;
 27		compatible = "cfi-flash";
 28		reg = <0x0 0x0 0x8000000>;
 29		bank-width = <2>;
 30		device-width = <1>;
 31	};
 32
 33	nand@2,0 {
 34	     compatible = "fsl,ifc-nand";
 35	     reg = <0x2 0x0 0x10000>;
 36	};
 37
 38	cpld@3,0 {
 39	     reg = <0x3 0x0 0x10000>;
 40	     compatible = "fsl,ls2080aqds-fpga", "fsl,fpga-qixis";
 41	};
 42
 43};
 44
 45&i2c0 {
 46	status = "okay";
 47	i2c-mux@75 {
 48		compatible = "nxp,pca9547";
 49		reg = <0x75>;
 50		#address-cells = <1>;
 51		#size-cells = <0>;
 52		idle-state = <0>;
 53
 54		i2c@1 {
 55			#address-cells = <1>;
 56			#size-cells = <0>;
 57			reg = <0x01>;
 58			rtc@68 {
 59				compatible = "dallas,ds3232";
 60				reg = <0x68>;
 61				/* IRQ_RTC_B -> IRQ06, active low */
 62				interrupts-extended = <&extirq 6 IRQ_TYPE_LEVEL_LOW>;
 63			};
 64		};
 65
 66		i2c@2 {
 67			#address-cells = <1>;
 68			#size-cells = <0>;
 69			reg = <0x02>;
 70
 71			ina220@40 {
 72				compatible = "ti,ina220";
 73				reg = <0x40>;
 74				shunt-resistor = <500>;
 75			};
 76		};
 77
 78		i2c@3 {
 79			#address-cells = <1>;
 80			#size-cells = <0>;
 81			reg = <0x3>;
 82
 83			adt7481@4c {
 84				compatible = "adi,adt7461";
 85				reg = <0x4c>;
 86			};
 87		};
 88	};
 89};
 90
 91&i2c1 {
 92	status = "disabled";
 93};
 94
 95&i2c2 {
 96	status = "disabled";
 97};
 98
 99&i2c3 {
100	status = "disabled";
101};
102
103&dspi {
104	status = "okay";
105	dflash0: flash@0 {
106		#address-cells = <1>;
107		#size-cells = <1>;
108		compatible = "st,m25p80";
109		spi-max-frequency = <3000000>;
110		reg = <0>;
111	};
112};
113
114&qspi {
115	status = "okay";
116
117	s25fs512s0: flash@0 {
118		#address-cells = <1>;
119		#size-cells = <1>;
120		compatible = "jedec,spi-nor";
121		spi-max-frequency = <50000000>;
122		reg = <0>;
123	};
124};
125
126&sata0 {
127	status = "okay";
128};
129
130&sata1 {
131	status = "okay";
132};
133
134&usb0 {
135	status = "okay";
136};
137
138&usb1 {
139	status = "okay";
140};
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