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exynos8895.dtsi
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linux-6.19.14/arch/arm64/boot/dts/exynos/exynos8895.dtsi
1// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause 2/* 3 * Samsung's Exynos 8895 SoC device tree source 4 * 5 * Copyright (c) 2024, Ivaylo Ivanov <ivo.ivanov.ivanov1@gmail.com> 6 */ 7 8#include <dt-bindings/clock/samsung,exynos8895.h> 9#include <dt-bindings/interrupt-controller/arm-gic.h> 10 11/ { 12 compatible = "samsung,exynos8895"; 13 #address-cells = <2>; 14 #size-cells = <1>; 15 16 interrupt-parent = <&gic>; 17 18 aliases { 19 pinctrl0 = &pinctrl_alive; 20 pinctrl1 = &pinctrl_abox; 21 pinctrl2 = &pinctrl_vts; 22 pinctrl3 = &pinctrl_fsys0; 23 pinctrl4 = &pinctrl_fsys1; 24 pinctrl5 = &pinctrl_busc; 25 pinctrl6 = &pinctrl_peric0; 26 pinctrl7 = &pinctrl_peric1; 27 }; 28 29 cpus { 30 #address-cells = <1>; 31 #size-cells = <0>; 32 33 cpu-map { 34 cluster0 { 35 core0 { 36 cpu = <&cpu0>; 37 }; 38 core1 { 39 cpu = <&cpu1>; 40 }; 41 core2 { 42 cpu = <&cpu2>; 43 }; 44 core3 { 45 cpu = <&cpu3>; 46 }; 47 }; 48 49 cluster1 { 50 core0 { 51 cpu = <&cpu4>; 52 }; 53 core1 { 54 cpu = <&cpu5>; 55 }; 56 core2 { 57 cpu = <&cpu6>; 58 }; 59 core3 { 60 cpu = <&cpu7>; 61 }; 62 }; 63 }; 64 65 cpu4: cpu@0 { 66 device_type = "cpu"; 67 compatible = "samsung,mongoose-m2"; 68 reg = <0x0>; 69 enable-method = "psci"; 70 }; 71 72 cpu5: cpu@1 { 73 device_type = "cpu"; 74 compatible = "samsung,mongoose-m2"; 75 reg = <0x1>; 76 enable-method = "psci"; 77 }; 78 79 cpu6: cpu@2 { 80 device_type = "cpu"; 81 compatible = "samsung,mongoose-m2"; 82 reg = <0x2>; 83 enable-method = "psci"; 84 }; 85 86 cpu7: cpu@3 { 87 device_type = "cpu"; 88 compatible = "samsung,mongoose-m2"; 89 reg = <0x3>; 90 enable-method = "psci"; 91 }; 92 93 cpu0: cpu@100 { 94 device_type = "cpu"; 95 compatible = "arm,cortex-a53"; 96 reg = <0x100>; 97 enable-method = "psci"; 98 }; 99 100 cpu1: cpu@101 { 101 device_type = "cpu"; 102 compatible = "arm,cortex-a53"; 103 reg = <0x101>; 104 enable-method = "psci"; 105 }; 106 107 cpu2: cpu@102 { 108 device_type = "cpu"; 109 compatible = "arm,cortex-a53"; 110 reg = <0x102>; 111 enable-method = "psci"; 112 }; 113 114 cpu3: cpu@103 { 115 device_type = "cpu"; 116 compatible = "arm,cortex-a53"; 117 reg = <0x103>; 118 enable-method = "psci"; 119 }; 120 }; 121 122 oscclk: osc-clock { 123 compatible = "fixed-clock"; 124 #clock-cells = <0>; 125 clock-output-names = "oscclk"; 126 }; 127 128 pmu-a53 { 129 compatible = "arm,cortex-a53-pmu"; 130 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>, 131 <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>, 132 <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>, 133 <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>; 134 interrupt-affinity = <&cpu0>, 135 <&cpu1>, 136 <&cpu2>, 137 <&cpu3>; 138 }; 139 140 pmu-mongoose-m2 { 141 compatible = "samsung,mongoose-pmu"; 142 interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, 143 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, 144 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, 145 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>; 146 interrupt-affinity = <&cpu4>, 147 <&cpu5>, 148 <&cpu6>, 149 <&cpu7>; 150 }; 151 152 psci { 153 compatible = "arm,psci"; 154 method = "smc"; 155 cpu_off = <0x84000002>; 156 cpu_on = <0xc4000003>; 157 cpu_suspend = <0xc4000001>; 158 }; 159 160 soc: soc@0 { 161 compatible = "simple-bus"; 162 ranges = <0x0 0x0 0x0 0x20000000>; 163 164 #address-cells = <1>; 165 #size-cells = <1>; 166 167 chipid@10000000 { 168 compatible = "samsung,exynos8895-chipid", 169 "samsung,exynos850-chipid"; 170 reg = <0x10000000 0x24>; 171 }; 172 173 cmu_peris: clock-controller@10010000 { 174 compatible = "samsung,exynos8895-cmu-peris"; 175 reg = <0x10010000 0x8000>; 176 #clock-cells = <1>; 177 clocks = <&oscclk>, 178 <&cmu_top CLK_DOUT_CMU_PERIS_BUS>; 179 clock-names = "oscclk", "bus"; 180 }; 181 182 timer@10040000 { 183 compatible = "samsung,exynos8895-mct", 184 "samsung,exynos4210-mct"; 185 reg = <0x10040000 0x800>; 186 clocks = <&oscclk>, <&cmu_peris CLK_GOUT_PERIS_MCT_PCLK>; 187 clock-names = "fin_pll", "mct"; 188 interrupts = <GIC_SPI 455 IRQ_TYPE_LEVEL_HIGH>, 189 <GIC_SPI 456 IRQ_TYPE_LEVEL_HIGH>, 190 <GIC_SPI 457 IRQ_TYPE_LEVEL_HIGH>, 191 <GIC_SPI 458 IRQ_TYPE_LEVEL_HIGH>, 192 <GIC_SPI 459 IRQ_TYPE_LEVEL_HIGH>, 193 <GIC_SPI 460 IRQ_TYPE_LEVEL_HIGH>, 194 <GIC_SPI 461 IRQ_TYPE_LEVEL_HIGH>, 195 <GIC_SPI 462 IRQ_TYPE_LEVEL_HIGH>, 196 <GIC_SPI 463 IRQ_TYPE_LEVEL_HIGH>, 197 <GIC_SPI 464 IRQ_TYPE_LEVEL_HIGH>, 198 <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>, 199 <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>; 200 }; 201 202 gic: interrupt-controller@10201000 { 203 compatible = "arm,gic-400"; 204 reg = <0x10201000 0x1000>, 205 <0x10202000 0x1000>, 206 <0x10204000 0x2000>, 207 <0x10206000 0x2000>; 208 #interrupt-cells = <3>; 209 interrupt-controller; 210 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(8) | 211 IRQ_TYPE_LEVEL_HIGH)>; 212 #address-cells = <0>; 213 #size-cells = <1>; 214 }; 215 216 cmu_peric0: clock-controller@10400000 { 217 compatible = "samsung,exynos8895-cmu-peric0"; 218 reg = <0x10400000 0x8000>; 219 #clock-cells = <1>; 220 clocks = <&oscclk>, 221 <&cmu_top CLK_DOUT_CMU_PERIC0_BUS>, 222 <&cmu_top CLK_DOUT_CMU_PERIC0_UART_DBG>, 223 <&cmu_top CLK_DOUT_CMU_PERIC0_USI00>, 224 <&cmu_top CLK_DOUT_CMU_PERIC0_USI01>, 225 <&cmu_top CLK_DOUT_CMU_PERIC0_USI02>, 226 <&cmu_top CLK_DOUT_CMU_PERIC0_USI03>; 227 clock-names = "oscclk", "bus", "uart", "usi0", 228 "usi1", "usi2", "usi3"; 229 }; 230 231 syscon_peric0: syscon@10420000 { 232 compatible = "samsung,exynos8895-peric0-sysreg", "syscon"; 233 reg = <0x10420000 0x2000>; 234 clocks = <&cmu_peric0 CLK_GOUT_PERIC0_SYSREG_PERIC0_PCLK>; 235 }; 236 237 serial_0: serial@10430000 { 238 compatible = "samsung,exynos8895-uart"; 239 reg = <0x10430000 0x100>; 240 clocks = <&cmu_peric0 CLK_GOUT_PERIC0_UART_DBG_PCLK>, 241 <&cmu_peric0 CLK_GOUT_PERIC0_UART_DBG_EXT_UCLK>; 242 clock-names = "uart", "clk_uart_baud0"; 243 interrupts = <GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH>; 244 pinctrl-names = "default"; 245 pinctrl-0 = <&uart0_bus>; 246 samsung,uart-fifosize = <256>; 247 status = "disabled"; 248 }; 249 250 usi0: usi@10440000 { 251 compatible = "samsung,exynos8895-usi"; 252 ranges = <0x0 0x10440000 0x11000>; 253 clocks = <&cmu_peric0 CLK_GOUT_PERIC0_USI00_I_PCLK>, 254 <&cmu_peric0 CLK_GOUT_PERIC0_USI00_I_SCLK_USI>; 255 clock-names = "pclk", "ipclk"; 256 #address-cells = <1>; 257 #size-cells = <1>; 258 samsung,sysreg = <&syscon_peric0 0x1000>; 259 status = "disabled"; 260 261 hsi2c_5: i2c@0 { 262 compatible = "samsung,exynos8895-hsi2c"; 263 reg = <0x0 0x1000>; 264 clocks = <&cmu_peric0 CLK_GOUT_PERIC0_USI00_I_PCLK>; 265 clock-names = "hsi2c"; 266 interrupts = <GIC_SPI 364 IRQ_TYPE_LEVEL_HIGH>; 267 pinctrl-0 = <&hsi2c5_bus>; 268 pinctrl-names = "default"; 269 status = "disabled"; 270 }; 271 272 serial_2: serial@0 { 273 compatible = "samsung,exynos8895-uart"; 274 reg = <0x0 0x100>; 275 clocks = <&cmu_peric0 CLK_GOUT_PERIC0_USI00_I_PCLK>, 276 <&cmu_peric0 CLK_GOUT_PERIC0_USI00_I_SCLK_USI>; 277 clock-names = "uart", "clk_uart_baud0"; 278 interrupts = <GIC_SPI 366 IRQ_TYPE_LEVEL_HIGH>; 279 pinctrl-0 = <&uart2_bus>; 280 pinctrl-names = "default"; 281 samsung,uart-fifosize = <64>; 282 status = "disabled"; 283 }; 284 285 spi_2: spi@0 { 286 compatible = "samsung,exynos8895-spi", 287 "samsung,exynos850-spi"; 288 reg = <0x0 0x100>; 289 clocks = <&cmu_peric0 CLK_GOUT_PERIC0_USI00_I_PCLK>, 290 <&cmu_peric0 CLK_GOUT_PERIC0_USI00_I_SCLK_USI>; 291 clock-names = "spi", "spi_busclk0"; 292 interrupts = <GIC_SPI 367 IRQ_TYPE_LEVEL_HIGH>; 293 pinctrl-0 = <&spi2_bus>; 294 pinctrl-names = "default"; 295 #address-cells = <1>; 296 #size-cells = <0>; 297 status = "disabled"; 298 }; 299 300 hsi2c_6: i2c@10000 { 301 compatible = "samsung,exynos8895-hsi2c"; 302 reg = <0x10000 0x1000>; 303 clocks = <&cmu_peric0 CLK_GOUT_PERIC0_USI00_I_PCLK>; 304 clock-names = "hsi2c"; 305 interrupts = <GIC_SPI 365 IRQ_TYPE_LEVEL_HIGH>; 306 pinctrl-0 = <&hsi2c6_bus>; 307 pinctrl-names = "default"; 308 status = "disabled"; 309 }; 310 }; 311 312 usi1: usi@10460000 { 313 compatible = "samsung,exynos8895-usi"; 314 ranges = <0x0 0x10460000 0x11000>; 315 clocks = <&cmu_peric0 CLK_GOUT_PERIC0_USI01_I_PCLK>, 316 <&cmu_peric0 CLK_GOUT_PERIC0_USI01_I_SCLK_USI>; 317 clock-names = "pclk", "ipclk"; 318 #address-cells = <1>; 319 #size-cells = <1>; 320 samsung,sysreg = <&syscon_peric0 0x1004>; 321 status = "disabled"; 322 323 hsi2c_7: i2c@0 { 324 compatible = "samsung,exynos8895-hsi2c"; 325 reg = <0x0 0x1000>; 326 clocks = <&cmu_peric0 CLK_GOUT_PERIC0_USI01_I_PCLK>; 327 clock-names = "hsi2c"; 328 interrupts = <GIC_SPI 368 IRQ_TYPE_LEVEL_HIGH>; 329 pinctrl-0 = <&hsi2c5_bus>; 330 pinctrl-names = "default"; 331 status = "disabled"; 332 }; 333 334 serial_3: serial@0 { 335 compatible = "samsung,exynos8895-uart"; 336 reg = <0x0 0x100>; 337 clocks = <&cmu_peric0 CLK_GOUT_PERIC0_USI01_I_PCLK>, 338 <&cmu_peric0 CLK_GOUT_PERIC0_USI01_I_SCLK_USI>; 339 clock-names = "uart", "clk_uart_baud0"; 340 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; 341 pinctrl-0 = <&uart3_bus>; 342 pinctrl-names = "default"; 343 samsung,uart-fifosize = <64>; 344 status = "disabled"; 345 }; 346 347 spi_3: spi@0 { 348 compatible = "samsung,exynos8895-spi", 349 "samsung,exynos850-spi"; 350 reg = <0x0 0x100>; 351 clocks = <&cmu_peric0 CLK_GOUT_PERIC0_USI01_I_PCLK>, 352 <&cmu_peric0 CLK_GOUT_PERIC0_USI01_I_SCLK_USI>; 353 clock-names = "spi", "spi_busclk0"; 354 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; 355 pinctrl-0 = <&spi3_bus>; 356 pinctrl-names = "default"; 357 #address-cells = <1>; 358 #size-cells = <0>; 359 status = "disabled"; 360 }; 361 362 hsi2c_8: i2c@10000 { 363 compatible = "samsung,exynos8895-hsi2c"; 364 reg = <0x10000 0x1000>; 365 clocks = <&cmu_peric0 CLK_GOUT_PERIC0_USI01_I_PCLK>; 366 clock-names = "hsi2c"; 367 interrupts = <GIC_SPI 369 IRQ_TYPE_LEVEL_HIGH>; 368 pinctrl-0 = <&hsi2c8_bus>; 369 pinctrl-names = "default"; 370 status = "disabled"; 371 }; 372 }; 373 374 usi2: usi@10480000 { 375 compatible = "samsung,exynos8895-usi"; 376 ranges = <0x0 0x10480000 0x11000>; 377 clocks = <&cmu_peric0 CLK_GOUT_PERIC0_USI02_I_PCLK>, 378 <&cmu_peric0 CLK_GOUT_PERIC0_USI02_I_SCLK_USI>; 379 clock-names = "pclk", "ipclk"; 380 #address-cells = <1>; 381 #size-cells = <1>; 382 samsung,sysreg = <&syscon_peric0 0x1008>; 383 status = "disabled"; 384 385 hsi2c_9: i2c@0 { 386 compatible = "samsung,exynos8895-hsi2c"; 387 reg = <0x0 0x1000>; 388 clocks = <&cmu_peric0 CLK_GOUT_PERIC0_USI02_I_PCLK>; 389 clock-names = "hsi2c"; 390 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; 391 pinctrl-0 = <&hsi2c9_bus>; 392 pinctrl-names = "default"; 393 status = "disabled"; 394 }; 395 396 serial_4: serial@0 { 397 compatible = "samsung,exynos8895-uart"; 398 reg = <0x0 0x100>; 399 clocks = <&cmu_peric0 CLK_GOUT_PERIC0_USI02_I_PCLK>, 400 <&cmu_peric0 CLK_GOUT_PERIC0_USI02_I_SCLK_USI>; 401 clock-names = "uart", "clk_uart_baud0"; 402 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; 403 pinctrl-0 = <&uart4_bus>; 404 pinctrl-names = "default"; 405 samsung,uart-fifosize = <64>; 406 status = "disabled"; 407 }; 408 409 spi_4: spi@0 { 410 compatible = "samsung,exynos8895-spi", 411 "samsung,exynos850-spi"; 412 reg = <0x0 0x100>; 413 clocks = <&cmu_peric0 CLK_GOUT_PERIC0_USI02_I_PCLK>, 414 <&cmu_peric0 CLK_GOUT_PERIC0_USI02_I_SCLK_USI>; 415 clock-names = "spi", "spi_busclk0"; 416 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; 417 pinctrl-0 = <&spi4_bus>; 418 pinctrl-names = "default"; 419 #address-cells = <1>; 420 #size-cells = <0>; 421 status = "disabled"; 422 }; 423 424 hsi2c_10: i2c@10000 { 425 compatible = "samsung,exynos8895-hsi2c"; 426 reg = <0x10000 0x1000>; 427 clocks = <&cmu_peric0 CLK_GOUT_PERIC0_USI02_I_PCLK>; 428 clock-names = "hsi2c"; 429 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; 430 pinctrl-0 = <&hsi2c10_bus>; 431 pinctrl-names = "default"; 432 status = "disabled"; 433 }; 434 }; 435 436 usi3: usi@104a0000 { 437 compatible = "samsung,exynos8895-usi"; 438 ranges = <0x0 0x104a0000 0x11000>; 439 clocks = <&cmu_peric0 CLK_GOUT_PERIC0_USI03_I_PCLK>, 440 <&cmu_peric0 CLK_GOUT_PERIC0_USI03_I_SCLK_USI>; 441 clock-names = "pclk", "ipclk"; 442 #address-cells = <1>; 443 #size-cells = <1>; 444 samsung,sysreg = <&syscon_peric0 0x100c>; 445 status = "disabled"; 446 447 hsi2c_11: i2c@0 { 448 compatible = "samsung,exynos8895-hsi2c"; 449 reg = <0x0 0x1000>; 450 clocks = <&cmu_peric0 CLK_GOUT_PERIC0_USI03_I_PCLK>; 451 clock-names = "hsi2c"; 452 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; 453 pinctrl-0 = <&hsi2c11_bus>; 454 pinctrl-names = "default"; 455 status = "disabled"; 456 }; 457 458 serial_5: serial@0 { 459 compatible = "samsung,exynos8895-uart"; 460 reg = <0x0 0x100>; 461 clocks = <&cmu_peric0 CLK_GOUT_PERIC0_USI03_I_PCLK>, 462 <&cmu_peric0 CLK_GOUT_PERIC0_USI03_I_SCLK_USI>; 463 clock-names = "uart", "clk_uart_baud0"; 464 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; 465 pinctrl-0 = <&uart5_bus>; 466 pinctrl-names = "default"; 467 samsung,uart-fifosize = <64>; 468 status = "disabled"; 469 }; 470 471 spi_5: spi@0 { 472 compatible = "samsung,exynos8895-spi", 473 "samsung,exynos850-spi"; 474 reg = <0x0 0x100>; 475 clocks = <&cmu_peric0 CLK_GOUT_PERIC0_USI03_I_PCLK>, 476 <&cmu_peric0 CLK_GOUT_PERIC0_USI03_I_SCLK_USI>; 477 clock-names = "spi", "spi_busclk0"; 478 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; 479 pinctrl-0 = <&spi5_bus>; 480 pinctrl-names = "default"; 481 #address-cells = <1>; 482 #size-cells = <0>; 483 status = "disabled"; 484 }; 485 486 hsi2c_12: i2c@10000 { 487 compatible = "samsung,exynos8895-hsi2c"; 488 reg = <0x10000 0x1000>; 489 clocks = <&cmu_peric0 CLK_GOUT_PERIC0_USI03_I_PCLK>; 490 clock-names = "hsi2c"; 491 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; 492 pinctrl-0 = <&hsi2c12_bus>; 493 pinctrl-names = "default"; 494 status = "disabled"; 495 }; 496 }; 497 498 pinctrl_peric0: pinctrl@104d0000 { 499 compatible = "samsung,exynos8895-pinctrl"; 500 reg = <0x104d0000 0x1000>; 501 interrupts = <GIC_SPI 386 IRQ_TYPE_LEVEL_HIGH>; 502 }; 503 504 cmu_peric1: clock-controller@10800000 { 505 compatible = "samsung,exynos8895-cmu-peric1"; 506 reg = <0x10800000 0x8000>; 507 #clock-cells = <1>; 508 clocks = <&oscclk>, 509 <&cmu_top CLK_DOUT_CMU_PERIC1_BUS>, 510 <&cmu_top CLK_DOUT_CMU_PERIC1_SPEEDY2>, 511 <&cmu_top CLK_DOUT_CMU_PERIC1_SPI_CAM0>, 512 <&cmu_top CLK_DOUT_CMU_PERIC1_SPI_CAM1>, 513 <&cmu_top CLK_DOUT_CMU_PERIC1_UART_BT>, 514 <&cmu_top CLK_DOUT_CMU_PERIC1_USI04>, 515 <&cmu_top CLK_DOUT_CMU_PERIC1_USI05>, 516 <&cmu_top CLK_DOUT_CMU_PERIC1_USI06>, 517 <&cmu_top CLK_DOUT_CMU_PERIC1_USI07>, 518 <&cmu_top CLK_DOUT_CMU_PERIC1_USI08>, 519 <&cmu_top CLK_DOUT_CMU_PERIC1_USI09>, 520 <&cmu_top CLK_DOUT_CMU_PERIC1_USI10>, 521 <&cmu_top CLK_DOUT_CMU_PERIC1_USI11>, 522 <&cmu_top CLK_DOUT_CMU_PERIC1_USI12>, 523 <&cmu_top CLK_DOUT_CMU_PERIC1_USI13>; 524 clock-names = "oscclk", "bus", "speedy", "cam0", 525 "cam1", "uart", "usi4", "usi5", 526 "usi6", "usi7", "usi8", "usi9", 527 "usi10", "usi11", "usi12", "usi13"; 528 }; 529 530 syscon_peric1: syscon@10820000 { 531 compatible = "samsung,exynos8895-peric1-sysreg", "syscon"; 532 reg = <0x10820000 0x2000>; 533 clocks = <&cmu_peric1 CLK_GOUT_PERIC1_SYSREG_PERIC1_PCLK>; 534 }; 535 536 serial_1: serial@10830000 { 537 compatible = "samsung,exynos8895-uart"; 538 reg = <0x10830000 0x100>; 539 clocks = <&cmu_peric1 CLK_GOUT_PERIC1_UART_BT_PCLK>, 540 <&cmu_peric1 CLK_GOUT_PERIC1_UART_BT_EXT_UCLK>; 541 clock-names = "uart", "clk_uart_baud0"; 542 interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>; 543 pinctrl-names = "default"; 544 pinctrl-0 = <&uart1_bus>; 545 samsung,uart-fifosize = <256>; 546 status = "disabled"; 547 }; 548 549 usi4: usi@10840000 { 550 compatible = "samsung,exynos8895-usi"; 551 ranges = <0x0 0x10840000 0x11000>; 552 clocks = <&cmu_peric1 CLK_GOUT_PERIC1_USI04_I_PCLK>, 553 <&cmu_peric1 CLK_GOUT_PERIC1_USI04_I_SCLK_USI>; 554 clock-names = "pclk", "ipclk"; 555 #address-cells = <1>; 556 #size-cells = <1>; 557 samsung,sysreg = <&syscon_peric1 0x1008>; 558 status = "disabled"; 559 560 hsi2c_13: i2c@0 { 561 compatible = "samsung,exynos8895-hsi2c"; 562 reg = <0x0 0x1000>; 563 clocks = <&cmu_peric1 CLK_GOUT_PERIC1_USI04_I_PCLK>; 564 clock-names = "hsi2c"; 565 interrupts = <GIC_SPI 390 IRQ_TYPE_LEVEL_HIGH>; 566 pinctrl-0 = <&hsi2c13_bus>; 567 pinctrl-names = "default"; 568 status = "disabled"; 569 }; 570 571 serial_6: serial@0 { 572 compatible = "samsung,exynos8895-uart"; 573 reg = <0x0 0x100>; 574 clocks = <&cmu_peric1 CLK_GOUT_PERIC1_USI04_I_PCLK>, 575 <&cmu_peric1 CLK_GOUT_PERIC1_USI04_I_SCLK_USI>; 576 clock-names = "uart", "clk_uart_baud0"; 577 interrupts = <GIC_SPI 392 IRQ_TYPE_LEVEL_HIGH>; 578 pinctrl-0 = <&uart6_bus>; 579 pinctrl-names = "default"; 580 samsung,uart-fifosize = <64>; 581 status = "disabled"; 582 }; 583 584 spi_6: spi@0 { 585 compatible = "samsung,exynos8895-spi", 586 "samsung,exynos850-spi"; 587 reg = <0x0 0x100>; 588 clocks = <&cmu_peric1 CLK_GOUT_PERIC1_USI04_I_PCLK>, 589 <&cmu_peric1 CLK_GOUT_PERIC1_USI04_I_SCLK_USI>; 590 clock-names = "spi", "spi_busclk0"; 591 interrupts = <GIC_SPI 393 IRQ_TYPE_LEVEL_HIGH>; 592 pinctrl-0 = <&spi6_bus>; 593 pinctrl-names = "default"; 594 #address-cells = <1>; 595 #size-cells = <0>; 596 status = "disabled"; 597 }; 598 599 hsi2c_14: i2c@10000 { 600 compatible = "samsung,exynos8895-hsi2c"; 601 reg = <0x10000 0x1000>; 602 clocks = <&cmu_peric1 CLK_GOUT_PERIC1_USI04_I_PCLK>; 603 clock-names = "hsi2c"; 604 interrupts = <GIC_SPI 391 IRQ_TYPE_LEVEL_HIGH>; 605 pinctrl-0 = <&hsi2c14_bus>; 606 pinctrl-names = "default"; 607 status = "disabled"; 608 }; 609 }; 610 611 usi5: usi@10860000 { 612 compatible = "samsung,exynos8895-usi"; 613 ranges = <0x0 0x10860000 0x11000>; 614 clocks = <&cmu_peric1 CLK_GOUT_PERIC1_USI05_I_PCLK>, 615 <&cmu_peric1 CLK_GOUT_PERIC1_USI05_I_SCLK_USI>; 616 clock-names = "pclk", "ipclk"; 617 #address-cells = <1>; 618 #size-cells = <1>; 619 samsung,sysreg = <&syscon_peric1 0x100c>; 620 status = "disabled"; 621 622 hsi2c_15: i2c@0 { 623 compatible = "samsung,exynos8895-hsi2c"; 624 reg = <0x0 0x1000>; 625 clocks = <&cmu_peric1 CLK_GOUT_PERIC1_USI05_I_PCLK>; 626 clock-names = "hsi2c"; 627 interrupts = <GIC_SPI 394 IRQ_TYPE_LEVEL_HIGH>; 628 pinctrl-0 = <&hsi2c15_bus>; 629 pinctrl-names = "default"; 630 status = "disabled"; 631 }; 632 633 serial_7: serial@0 { 634 compatible = "samsung,exynos8895-uart"; 635 reg = <0x0 0x100>; 636 clocks = <&cmu_peric1 CLK_GOUT_PERIC1_USI05_I_PCLK>, 637 <&cmu_peric1 CLK_GOUT_PERIC1_USI05_I_SCLK_USI>; 638 clock-names = "uart", "clk_uart_baud0"; 639 interrupts = <GIC_SPI 396 IRQ_TYPE_LEVEL_HIGH>; 640 pinctrl-0 = <&uart7_bus>; 641 pinctrl-names = "default"; 642 samsung,uart-fifosize = <64>; 643 status = "disabled"; 644 }; 645 646 spi_7: spi@0 { 647 compatible = "samsung,exynos8895-spi", 648 "samsung,exynos850-spi"; 649 reg = <0x0 0x100>; 650 clocks = <&cmu_peric1 CLK_GOUT_PERIC1_USI05_I_PCLK>, 651 <&cmu_peric1 CLK_GOUT_PERIC1_USI05_I_SCLK_USI>; 652 clock-names = "spi", "spi_busclk0"; 653 interrupts = <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>; 654 pinctrl-0 = <&spi7_bus>; 655 pinctrl-names = "default"; 656 #address-cells = <1>; 657 #size-cells = <0>; 658 status = "disabled"; 659 }; 660 661 hsi2c_16: i2c@10000 { 662 compatible = "samsung,exynos8895-hsi2c"; 663 reg = <0x10000 0x1000>; 664 clocks = <&cmu_peric1 CLK_GOUT_PERIC1_USI05_I_PCLK>; 665 clock-names = "hsi2c"; 666 interrupts = <GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH>; 667 pinctrl-0 = <&hsi2c16_bus>; 668 pinctrl-names = "default"; 669 status = "disabled"; 670 }; 671 }; 672 673 usi6: usi@10880000 { 674 compatible = "samsung,exynos8895-usi"; 675 ranges = <0x0 0x10880000 0x11000>; 676 clocks = <&cmu_peric1 CLK_GOUT_PERIC1_USI06_I_PCLK>, 677 <&cmu_peric1 CLK_GOUT_PERIC1_USI06_I_SCLK_USI>; 678 clock-names = "pclk", "ipclk"; 679 #address-cells = <1>; 680 #size-cells = <1>; 681 samsung,sysreg = <&syscon_peric1 0x1010>; 682 status = "disabled"; 683 684 hsi2c_17: i2c@0 { 685 compatible = "samsung,exynos8895-hsi2c"; 686 reg = <0x0 0x1000>; 687 clocks = <&cmu_peric1 CLK_GOUT_PERIC1_USI06_I_PCLK>; 688 clock-names = "hsi2c"; 689 interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>; 690 pinctrl-0 = <&hsi2c17_bus>; 691 pinctrl-names = "default"; 692 status = "disabled"; 693 }; 694 695 serial_8: serial@0 { 696 compatible = "samsung,exynos8895-uart"; 697 reg = <0x0 0x100>; 698 clocks = <&cmu_peric1 CLK_GOUT_PERIC1_USI06_I_PCLK>, 699 <&cmu_peric1 CLK_GOUT_PERIC1_USI06_I_SCLK_USI>; 700 clock-names = "uart", "clk_uart_baud0"; 701 interrupts = <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>; 702 pinctrl-0 = <&uart8_bus>; 703 pinctrl-names = "default"; 704 samsung,uart-fifosize = <64>; 705 status = "disabled"; 706 }; 707 708 spi_8: spi@0 { 709 compatible = "samsung,exynos8895-spi", 710 "samsung,exynos850-spi"; 711 reg = <0x0 0x100>; 712 clocks = <&cmu_peric1 CLK_GOUT_PERIC1_USI06_I_PCLK>, 713 <&cmu_peric1 CLK_GOUT_PERIC1_USI06_I_SCLK_USI>; 714 clock-names = "spi", "spi_busclk0"; 715 interrupts = <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>; 716 pinctrl-0 = <&spi8_bus>; 717 pinctrl-names = "default"; 718 #address-cells = <1>; 719 #size-cells = <0>; 720 status = "disabled"; 721 }; 722 723 hsi2c_18: i2c@10000 { 724 compatible = "samsung,exynos8895-hsi2c"; 725 reg = <0x10000 0x1000>; 726 clocks = <&cmu_peric1 CLK_GOUT_PERIC1_USI06_I_PCLK>; 727 clock-names = "hsi2c"; 728 interrupts = <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>; 729 pinctrl-0 = <&hsi2c18_bus>; 730 pinctrl-names = "default"; 731 status = "disabled"; 732 }; 733 }; 734 735 usi7: usi@108a0000 { 736 compatible = "samsung,exynos8895-usi"; 737 ranges = <0x0 0x108a0000 0x11000>; 738 clocks = <&cmu_peric1 CLK_GOUT_PERIC1_USI07_I_PCLK>, 739 <&cmu_peric1 CLK_GOUT_PERIC1_USI07_I_SCLK_USI>; 740 clock-names = "pclk", "ipclk"; 741 #address-cells = <1>; 742 #size-cells = <1>; 743 samsung,sysreg = <&syscon_peric1 0x1014>; 744 status = "disabled"; 745 746 hsi2c_19: i2c@0 { 747 compatible = "samsung,exynos8895-hsi2c"; 748 reg = <0x0 0x1000>; 749 clocks = <&cmu_peric1 CLK_GOUT_PERIC1_USI07_I_PCLK>; 750 clock-names = "hsi2c"; 751 interrupts = <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>; 752 pinctrl-0 = <&hsi2c19_bus>; 753 pinctrl-names = "default"; 754 status = "disabled"; 755 }; 756 757 serial_9: serial@0 { 758 compatible = "samsung,exynos8895-uart"; 759 reg = <0x0 0x100>; 760 clocks = <&cmu_peric1 CLK_GOUT_PERIC1_USI07_I_PCLK>, 761 <&cmu_peric1 CLK_GOUT_PERIC1_USI07_I_SCLK_USI>; 762 clock-names = "uart", "clk_uart_baud0"; 763 interrupts = <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>; 764 pinctrl-0 = <&uart9_bus>; 765 pinctrl-names = "default"; 766 samsung,uart-fifosize = <64>; 767 status = "disabled"; 768 }; 769 770 spi_9: spi@0 { 771 compatible = "samsung,exynos8895-spi", 772 "samsung,exynos850-spi"; 773 reg = <0x0 0x100>; 774 clocks = <&cmu_peric1 CLK_GOUT_PERIC1_USI07_I_PCLK>, 775 <&cmu_peric1 CLK_GOUT_PERIC1_USI07_I_SCLK_USI>; 776 clock-names = "spi", "spi_busclk0"; 777 interrupts = <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>; 778 pinctrl-0 = <&spi9_bus>; 779 pinctrl-names = "default"; 780 #address-cells = <1>; 781 #size-cells = <0>; 782 status = "disabled"; 783 }; 784 785 hsi2c_20: i2c@10000 { 786 compatible = "samsung,exynos8895-hsi2c"; 787 reg = <0x10000 0x1000>; 788 clocks = <&cmu_peric1 CLK_GOUT_PERIC1_USI07_I_PCLK>; 789 clock-names = "hsi2c"; 790 interrupts = <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>; 791 pinctrl-0 = <&hsi2c20_bus>; 792 pinctrl-names = "default"; 793 status = "disabled"; 794 }; 795 }; 796 797 usi8: usi@108c0000 { 798 compatible = "samsung,exynos8895-usi"; 799 ranges = <0x0 0x108c0000 0x11000>; 800 clocks = <&cmu_peric1 CLK_GOUT_PERIC1_USI08_I_PCLK>, 801 <&cmu_peric1 CLK_GOUT_PERIC1_USI08_I_SCLK_USI>; 802 clock-names = "pclk", "ipclk"; 803 #address-cells = <1>; 804 #size-cells = <1>; 805 samsung,sysreg = <&syscon_peric1 0x1018>; 806 status = "disabled"; 807 808 hsi2c_21: i2c@0 { 809 compatible = "samsung,exynos8895-hsi2c"; 810 reg = <0x0 0x1000>; 811 clocks = <&cmu_peric1 CLK_GOUT_PERIC1_USI08_I_PCLK>; 812 clock-names = "hsi2c"; 813 interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>; 814 pinctrl-0 = <&hsi2c21_bus>; 815 pinctrl-names = "default"; 816 status = "disabled"; 817 }; 818 819 serial_10: serial@0 { 820 compatible = "samsung,exynos8895-uart"; 821 reg = <0x0 0x100>; 822 clocks = <&cmu_peric1 CLK_GOUT_PERIC1_USI08_I_PCLK>, 823 <&cmu_peric1 CLK_GOUT_PERIC1_USI08_I_SCLK_USI>; 824 clock-names = "uart", "clk_uart_baud0"; 825 interrupts = <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>; 826 pinctrl-0 = <&uart10_bus>; 827 pinctrl-names = "default"; 828 samsung,uart-fifosize = <64>; 829 status = "disabled"; 830 }; 831 832 spi_10: spi@0 { 833 compatible = "samsung,exynos8895-spi", 834 "samsung,exynos850-spi"; 835 reg = <0x0 0x100>; 836 clocks = <&cmu_peric1 CLK_GOUT_PERIC1_USI08_I_PCLK>, 837 <&cmu_peric1 CLK_GOUT_PERIC1_USI08_I_SCLK_USI>; 838 clock-names = "spi", "spi_busclk0"; 839 interrupts = <GIC_SPI 409 IRQ_TYPE_LEVEL_HIGH>; 840 pinctrl-0 = <&spi10_bus>; 841 pinctrl-names = "default"; 842 #address-cells = <1>; 843 #size-cells = <0>; 844 status = "disabled"; 845 }; 846 847 hsi2c_22: i2c@10000 { 848 compatible = "samsung,exynos8895-hsi2c"; 849 reg = <0x10000 0x1000>; 850 clocks = <&cmu_peric1 CLK_GOUT_PERIC1_USI08_I_PCLK>; 851 clock-names = "hsi2c"; 852 interrupts = <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>; 853 pinctrl-0 = <&hsi2c22_bus>; 854 pinctrl-names = "default"; 855 status = "disabled"; 856 }; 857 }; 858 859 usi9: usi@108e0000 { 860 compatible = "samsung,exynos8895-usi"; 861 ranges = <0x0 0x108e0000 0x11000>; 862 clocks = <&cmu_peric1 CLK_GOUT_PERIC1_USI09_I_PCLK>, 863 <&cmu_peric1 CLK_GOUT_PERIC1_USI09_I_SCLK_USI>; 864 clock-names = "pclk", "ipclk"; 865 #address-cells = <1>; 866 #size-cells = <1>; 867 samsung,sysreg = <&syscon_peric1 0x101c>; 868 status = "disabled"; 869 870 hsi2c_23: i2c@0 { 871 compatible = "samsung,exynos8895-hsi2c"; 872 reg = <0x0 0x1000>; 873 clocks = <&cmu_peric1 CLK_GOUT_PERIC1_USI09_I_PCLK>; 874 clock-names = "hsi2c"; 875 interrupts = <GIC_SPI 410 IRQ_TYPE_LEVEL_HIGH>; 876 pinctrl-0 = <&hsi2c23_bus>; 877 pinctrl-names = "default"; 878 status = "disabled"; 879 }; 880 881 serial_11: serial@0 { 882 compatible = "samsung,exynos8895-uart"; 883 reg = <0 0x100>; 884 clocks = <&cmu_peric1 CLK_GOUT_PERIC1_USI09_I_PCLK>, 885 <&cmu_peric1 CLK_GOUT_PERIC1_USI09_I_SCLK_USI>; 886 clock-names = "uart", "clk_uart_baud0"; 887 interrupts = <GIC_SPI 412 IRQ_TYPE_LEVEL_HIGH>; 888 pinctrl-0 = <&uart11_bus>; 889 pinctrl-names = "default"; 890 samsung,uart-fifosize = <64>; 891 status = "disabled"; 892 }; 893 894 spi_11: spi@0 { 895 compatible = "samsung,exynos8895-spi", 896 "samsung,exynos850-spi"; 897 reg = <0 0x100>; 898 clocks = <&cmu_peric1 CLK_GOUT_PERIC1_USI09_I_PCLK>, 899 <&cmu_peric1 CLK_GOUT_PERIC1_USI09_I_SCLK_USI>; 900 clock-names = "spi", "spi_busclk0"; 901 interrupts = <GIC_SPI 413 IRQ_TYPE_LEVEL_HIGH>; 902 pinctrl-0 = <&spi11_bus>; 903 pinctrl-names = "default"; 904 #address-cells = <1>; 905 #size-cells = <0>; 906 status = "disabled"; 907 }; 908 909 hsi2c_24: i2c@10000 { 910 compatible = "samsung,exynos8895-hsi2c"; 911 reg = <0x10000 0x1000>; 912 clocks = <&cmu_peric1 CLK_GOUT_PERIC1_USI09_I_PCLK>; 913 clock-names = "hsi2c"; 914 interrupts = <GIC_SPI 411 IRQ_TYPE_LEVEL_HIGH>; 915 pinctrl-0 = <&hsi2c24_bus>; 916 pinctrl-names = "default"; 917 status = "disabled"; 918 }; 919 }; 920 921 usi10: usi@10900000 { 922 compatible = "samsung,exynos8895-usi"; 923 ranges = <0x0 0x10900000 0x11000>; 924 clocks = <&cmu_peric1 CLK_GOUT_PERIC1_USI10_I_PCLK>, 925 <&cmu_peric1 CLK_GOUT_PERIC1_USI10_I_SCLK_USI>; 926 clock-names = "pclk", "ipclk"; 927 #address-cells = <1>; 928 #size-cells = <1>; 929 samsung,sysreg = <&syscon_peric1 0x1020>; 930 status = "disabled"; 931 932 hsi2c_25: i2c@0 { 933 compatible = "samsung,exynos8895-hsi2c"; 934 reg = <0x0 0x1000>; 935 clocks = <&cmu_peric1 CLK_GOUT_PERIC1_USI10_I_PCLK>; 936 clock-names = "hsi2c"; 937 interrupts = <GIC_SPI 414 IRQ_TYPE_LEVEL_HIGH>; 938 pinctrl-0 = <&hsi2c25_bus>; 939 pinctrl-names = "default"; 940 status = "disabled"; 941 }; 942 943 serial_12: serial@0 { 944 compatible = "samsung,exynos8895-uart"; 945 reg = <0 0x100>; 946 clocks = <&cmu_peric1 CLK_GOUT_PERIC1_USI10_I_PCLK>, 947 <&cmu_peric1 CLK_GOUT_PERIC1_USI10_I_SCLK_USI>; 948 clock-names = "uart", "clk_uart_baud0"; 949 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>; 950 pinctrl-0 = <&uart12_bus>; 951 pinctrl-names = "default"; 952 samsung,uart-fifosize = <64>; 953 status = "disabled"; 954 }; 955 956 spi_12: spi@0 { 957 compatible = "samsung,exynos8895-spi", 958 "samsung,exynos850-spi"; 959 reg = <0 0x100>; 960 clocks = <&cmu_peric1 CLK_GOUT_PERIC1_USI10_I_PCLK>, 961 <&cmu_peric1 CLK_GOUT_PERIC1_USI10_I_SCLK_USI>; 962 clock-names = "spi", "spi_busclk0"; 963 interrupts = <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>; 964 pinctrl-0 = <&spi12_bus>; 965 pinctrl-names = "default"; 966 #address-cells = <1>; 967 #size-cells = <0>; 968 status = "disabled"; 969 }; 970 971 hsi2c_26: i2c@10000 { 972 compatible = "samsung,exynos8895-hsi2c"; 973 reg = <0x10000 0x1000>; 974 clocks = <&cmu_peric1 CLK_GOUT_PERIC1_USI10_I_PCLK>; 975 clock-names = "hsi2c"; 976 interrupts = <GIC_SPI 415 IRQ_TYPE_LEVEL_HIGH>; 977 pinctrl-0 = <&hsi2c26_bus>; 978 pinctrl-names = "default"; 979 status = "disabled"; 980 }; 981 }; 982 983 usi11: usi@10920000 { 984 compatible = "samsung,exynos8895-usi"; 985 ranges = <0x0 0x10920000 0x11000>; 986 clocks = <&cmu_peric1 CLK_GOUT_PERIC1_USI11_I_PCLK>, 987 <&cmu_peric1 CLK_GOUT_PERIC1_USI11_I_SCLK_USI>; 988 clock-names = "pclk", "ipclk"; 989 #address-cells = <1>; 990 #size-cells = <1>; 991 samsung,sysreg = <&syscon_peric1 0x1024>; 992 status = "disabled"; 993 994 hsi2c_27: i2c@0 { 995 compatible = "samsung,exynos8895-hsi2c"; 996 reg = <0x0 0x1000>; 997 clocks = <&cmu_peric1 CLK_GOUT_PERIC1_USI11_I_PCLK>; 998 clock-names = "hsi2c"; 999 interrupts = <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>; 1000 pinctrl-0 = <&hsi2c27_bus>; 1001 pinctrl-names = "default"; 1002 status = "disabled"; 1003 }; 1004 1005 serial_13: serial@0 { 1006 compatible = "samsung,exynos8895-uart"; 1007 reg = <0 0x100>; 1008 clocks = <&cmu_peric1 CLK_GOUT_PERIC1_USI11_I_PCLK>, 1009 <&cmu_peric1 CLK_GOUT_PERIC1_USI11_I_SCLK_USI>; 1010 clock-names = "uart", "clk_uart_baud0"; 1011 interrupts = <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>; 1012 pinctrl-0 = <&uart13_bus>; 1013 pinctrl-names = "default"; 1014 samsung,uart-fifosize = <64>; 1015 status = "disabled"; 1016 }; 1017 1018 spi_13: spi@0 { 1019 compatible = "samsung,exynos8895-spi", 1020 "samsung,exynos850-spi"; 1021 reg = <0 0x100>; 1022 clocks = <&cmu_peric1 CLK_GOUT_PERIC1_USI11_I_PCLK>, 1023 <&cmu_peric1 CLK_GOUT_PERIC1_USI11_I_SCLK_USI>; 1024 clock-names = "spi", "spi_busclk0"; 1025 interrupts = <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>; 1026 pinctrl-0 = <&spi13_bus>; 1027 pinctrl-names = "default"; 1028 #address-cells = <1>; 1029 #size-cells = <0>; 1030 status = "disabled"; 1031 }; 1032 1033 hsi2c_28: i2c@10000 { 1034 compatible = "samsung,exynos8895-hsi2c"; 1035 reg = <0x10000 0x1000>; 1036 clocks = <&cmu_peric1 CLK_GOUT_PERIC1_USI11_I_PCLK>; 1037 clock-names = "hsi2c"; 1038 interrupts = <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>; 1039 pinctrl-0 = <&hsi2c28_bus>; 1040 pinctrl-names = "default"; 1041 status = "disabled"; 1042 }; 1043 }; 1044 1045 usi12: usi@10940000 { 1046 compatible = "samsung,exynos8895-usi"; 1047 ranges = <0x0 0x10940000 0x11000>; 1048 clocks = <&cmu_peric1 CLK_GOUT_PERIC1_USI12_I_PCLK>, 1049 <&cmu_peric1 CLK_GOUT_PERIC1_USI12_I_SCLK_USI>; 1050 clock-names = "pclk", "ipclk"; 1051 #address-cells = <1>; 1052 #size-cells = <1>; 1053 samsung,sysreg = <&syscon_peric1 0x1028>; 1054 status = "disabled"; 1055 1056 hsi2c_29: i2c@0 { 1057 compatible = "samsung,exynos8895-hsi2c"; 1058 reg = <0x0 0x1000>; 1059 clocks = <&cmu_peric1 CLK_GOUT_PERIC1_USI12_I_PCLK>; 1060 clock-names = "hsi2c"; 1061 interrupts = <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>; 1062 pinctrl-0 = <&hsi2c29_bus>; 1063 pinctrl-names = "default"; 1064 status = "disabled"; 1065 }; 1066 1067 serial_14: serial@0 { 1068 compatible = "samsung,exynos8895-uart"; 1069 reg = <0 0x100>; 1070 clocks = <&cmu_peric1 CLK_GOUT_PERIC1_USI12_I_PCLK>, 1071 <&cmu_peric1 CLK_GOUT_PERIC1_USI12_I_SCLK_USI>; 1072 clock-names = "uart", "clk_uart_baud0"; 1073 interrupts = <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>; 1074 pinctrl-0 = <&uart14_bus>; 1075 pinctrl-names = "default"; 1076 samsung,uart-fifosize = <64>; 1077 status = "disabled"; 1078 }; 1079 1080 spi_14: spi@0 { 1081 compatible = "samsung,exynos8895-spi", 1082 "samsung,exynos850-spi"; 1083 reg = <0 0x100>; 1084 clocks = <&cmu_peric1 CLK_GOUT_PERIC1_USI12_I_PCLK>, 1085 <&cmu_peric1 CLK_GOUT_PERIC1_USI12_I_SCLK_USI>; 1086 clock-names = "spi", "spi_busclk0"; 1087 interrupts = <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>; 1088 pinctrl-0 = <&spi14_bus>; 1089 pinctrl-names = "default"; 1090 #address-cells = <1>; 1091 #size-cells = <0>; 1092 status = "disabled"; 1093 }; 1094 1095 hsi2c_30: i2c@10000 { 1096 compatible = "samsung,exynos8895-hsi2c"; 1097 reg = <0x10000 0x1000>; 1098 clocks = <&cmu_peric1 CLK_GOUT_PERIC1_USI12_I_PCLK>; 1099 clock-names = "hsi2c"; 1100 interrupts = <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>; 1101 pinctrl-0 = <&hsi2c30_bus>; 1102 pinctrl-names = "default"; 1103 status = "disabled"; 1104 }; 1105 }; 1106 1107 usi13: usi@10960000 { 1108 compatible = "samsung,exynos8895-usi"; 1109 ranges = <0x0 0x10960000 0x11000>; 1110 clocks = <&cmu_peric1 CLK_GOUT_PERIC1_USI13_I_PCLK>, 1111 <&cmu_peric1 CLK_GOUT_PERIC1_USI13_I_SCLK_USI>; 1112 clock-names = "pclk", "ipclk"; 1113 #address-cells = <1>; 1114 #size-cells = <1>; 1115 samsung,sysreg = <&syscon_peric1 0x102c>; 1116 status = "disabled"; 1117 1118 hsi2c_31: i2c@0 { 1119 compatible = "samsung,exynos8895-hsi2c"; 1120 reg = <0x0 0x1000>; 1121 clocks = <&cmu_peric1 CLK_GOUT_PERIC1_USI13_I_PCLK>; 1122 clock-names = "hsi2c"; 1123 interrupts = <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>; 1124 pinctrl-0 = <&hsi2c31_bus>; 1125 pinctrl-names = "default"; 1126 status = "disabled"; 1127 }; 1128 1129 serial_15: serial@0 { 1130 compatible = "samsung,exynos8895-uart"; 1131 reg = <0 0x100>; 1132 clocks = <&cmu_peric1 CLK_GOUT_PERIC1_USI13_I_PCLK>, 1133 <&cmu_peric1 CLK_GOUT_PERIC1_USI13_I_SCLK_USI>; 1134 clock-names = "uart", "clk_uart_baud0"; 1135 interrupts = <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>; 1136 pinctrl-0 = <&uart15_bus>; 1137 pinctrl-names = "default"; 1138 samsung,uart-fifosize = <64>; 1139 status = "disabled"; 1140 }; 1141 1142 spi_15: spi@0 { 1143 compatible = "samsung,exynos8895-spi", 1144 "samsung,exynos850-spi"; 1145 reg = <0 0x100>; 1146 clocks = <&cmu_peric1 CLK_GOUT_PERIC1_USI13_I_PCLK>, 1147 <&cmu_peric1 CLK_GOUT_PERIC1_USI13_I_SCLK_USI>; 1148 clock-names = "spi", "spi_busclk0"; 1149 interrupts = <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>; 1150 pinctrl-0 = <&spi15_bus>; 1151 pinctrl-names = "default"; 1152 #address-cells = <1>; 1153 #size-cells = <0>; 1154 status = "disabled"; 1155 }; 1156 1157 hsi2c_32: i2c@10000 { 1158 compatible = "samsung,exynos8895-hsi2c"; 1159 reg = <0x10000 0x1000>; 1160 clocks = <&cmu_peric1 CLK_GOUT_PERIC1_USI13_I_PCLK>; 1161 clock-names = "hsi2c"; 1162 interrupts = <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>; 1163 pinctrl-0 = <&hsi2c32_bus>; 1164 pinctrl-names = "default"; 1165 status = "disabled"; 1166 }; 1167 }; 1168 1169 pinctrl_peric1: pinctrl@10980000 { 1170 compatible = "samsung,exynos8895-pinctrl"; 1171 reg = <0x10980000 0x1000>; 1172 interrupts = <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>; 1173 }; 1174 1175 hsi2c_1: i2c@10990000 { 1176 compatible = "samsung,exynos8895-hsi2c"; 1177 reg = <0x10990000 0x1000>; 1178 clocks = <&cmu_peric1 CLK_GOUT_PERIC1_HSI2C_CAM0_IPCLK>; 1179 clock-names = "hsi2c"; 1180 interrupts = <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>; 1181 pinctrl-0 = <&hsi2c1_bus>; 1182 pinctrl-names = "default"; 1183 status = "disabled"; 1184 }; 1185 1186 hsi2c_2: i2c@109a0000 { 1187 compatible = "samsung,exynos8895-hsi2c"; 1188 reg = <0x109a0000 0x1000>; 1189 clocks = <&cmu_peric1 CLK_GOUT_PERIC1_HSI2C_CAM1_IPCLK>; 1190 clock-names = "hsi2c"; 1191 interrupts = <GIC_SPI 432 IRQ_TYPE_LEVEL_HIGH>; 1192 pinctrl-0 = <&hsi2c2_bus>; 1193 pinctrl-names = "default"; 1194 status = "disabled"; 1195 }; 1196 1197 hsi2c_3: i2c@109b0000 { 1198 compatible = "samsung,exynos8895-hsi2c"; 1199 reg = <0x109b0000 0x1000>; 1200 clocks = <&cmu_peric1 CLK_GOUT_PERIC1_HSI2C_CAM2_IPCLK>; 1201 clock-names = "hsi2c"; 1202 interrupts = <GIC_SPI 433 IRQ_TYPE_LEVEL_HIGH>; 1203 pinctrl-0 = <&hsi2c3_bus>; 1204 pinctrl-names = "default"; 1205 status = "disabled"; 1206 }; 1207 1208 hsi2c_4: i2c@109c0000 { 1209 compatible = "samsung,exynos8895-hsi2c"; 1210 reg = <0x109c0000 0x1000>; 1211 clocks = <&cmu_peric1 CLK_GOUT_PERIC1_HSI2C_CAM3_IPCLK>; 1212 clock-names = "hsi2c"; 1213 interrupts = <GIC_SPI 434 IRQ_TYPE_LEVEL_HIGH>; 1214 pinctrl-0 = <&hsi2c4_bus>; 1215 pinctrl-names = "default"; 1216 status = "disabled"; 1217 }; 1218 1219 spi_0: spi@109d0000 { 1220 compatible = "samsung,exynos8895-spi", 1221 "samsung,exynos850-spi"; 1222 reg = <0x109d0000 0x100>; 1223 #address-cells = <1>; 1224 #size-cells = <0>; 1225 clocks = <&cmu_peric1 CLK_GOUT_PERIC1_SPI_CAM0_PCLK>, 1226 <&cmu_peric1 CLK_GOUT_PERIC1_SPI_CAM0_SPI_EXT_CLK>; 1227 clock-names = "spi", "spi_busclk0"; 1228 interrupts = <GIC_SPI 435 IRQ_TYPE_LEVEL_HIGH>; 1229 pinctrl-0 = <&spi0_bus>; 1230 pinctrl-names = "default"; 1231 status = "disabled"; 1232 }; 1233 1234 spi_1: spi@109e0000 { 1235 compatible = "samsung,exynos8895-spi", 1236 "samsung,exynos850-spi"; 1237 reg = <0x109e0000 0x100>; 1238 #address-cells = <1>; 1239 #size-cells = <0>; 1240 clocks = <&cmu_peric1 CLK_GOUT_PERIC1_SPI_CAM1_PCLK>, 1241 <&cmu_peric1 CLK_GOUT_PERIC1_SPI_CAM1_SPI_EXT_CLK>; 1242 clock-names = "spi", "spi_busclk0"; 1243 interrupts = <GIC_SPI 436 IRQ_TYPE_LEVEL_HIGH>; 1244 pinctrl-0 = <&spi1_bus>; 1245 pinctrl-names = "default"; 1246 status = "disabled"; 1247 }; 1248 1249 cmu_fsys0: clock-controller@11000000 { 1250 compatible = "samsung,exynos8895-cmu-fsys0"; 1251 reg = <0x11000000 0x8000>; 1252 #clock-cells = <1>; 1253 clocks = <&oscclk>, 1254 <&cmu_top CLK_DOUT_CMU_FSYS0_BUS>, 1255 <&cmu_top CLK_DOUT_CMU_FSYS0_DPGTC>, 1256 <&cmu_top CLK_DOUT_CMU_FSYS0_MMC_EMBD>, 1257 <&cmu_top CLK_DOUT_CMU_FSYS0_UFS_EMBD>, 1258 <&cmu_top CLK_DOUT_CMU_FSYS0_USBDRD30>; 1259 clock-names = "oscclk", "bus", "dpgtc", "mmc", 1260 "ufs", "usbdrd30"; 1261 }; 1262 1263 syscon_fsys0: syscon@11020000 { 1264 compatible = "samsung,exynos8895-fsys0-sysreg", "syscon"; 1265 reg = <0x11020000 0x2000>; 1266 clocks = <&cmu_fsys0 CLK_GOUT_FSYS0_SYSREG_FSYS0_PCLK>; 1267 }; 1268 1269 pinctrl_fsys0: pinctrl@11050000 { 1270 compatible = "samsung,exynos8895-pinctrl"; 1271 reg = <0x11050000 0x1000>; 1272 interrupts = <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>; 1273 }; 1274 1275 cmu_fsys1: clock-controller@11400000 { 1276 compatible = "samsung,exynos8895-cmu-fsys1"; 1277 reg = <0x11400000 0x8000>; 1278 #clock-cells = <1>; 1279 clocks = <&oscclk>, 1280 <&cmu_top CLK_DOUT_CMU_FSYS1_BUS>, 1281 <&cmu_top CLK_DOUT_CMU_FSYS1_PCIE>, 1282 <&cmu_top CLK_DOUT_CMU_FSYS1_UFS_CARD>, 1283 <&cmu_top CLK_DOUT_CMU_FSYS1_MMC_CARD>; 1284 clock-names = "oscclk", "bus", "pcie", "ufs", "mmc"; 1285 }; 1286 1287 syscon_fsys1: syscon@11420000 { 1288 compatible = "samsung,exynos8895-fsys1-sysreg", "syscon"; 1289 reg = <0x11420000 0x2000>; 1290 clocks = <&cmu_fsys1 CLK_GOUT_FSYS1_SYSREG_FSYS1_PCLK>; 1291 }; 1292 1293 pinctrl_fsys1: pinctrl@11430000 { 1294 compatible = "samsung,exynos8895-pinctrl"; 1295 reg = <0x11430000 0x1000>; 1296 interrupts = <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>; 1297 }; 1298 1299 mmc: mmc@11500000 { 1300 compatible = "samsung,exynos8895-dw-mshc-smu", 1301 "samsung,exynos7-dw-mshc-smu"; 1302 reg = <0x11500000 0x2000>; 1303 assigned-clocks = <&cmu_top CLK_MOUT_CMU_FSYS1_MMC_CARD>; 1304 assigned-clock-parents = <&cmu_top CLK_FOUT_SHARED4_PLL>; 1305 clocks = <&cmu_fsys1 CLK_GOUT_FSYS1_MMC_CARD_I_ACLK>, 1306 <&cmu_fsys1 CLK_GOUT_FSYS1_MMC_CARD_SDCLKIN>; 1307 clock-names = "biu", "ciu"; 1308 fifo-depth = <64>; 1309 interrupts = <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>; 1310 #address-cells = <1>; 1311 #size-cells = <0>; 1312 status = "disabled"; 1313 }; 1314 1315 pinctrl_abox: pinctrl@13e60000 { 1316 compatible = "samsung,exynos8895-pinctrl"; 1317 reg = <0x13e60000 0x1000>; 1318 }; 1319 1320 pinctrl_vts: pinctrl@14080000 { 1321 compatible = "samsung,exynos8895-pinctrl"; 1322 reg = <0x14080000 0x1000>; 1323 }; 1324 1325 pinctrl_busc: pinctrl@15a30000 { 1326 compatible = "samsung,exynos8895-pinctrl"; 1327 reg = <0x15a30000 0x1000>; 1328 interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>; 1329 }; 1330 1331 cmu_top: clock-controller@15a80000 { 1332 compatible = "samsung,exynos8895-cmu-top"; 1333 reg = <0x15a80000 0x8000>; 1334 #clock-cells = <1>; 1335 clocks = <&oscclk>; 1336 clock-names = "oscclk"; 1337 }; 1338 1339 pmu_system_controller: system-controller@16480000 { 1340 compatible = "samsung,exynos8895-pmu", 1341 "samsung,exynos7-pmu", "syscon"; 1342 reg = <0x16480000 0x10000>; 1343 }; 1344 1345 pinctrl_alive: pinctrl@164b0000 { 1346 compatible = "samsung,exynos8895-pinctrl"; 1347 reg = <0x164b0000 0x1000>; 1348 1349 wakeup-interrupt-controller { 1350 compatible = "samsung,exynos8895-wakeup-eint", 1351 "samsung,exynos7-wakeup-eint"; 1352 interrupt-parent = <&gic>; 1353 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; 1354 }; 1355 }; 1356 }; 1357 1358 timer { 1359 compatible = "arm,armv8-timer"; 1360 /* Hypervisor Virtual Timer interrupt is not wired to GIC */ 1361 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, 1362 <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, 1363 <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, 1364 <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>; 1365 /* 1366 * Non-updatable, broken stock Samsung bootloader does not 1367 * configure CNTFRQ_EL0 1368 */ 1369 clock-frequency = <26000000>; 1370 }; 1371}; 1372 1373#include "exynos8895-pinctrl.dtsi" 1374#include "arm/samsung/exynos-syscon-restart.dtsi"
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