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exynos2200.dtsi
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linux-6.19.14/arch/arm64/boot/dts/exynos/exynos2200.dtsi
1// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause 2/* 3 * Samsung's Exynos 2200 SoC device tree source 4 * 5 * Copyright (c) 2025, Ivaylo Ivanov <ivo.ivanov.ivanov1@gmail.com> 6 */ 7 8#include <dt-bindings/clock/samsung,exynos2200-cmu.h> 9#include <dt-bindings/interrupt-controller/arm-gic.h> 10#include <dt-bindings/soc/samsung,exynos-usi.h> 11 12/ { 13 compatible = "samsung,exynos2200"; 14 #address-cells = <2>; 15 #size-cells = <2>; 16 17 interrupt-parent = <&gic>; 18 19 aliases { 20 pinctrl0 = &pinctrl_alive; 21 pinctrl1 = &pinctrl_cmgp; 22 pinctrl2 = &pinctrl_hsi1; 23 pinctrl3 = &pinctrl_ufs; 24 pinctrl4 = &pinctrl_hsi1ufs; 25 pinctrl5 = &pinctrl_peric0; 26 pinctrl6 = &pinctrl_peric1; 27 pinctrl7 = &pinctrl_peric2; 28 pinctrl8 = &pinctrl_vts; 29 }; 30 31 xtcxo: clock-1 { 32 compatible = "fixed-clock"; 33 #clock-cells = <0>; 34 clock-output-names = "oscclk"; 35 }; 36 37 ext_26m: clock-2 { 38 compatible = "fixed-clock"; 39 #clock-cells = <0>; 40 clock-output-names = "ext-26m"; 41 }; 42 43 ext_200m: clock-3 { 44 compatible = "fixed-clock"; 45 #clock-cells = <0>; 46 clock-output-names = "ext-200m"; 47 }; 48 49 cpus { 50 #address-cells = <1>; 51 #size-cells = <0>; 52 53 cpu-map { 54 cluster0 { 55 core0 { 56 cpu = <&cpu0>; 57 }; 58 59 core1 { 60 cpu = <&cpu1>; 61 }; 62 63 core2 { 64 cpu = <&cpu2>; 65 }; 66 67 core3 { 68 cpu = <&cpu3>; 69 }; 70 }; 71 72 cluster1 { 73 core0 { 74 cpu = <&cpu4>; 75 }; 76 77 core1 { 78 cpu = <&cpu5>; 79 }; 80 81 core2 { 82 cpu = <&cpu6>; 83 }; 84 }; 85 86 cluster2 { 87 core0 { 88 cpu = <&cpu7>; 89 }; 90 }; 91 }; 92 93 cpu0: cpu@0 { 94 device_type = "cpu"; 95 compatible = "arm,cortex-a510"; 96 reg = <0>; 97 capacity-dmips-mhz = <260>; 98 dynamic-power-coefficient = <189>; 99 enable-method = "psci"; 100 cpu-idle-states = <&little_cpu_sleep>; 101 }; 102 103 cpu1: cpu@100 { 104 device_type = "cpu"; 105 compatible = "arm,cortex-a510"; 106 reg = <0x100>; 107 capacity-dmips-mhz = <260>; 108 dynamic-power-coefficient = <189>; 109 enable-method = "psci"; 110 cpu-idle-states = <&little_cpu_sleep>; 111 }; 112 113 cpu2: cpu@200 { 114 device_type = "cpu"; 115 compatible = "arm,cortex-a510"; 116 reg = <0x200>; 117 capacity-dmips-mhz = <260>; 118 dynamic-power-coefficient = <189>; 119 enable-method = "psci"; 120 cpu-idle-states = <&little_cpu_sleep>; 121 }; 122 123 cpu3: cpu@300 { 124 device_type = "cpu"; 125 compatible = "arm,cortex-a510"; 126 reg = <0x300>; 127 capacity-dmips-mhz = <260>; 128 dynamic-power-coefficient = <189>; 129 enable-method = "psci"; 130 cpu-idle-states = <&little_cpu_sleep>; 131 }; 132 133 cpu4: cpu@400 { 134 device_type = "cpu"; 135 compatible = "arm,cortex-a710"; 136 reg = <0x400>; 137 capacity-dmips-mhz = <380>; 138 dynamic-power-coefficient = <560>; 139 enable-method = "psci"; 140 cpu-idle-states = <&big_cpu_sleep>; 141 }; 142 143 cpu5: cpu@500 { 144 device_type = "cpu"; 145 compatible = "arm,cortex-a710"; 146 reg = <0x500>; 147 capacity-dmips-mhz = <380>; 148 dynamic-power-coefficient = <560>; 149 enable-method = "psci"; 150 cpu-idle-states = <&big_cpu_sleep>; 151 }; 152 153 cpu6: cpu@600 { 154 device_type = "cpu"; 155 compatible = "arm,cortex-a710"; 156 reg = <0x600>; 157 capacity-dmips-mhz = <380>; 158 dynamic-power-coefficient = <560>; 159 enable-method = "psci"; 160 cpu-idle-states = <&big_cpu_sleep>; 161 }; 162 163 cpu7: cpu@700 { 164 device_type = "cpu"; 165 compatible = "arm,cortex-x2"; 166 reg = <0x700>; 167 capacity-dmips-mhz = <488>; 168 dynamic-power-coefficient = <765>; 169 enable-method = "psci"; 170 cpu-idle-states = <&prime_cpu_sleep>; 171 }; 172 173 idle-states { 174 entry-method = "psci"; 175 176 little_cpu_sleep: cpu-sleep-0 { 177 compatible = "arm,idle-state"; 178 idle-state-name = "c2"; 179 entry-latency-us = <70>; 180 exit-latency-us = <170>; 181 min-residency-us = <2000>; 182 arm,psci-suspend-param = <0x10000>; 183 }; 184 185 big_cpu_sleep: cpu-sleep-1 { 186 compatible = "arm,idle-state"; 187 idle-state-name = "c2"; 188 entry-latency-us = <235>; 189 exit-latency-us = <220>; 190 min-residency-us = <3500>; 191 arm,psci-suspend-param = <0x10000>; 192 }; 193 194 prime_cpu_sleep: cpu-sleep-2 { 195 compatible = "arm,idle-state"; 196 idle-state-name = "c2"; 197 entry-latency-us = <150>; 198 exit-latency-us = <190>; 199 min-residency-us = <2500>; 200 arm,psci-suspend-param = <0x10000>; 201 }; 202 }; 203 }; 204 205 pmu-a510 { 206 compatible = "arm,cortex-a510-pmu"; 207 interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH &ppi_cluster0>; 208 }; 209 210 pmu-a710 { 211 compatible = "arm,cortex-a710-pmu"; 212 interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH &ppi_cluster1>; 213 }; 214 215 pmu-x2 { 216 compatible = "arm,cortex-x2-pmu"; 217 interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH &ppi_cluster2>; 218 }; 219 220 psci { 221 compatible = "arm,psci-1.0"; 222 method = "smc"; 223 }; 224 225 soc@0 { 226 compatible = "simple-bus"; 227 ranges = <0x0 0x0 0x0 0x20000000>; 228 229 #address-cells = <1>; 230 #size-cells = <1>; 231 232 chipid@10000000 { 233 compatible = "samsung,exynos2200-chipid", 234 "samsung,exynos850-chipid"; 235 reg = <0x10000000 0x24>; 236 }; 237 238 cmu_peris: clock-controller@10020000 { 239 compatible = "samsung,exynos2200-cmu-peris"; 240 reg = <0x10020000 0x8000>; 241 #clock-cells = <1>; 242 243 clocks = <&cmu_top CLK_DOUT_TCXO_DIV3>, 244 <&cmu_top CLK_DOUT_CMU_PERIS_NOC>, 245 <&cmu_top CLK_DOUT_CMU_PERIS_GIC>; 246 clock-names = "tcxo_div3", 247 "noc", 248 "gic"; 249 }; 250 251 mct_peris: timer@10040000 { 252 compatible = "samsung,exynos2200-mct-peris", 253 "samsung,exynos4210-mct"; 254 reg = <0x10040000 0x800>; 255 clocks = <&cmu_top CLK_DOUT_TCXO_DIV3>, <&cmu_peris CLK_MOUT_PERIS_GIC>; 256 clock-names = "fin_pll", "mct"; 257 interrupts = <GIC_SPI 943 IRQ_TYPE_LEVEL_HIGH 0>, 258 <GIC_SPI 944 IRQ_TYPE_LEVEL_HIGH 0>, 259 <GIC_SPI 945 IRQ_TYPE_LEVEL_HIGH 0>, 260 <GIC_SPI 946 IRQ_TYPE_LEVEL_HIGH 0>, 261 <GIC_SPI 947 IRQ_TYPE_LEVEL_HIGH 0>, 262 <GIC_SPI 948 IRQ_TYPE_LEVEL_HIGH 0>, 263 <GIC_SPI 949 IRQ_TYPE_LEVEL_HIGH 0>, 264 <GIC_SPI 950 IRQ_TYPE_LEVEL_HIGH 0>, 265 <GIC_SPI 951 IRQ_TYPE_LEVEL_HIGH 0>, 266 <GIC_SPI 952 IRQ_TYPE_LEVEL_HIGH 0>, 267 <GIC_SPI 953 IRQ_TYPE_LEVEL_HIGH 0>, 268 <GIC_SPI 954 IRQ_TYPE_LEVEL_HIGH 0>; 269 status = "disabled"; 270 }; 271 272 gic: interrupt-controller@10200000 { 273 compatible = "arm,gic-v3"; 274 reg = <0x10200000 0x10000>, /* GICD */ 275 <0x10240000 0x200000>; /* GICR * 8 */ 276 277 #address-cells = <0>; 278 #interrupt-cells = <4>; 279 interrupt-controller; 280 interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH 0>; 281 282 ppi-partitions { 283 ppi_cluster0: interrupt-partition-0 { 284 affinity = <&cpu0 &cpu1 &cpu2 &cpu3>; 285 }; 286 287 ppi_cluster1: interrupt-partition-1 { 288 affinity = <&cpu4 &cpu5 &cpu6>; 289 }; 290 291 ppi_cluster2: interrupt-partition-2 { 292 affinity = <&cpu7>; 293 }; 294 }; 295 }; 296 297 cmu_peric0: clock-controller@10400000 { 298 compatible = "samsung,exynos2200-cmu-peric0"; 299 reg = <0x10400000 0x8000>; 300 #clock-cells = <1>; 301 302 clocks = <&xtcxo>, 303 <&cmu_top CLK_DOUT_CMU_PERIC0_NOC>, 304 <&cmu_top CLK_DOUT_CMU_PERIC0_IP0>, 305 <&cmu_top CLK_DOUT_CMU_PERIC0_IP1>; 306 clock-names = "oscclk", "noc", "ip0", "ip1"; 307 }; 308 309 syscon_peric0: syscon@10420000 { 310 compatible = "samsung,exynos2200-peric0-sysreg", "syscon"; 311 reg = <0x10420000 0x10000>; 312 }; 313 314 pinctrl_peric0: pinctrl@10430000 { 315 compatible = "samsung,exynos2200-pinctrl"; 316 reg = <0x10430000 0x1000>; 317 }; 318 319 usi4: usi@105000c0 { 320 compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi"; 321 reg = <0x105000c0 0x20>; 322 ranges; 323 #address-cells = <1>; 324 #size-cells = <1>; 325 clocks = <&cmu_peric0 CLK_MOUT_PERIC0_NOC_USER>, 326 <&cmu_peric0 CLK_DOUT_PERIC0_USI04>; 327 clock-names = "pclk", "ipclk"; 328 samsung,sysreg = <&syscon_peric0 0x1024>; 329 status = "disabled"; 330 331 hsi2c_8: i2c@10500000 { 332 compatible = "samsung,exynos2200-hsi2c", 333 "samsung,exynosautov9-hsi2c"; 334 reg = <0x10500000 0xc0>; 335 #address-cells = <1>; 336 #size-cells = <0>; 337 clocks = <&cmu_peric0 CLK_DOUT_PERIC0_USI04>, 338 <&cmu_peric0 CLK_MOUT_PERIC0_NOC_USER>; 339 clock-names = "hsi2c", "hsi2c_pclk"; 340 interrupts = <GIC_SPI 673 IRQ_TYPE_LEVEL_HIGH 0>; 341 pinctrl-0 = <&hsi2c8_bus>; 342 pinctrl-names = "default"; 343 status = "disabled"; 344 }; 345 346 serial_6: serial@10500000 { 347 compatible = "samsung,exynos2200-uart", "google,gs101-uart"; 348 reg = <0x10500000 0xc0>; 349 clocks = <&cmu_peric0 CLK_MOUT_PERIC0_NOC_USER>, 350 <&cmu_peric0 CLK_DOUT_PERIC0_USI04>; 351 clock-names = "uart", "clk_uart_baud0"; 352 interrupts = <GIC_SPI 673 IRQ_TYPE_LEVEL_HIGH 0>; 353 pinctrl-0 = <&uart6_bus_single>; 354 pinctrl-names = "default"; 355 samsung,uart-fifosize = <64>; 356 status = "disabled"; 357 }; 358 }; 359 360 usi4_i2c: usi@105100c0 { 361 compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi"; 362 reg = <0x105100c0 0x20>; 363 ranges; 364 #address-cells = <1>; 365 #size-cells = <1>; 366 clocks = <&cmu_peric0 CLK_MOUT_PERIC0_NOC_USER>, 367 <&cmu_peric0 CLK_DOUT_PERIC0_I2C>; 368 clock-names = "pclk", "ipclk"; 369 samsung,mode = <USI_MODE_I2C>; 370 samsung,sysreg = <&syscon_peric0 0x1024>; 371 status = "disabled"; 372 373 hsi2c_9: i2c@10510000 { 374 compatible = "samsung,exynos2200-hsi2c", 375 "samsung,exynosautov9-hsi2c"; 376 reg = <0x10510000 0xc0>; 377 #address-cells = <1>; 378 #size-cells = <0>; 379 clocks = <&cmu_peric0 CLK_DOUT_PERIC0_I2C>, 380 <&cmu_peric0 CLK_MOUT_PERIC0_NOC_USER>; 381 clock-names = "hsi2c", "hsi2c_pclk"; 382 interrupts = <GIC_SPI 672 IRQ_TYPE_LEVEL_HIGH 0>; 383 pinctrl-0 = <&hsi2c9_bus>; 384 pinctrl-names = "default"; 385 status = "disabled"; 386 }; 387 }; 388 389 cmu_peric1: clock-controller@10700000 { 390 compatible = "samsung,exynos2200-cmu-peric1"; 391 reg = <0x10700000 0x8000>; 392 #clock-cells = <1>; 393 394 clocks = <&xtcxo>, 395 <&cmu_top CLK_DOUT_CMU_PERIC1_NOC>, 396 <&cmu_top CLK_DOUT_CMU_PERIC1_IP0>, 397 <&cmu_top CLK_DOUT_CMU_PERIC1_IP1>; 398 clock-names = "oscclk", "noc", "ip0", "ip1"; 399 }; 400 401 syscon_peric1: syscon@10720000 { 402 compatible = "samsung,exynos2200-peric1-sysreg", "syscon"; 403 reg = <0x10720000 0x10000>; 404 }; 405 406 pinctrl_peric1: pinctrl@10730000 { 407 compatible = "samsung,exynos2200-pinctrl"; 408 reg = <0x10730000 0x1000>; 409 }; 410 411 usi7: usi@109000c0 { 412 compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi"; 413 reg = <0x109000c0 0x20>; 414 ranges; 415 #address-cells = <1>; 416 #size-cells = <1>; 417 clocks = <&cmu_peric1 CLK_MOUT_PERIC1_NOC_USER>, 418 <&cmu_peric1 CLK_DOUT_PERIC1_USI07>; 419 clock-names = "pclk", "ipclk"; 420 samsung,sysreg = <&syscon_peric1 0x2030>; 421 status = "disabled"; 422 423 hsi2c_14: i2c@10900000 { 424 compatible = "samsung,exynos2200-hsi2c", 425 "samsung,exynosautov9-hsi2c"; 426 reg = <0x10900000 0xc0>; 427 #address-cells = <1>; 428 #size-cells = <0>; 429 clocks = <&cmu_peric1 CLK_DOUT_PERIC1_USI07>, 430 <&cmu_peric1 CLK_MOUT_PERIC1_NOC_USER>; 431 clock-names = "hsi2c", "hsi2c_pclk"; 432 interrupts = <GIC_SPI 680 IRQ_TYPE_LEVEL_HIGH 0>; 433 pinctrl-0 = <&hsi2c14_bus>; 434 pinctrl-names = "default"; 435 status = "disabled"; 436 }; 437 438 serial_9: serial@10900000 { 439 compatible = "samsung,exynos2200-uart", "google,gs101-uart"; 440 reg = <0x10900000 0xc0>; 441 clocks = <&cmu_peric1 CLK_MOUT_PERIC1_NOC_USER>, 442 <&cmu_peric1 CLK_DOUT_PERIC1_USI07>; 443 clock-names = "uart", "clk_uart_baud0"; 444 interrupts = <GIC_SPI 680 IRQ_TYPE_LEVEL_HIGH 0>; 445 pinctrl-0 = <&uart9_bus_single>; 446 pinctrl-names = "default"; 447 samsung,uart-fifosize = <64>; 448 status = "disabled"; 449 }; 450 }; 451 452 usi7_i2c: usi@109100c0 { 453 compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi"; 454 reg = <0x109100c0 0x20>; 455 ranges; 456 #address-cells = <1>; 457 #size-cells = <1>; 458 clocks = <&cmu_peric1 CLK_MOUT_PERIC0_NOC_USER>, 459 <&cmu_peric1 CLK_DOUT_PERIC1_USI07_SPI_I2C>; 460 clock-names = "pclk", "ipclk"; 461 samsung,mode = <USI_MODE_I2C>; 462 samsung,sysreg = <&syscon_peric1 0x2034>; 463 status = "disabled"; 464 465 hsi2c_15: i2c@10910000 { 466 compatible = "samsung,exynos2200-hsi2c", 467 "samsung,exynosautov9-hsi2c"; 468 reg = <0x10910000 0xc0>; 469 #address-cells = <1>; 470 #size-cells = <0>; 471 clocks = <&cmu_peric1 CLK_DOUT_PERIC1_USI07_SPI_I2C>, 472 <&cmu_peric1 CLK_MOUT_PERIC0_NOC_USER>; 473 clock-names = "hsi2c", "hsi2c_pclk"; 474 interrupts = <GIC_SPI 679 IRQ_TYPE_LEVEL_HIGH 0>; 475 pinctrl-0 = <&hsi2c15_bus>; 476 pinctrl-names = "default"; 477 status = "disabled"; 478 }; 479 }; 480 481 usi8: usi@109200c0 { 482 compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi"; 483 reg = <0x109200c0 0x20>; 484 ranges; 485 #address-cells = <1>; 486 #size-cells = <1>; 487 clocks = <&cmu_peric1 CLK_MOUT_PERIC1_NOC_USER>, 488 <&cmu_peric1 CLK_DOUT_PERIC1_USI08>; 489 clock-names = "pclk", "ipclk"; 490 samsung,sysreg = <&syscon_peric1 0x2038>; 491 status = "disabled"; 492 493 hsi2c_16: i2c@10920000 { 494 compatible = "samsung,exynos2200-hsi2c", 495 "samsung,exynosautov9-hsi2c"; 496 reg = <0x10920000 0xc0>; 497 #address-cells = <1>; 498 #size-cells = <0>; 499 clocks = <&cmu_peric1 CLK_DOUT_PERIC1_USI08>, 500 <&cmu_peric1 CLK_MOUT_PERIC1_NOC_USER>; 501 clock-names = "hsi2c", "hsi2c_pclk"; 502 interrupts = <GIC_SPI 682 IRQ_TYPE_LEVEL_HIGH 0>; 503 pinctrl-0 = <&hsi2c16_bus>; 504 pinctrl-names = "default"; 505 status = "disabled"; 506 }; 507 508 serial_10: serial@10920000 { 509 compatible = "samsung,exynos2200-uart", "google,gs101-uart"; 510 reg = <0x10920000 0xc0>; 511 clocks = <&cmu_peric1 CLK_MOUT_PERIC1_NOC_USER>, 512 <&cmu_peric1 CLK_DOUT_PERIC1_USI08>; 513 clock-names = "uart", "clk_uart_baud0"; 514 interrupts = <GIC_SPI 682 IRQ_TYPE_LEVEL_HIGH 0>; 515 pinctrl-0 = <&uart10_bus_single>; 516 pinctrl-names = "default"; 517 samsung,uart-fifosize = <64>; 518 status = "disabled"; 519 }; 520 }; 521 522 usi8_i2c: usi@109300c0 { 523 compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi"; 524 reg = <0x109300c0 0x20>; 525 ranges; 526 #address-cells = <1>; 527 #size-cells = <1>; 528 clocks = <&cmu_peric1 CLK_MOUT_PERIC0_NOC_USER>, 529 <&cmu_peric1 CLK_DOUT_PERIC1_USI08_SPI_I2C>; 530 clock-names = "pclk", "ipclk"; 531 samsung,mode = <USI_MODE_I2C>; 532 samsung,sysreg = <&syscon_peric1 0x203c>; 533 status = "disabled"; 534 535 hsi2c_17: i2c@10930000 { 536 compatible = "samsung,exynos2200-hsi2c", 537 "samsung,exynosautov9-hsi2c"; 538 reg = <0x10930000 0xc0>; 539 #address-cells = <1>; 540 #size-cells = <0>; 541 clocks = <&cmu_peric1 CLK_DOUT_PERIC1_USI08_SPI_I2C>, 542 <&cmu_peric1 CLK_MOUT_PERIC0_NOC_USER>; 543 clock-names = "hsi2c", "hsi2c_pclk"; 544 interrupts = <GIC_SPI 681 IRQ_TYPE_LEVEL_HIGH 0>; 545 pinctrl-0 = <&hsi2c17_bus>; 546 pinctrl-names = "default"; 547 status = "disabled"; 548 }; 549 }; 550 551 usi9: usi@109400c0 { 552 compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi"; 553 reg = <0x109400c0 0x20>; 554 ranges; 555 #address-cells = <1>; 556 #size-cells = <1>; 557 clocks = <&cmu_peric1 CLK_MOUT_PERIC1_NOC_USER>, 558 <&cmu_peric1 CLK_DOUT_PERIC1_USI09>; 559 clock-names = "pclk", "ipclk"; 560 samsung,sysreg = <&syscon_peric1 0x2040>; 561 status = "disabled"; 562 563 hsi2c_18: i2c@10940000 { 564 compatible = "samsung,exynos2200-hsi2c", 565 "samsung,exynosautov9-hsi2c"; 566 reg = <0x10940000 0xc0>; 567 #address-cells = <1>; 568 #size-cells = <0>; 569 clocks = <&cmu_peric1 CLK_DOUT_PERIC1_USI09>, 570 <&cmu_peric1 CLK_MOUT_PERIC1_NOC_USER>; 571 clock-names = "hsi2c", "hsi2c_pclk"; 572 interrupts = <GIC_SPI 684 IRQ_TYPE_LEVEL_HIGH 0>; 573 pinctrl-0 = <&hsi2c18_bus>; 574 pinctrl-names = "default"; 575 status = "disabled"; 576 }; 577 578 serial_11: serial@10940000 { 579 compatible = "samsung,exynos2200-uart", "google,gs101-uart"; 580 reg = <0x10940000 0xc0>; 581 clocks = <&cmu_peric1 CLK_MOUT_PERIC1_NOC_USER>, 582 <&cmu_peric1 CLK_DOUT_PERIC1_USI09>; 583 clock-names = "uart", "clk_uart_baud0"; 584 interrupts = <GIC_SPI 684 IRQ_TYPE_LEVEL_HIGH 0>; 585 pinctrl-0 = <&uart11_bus_single>; 586 pinctrl-names = "default"; 587 samsung,uart-fifosize = <64>; 588 status = "disabled"; 589 }; 590 }; 591 592 usi9_i2c: usi@109500c0 { 593 compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi"; 594 reg = <0x109500c0 0x20>; 595 ranges; 596 #address-cells = <1>; 597 #size-cells = <1>; 598 clocks = <&cmu_peric1 CLK_MOUT_PERIC0_NOC_USER>, 599 <&cmu_peric1 CLK_DOUT_PERIC1_I2C>; 600 clock-names = "pclk", "ipclk"; 601 samsung,mode = <USI_MODE_I2C>; 602 samsung,sysreg = <&syscon_peric1 0x2044>; 603 status = "disabled"; 604 605 hsi2c_19: i2c@10950000 { 606 compatible = "samsung,exynos2200-hsi2c", 607 "samsung,exynosautov9-hsi2c"; 608 reg = <0x10950000 0xc0>; 609 #address-cells = <1>; 610 #size-cells = <0>; 611 clocks = <&cmu_peric1 CLK_DOUT_PERIC1_I2C>, 612 <&cmu_peric1 CLK_MOUT_PERIC0_NOC_USER>; 613 clock-names = "hsi2c", "hsi2c_pclk"; 614 interrupts = <GIC_SPI 683 IRQ_TYPE_LEVEL_HIGH 0>; 615 pinctrl-0 = <&hsi2c19_bus>; 616 pinctrl-names = "default"; 617 status = "disabled"; 618 }; 619 }; 620 621 usi10: usi@109600c0 { 622 compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi"; 623 reg = <0x109600c0 0x20>; 624 ranges; 625 #address-cells = <1>; 626 #size-cells = <1>; 627 clocks = <&cmu_peric1 CLK_MOUT_PERIC1_NOC_USER>, 628 <&cmu_peric1 CLK_DOUT_PERIC1_USI10>; 629 clock-names = "pclk", "ipclk"; 630 samsung,sysreg = <&syscon_peric1 0x2048>; 631 status = "disabled"; 632 633 hsi2c_20: i2c@10960000 { 634 compatible = "samsung,exynos2200-hsi2c", 635 "samsung,exynosautov9-hsi2c"; 636 reg = <0x10960000 0xc0>; 637 #address-cells = <1>; 638 #size-cells = <0>; 639 clocks = <&cmu_peric1 CLK_DOUT_PERIC1_USI10>, 640 <&cmu_peric1 CLK_MOUT_PERIC1_NOC_USER>; 641 clock-names = "hsi2c", "hsi2c_pclk"; 642 interrupts = <GIC_SPI 686 IRQ_TYPE_LEVEL_HIGH 0>; 643 pinctrl-0 = <&hsi2c20_bus>; 644 pinctrl-names = "default"; 645 status = "disabled"; 646 }; 647 648 serial_12: serial@10960000 { 649 compatible = "samsung,exynos2200-uart", "google,gs101-uart"; 650 reg = <0x10960000 0xc0>; 651 clocks = <&cmu_peric1 CLK_MOUT_PERIC1_NOC_USER>, 652 <&cmu_peric1 CLK_DOUT_PERIC1_USI10>; 653 clock-names = "uart", "clk_uart_baud0"; 654 interrupts = <GIC_SPI 686 IRQ_TYPE_LEVEL_HIGH 0>; 655 pinctrl-0 = <&uart12_bus_single>; 656 pinctrl-names = "default"; 657 samsung,uart-fifosize = <64>; 658 status = "disabled"; 659 }; 660 }; 661 662 usi10_i2c: usi@109700c0 { 663 compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi"; 664 reg = <0x109700c0 0x20>; 665 ranges; 666 #address-cells = <1>; 667 #size-cells = <1>; 668 clocks = <&cmu_peric1 CLK_MOUT_PERIC0_NOC_USER>, 669 <&cmu_peric1 CLK_DOUT_PERIC1_I2C>; 670 clock-names = "pclk", "ipclk"; 671 samsung,mode = <USI_MODE_I2C>; 672 samsung,sysreg = <&syscon_peric1 0x204c>; 673 status = "disabled"; 674 675 hsi2c_21: i2c@10970000 { 676 compatible = "samsung,exynos2200-hsi2c", 677 "samsung,exynosautov9-hsi2c"; 678 reg = <0x10970000 0xc0>; 679 #address-cells = <1>; 680 #size-cells = <0>; 681 clocks = <&cmu_peric1 CLK_DOUT_PERIC1_I2C>, 682 <&cmu_peric1 CLK_MOUT_PERIC0_NOC_USER>; 683 clock-names = "hsi2c", "hsi2c_pclk"; 684 interrupts = <GIC_SPI 685 IRQ_TYPE_LEVEL_HIGH 0>; 685 pinctrl-0 = <&hsi2c21_bus>; 686 pinctrl-names = "default"; 687 status = "disabled"; 688 }; 689 690 }; 691 692 cmu_hsi0: clock-controller@10a00000 { 693 compatible = "samsung,exynos2200-cmu-hsi0"; 694 reg = <0x10a00000 0x8000>; 695 #clock-cells = <1>; 696 }; 697 698 usb32drd: phy@10aa0000 { 699 compatible = "samsung,exynos2200-usb32drd-phy"; 700 reg = <0x10aa0000 0x10000>; 701 702 clocks = <&cmu_hsi0 CLK_MOUT_HSI0_NOC>; 703 clock-names = "phy"; 704 705 #phy-cells = <1>; 706 phys = <&usb_hsphy>; 707 phy-names = "hs"; 708 709 samsung,pmu-syscon = <&pmu_system_controller>; 710 711 status = "disabled"; 712 }; 713 714 usb_hsphy: phy@10ab0000 { 715 compatible = "samsung,exynos2200-eusb2-phy"; 716 reg = <0x10ab0000 0x10000>; 717 718 clocks = <&cmu_hsi0 CLK_MOUT_HSI0_USB32DRD>, 719 <&cmu_hsi0 CLK_MOUT_HSI0_NOC>, 720 <&cmu_hsi0 CLK_DOUT_DIV_CLK_HSI0_EUSB>; 721 clock-names = "ref", "bus", "ctrl"; 722 723 #phy-cells = <0>; 724 725 status = "disabled"; 726 }; 727 728 usb: usb@10b00000 { 729 compatible = "samsung,exynos2200-dwusb3"; 730 ranges = <0x0 0x10b00000 0x10000>; 731 732 clocks = <&cmu_hsi0 CLK_MOUT_HSI0_NOC>; 733 clock-names = "link_aclk"; 734 735 #address-cells = <1>; 736 #size-cells = <1>; 737 738 status = "disabled"; 739 740 usb_dwc3: usb@0 { 741 compatible = "snps,dwc3"; 742 reg = <0x0 0x10000>; 743 744 clocks = <&cmu_hsi0 CLK_MOUT_HSI0_USB32DRD>; 745 clock-names = "ref"; 746 747 interrupts = <GIC_SPI 485 IRQ_TYPE_LEVEL_HIGH 0>; 748 749 phys = <&usb32drd 0>; 750 phy-names = "usb2-phy"; 751 752 snps,dis-u2-freeclk-exists-quirk; 753 snps,gfladj-refclk-lpm-sel-quirk; 754 snps,has-lpm-erratum; 755 snps,quirk-frame-length-adjustment = <0x20>; 756 snps,usb3_lpm_capable; 757 }; 758 }; 759 760 cmu_ufs: clock-controller@11000000 { 761 compatible = "samsung,exynos2200-cmu-ufs"; 762 reg = <0x11000000 0x8000>; 763 #clock-cells = <1>; 764 765 clocks = <&xtcxo>, 766 <&cmu_top CLK_DOUT_CMU_UFS_NOC>, 767 <&cmu_top CLK_MOUT_CMU_UFS_MMC_CARD>, 768 <&cmu_top CLK_DOUT_CMU_UFS_UFS_EMBD>; 769 clock-names = "oscclk", "noc", "mmc", "ufs"; 770 }; 771 772 syscon_ufs: syscon@11020000 { 773 compatible = "samsung,exynos2200-ufs-sysreg", "syscon"; 774 reg = <0x11020000 0x10000>; 775 }; 776 777 pinctrl_ufs: pinctrl@11040000 { 778 compatible = "samsung,exynos2200-pinctrl"; 779 reg = <0x11040000 0x1000>; 780 }; 781 782 pinctrl_hsi1ufs: pinctrl@11060000 { 783 compatible = "samsung,exynos2200-pinctrl"; 784 reg = <0x11060000 0x1000>; 785 }; 786 787 pinctrl_hsi1: pinctrl@11240000 { 788 compatible = "samsung,exynos2200-pinctrl"; 789 reg = <0x11240000 0x1000>; 790 }; 791 792 cmu_peric2: clock-controller@11c00000 { 793 compatible = "samsung,exynos2200-cmu-peric2"; 794 reg = <0x11c00000 0x8000>; 795 #clock-cells = <1>; 796 797 clocks = <&xtcxo>, 798 <&cmu_top CLK_DOUT_CMU_PERIC2_NOC>, 799 <&cmu_top CLK_DOUT_CMU_PERIC2_IP0>, 800 <&cmu_top CLK_DOUT_CMU_PERIC2_IP1>; 801 clock-names = "oscclk", "noc", "ip0", "ip1"; 802 }; 803 804 syscon_peric2: syscon@11c20000 { 805 compatible = "samsung,exynos2200-peric2-sysreg", "syscon"; 806 reg = <0x11c20000 0x10000>; 807 }; 808 809 pinctrl_peric2: pinctrl@11c30000 { 810 compatible = "samsung,exynos2200-pinctrl"; 811 reg = <0x11c30000 0x1000>; 812 }; 813 814 usi0: usi@11d000c0 { 815 compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi"; 816 reg = <0x11d000c0 0x20>; 817 ranges; 818 #address-cells = <1>; 819 #size-cells = <1>; 820 clocks = <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>, 821 <&cmu_peric2 CLK_DOUT_PERIC2_USI00>; 822 clock-names = "pclk", "ipclk"; 823 samsung,sysreg = <&syscon_peric2 0x2000>; 824 status = "disabled"; 825 826 hsi2c_0: i2c@11d00000 { 827 compatible = "samsung,exynos2200-hsi2c", 828 "samsung,exynosautov9-hsi2c"; 829 reg = <0x11d00000 0xc0>; 830 #address-cells = <1>; 831 #size-cells = <0>; 832 clocks = <&cmu_peric2 CLK_DOUT_PERIC2_USI00>, 833 <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>; 834 clock-names = "hsi2c", "hsi2c_pclk"; 835 interrupts = <GIC_SPI 704 IRQ_TYPE_LEVEL_HIGH 0>; 836 pinctrl-0 = <&hsi2c0_bus>; 837 pinctrl-names = "default"; 838 status = "disabled"; 839 }; 840 841 serial_2: serial@11d00000 { 842 compatible = "samsung,exynos2200-uart", "google,gs101-uart"; 843 reg = <0x11d00000 0xc0>; 844 clocks = <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>, 845 <&cmu_peric2 CLK_DOUT_PERIC2_USI00>; 846 clock-names = "uart", "clk_uart_baud0"; 847 interrupts = <GIC_SPI 704 IRQ_TYPE_LEVEL_HIGH 0>; 848 pinctrl-0 = <&uart2_bus_single>; 849 pinctrl-names = "default"; 850 samsung,uart-fifosize = <64>; 851 status = "disabled"; 852 }; 853 }; 854 855 usi0_i2c: usi@11d100c0 { 856 compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi"; 857 reg = <0x11d100c0 0x20>; 858 ranges; 859 #address-cells = <1>; 860 #size-cells = <1>; 861 clocks = <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>, 862 <&cmu_peric2 CLK_DOUT_PERIC2_USI00_SPI_I2C>; 863 clock-names = "pclk", "ipclk"; 864 samsung,mode = <USI_MODE_I2C>; 865 samsung,sysreg = <&syscon_peric2 0x2004>; 866 status = "disabled"; 867 868 hsi2c_1: i2c@11d10000 { 869 compatible = "samsung,exynos2200-hsi2c", 870 "samsung,exynosautov9-hsi2c"; 871 reg = <0x11d10000 0xc0>; 872 #address-cells = <1>; 873 #size-cells = <0>; 874 clocks = <&cmu_peric2 CLK_DOUT_PERIC2_USI00_SPI_I2C>, 875 <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>; 876 clock-names = "hsi2c", "hsi2c_pclk"; 877 interrupts = <GIC_SPI 703 IRQ_TYPE_LEVEL_HIGH 0>; 878 pinctrl-0 = <&hsi2c1_bus>; 879 pinctrl-names = "default"; 880 status = "disabled"; 881 }; 882 }; 883 884 usi1: usi@11d200c0 { 885 compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi"; 886 reg = <0x11d200c0 0x20>; 887 ranges; 888 #address-cells = <1>; 889 #size-cells = <1>; 890 clocks = <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>, 891 <&cmu_peric2 CLK_DOUT_PERIC2_USI01>; 892 clock-names = "pclk", "ipclk"; 893 samsung,sysreg = <&syscon_peric2 0x2008>; 894 status = "disabled"; 895 896 hsi2c_2: i2c@11d20000 { 897 compatible = "samsung,exynos2200-hsi2c", 898 "samsung,exynosautov9-hsi2c"; 899 reg = <0x11d20000 0xc0>; 900 #address-cells = <1>; 901 #size-cells = <0>; 902 clocks = <&cmu_peric2 CLK_DOUT_PERIC2_USI01>, 903 <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>; 904 clock-names = "hsi2c", "hsi2c_pclk"; 905 interrupts = <GIC_SPI 706 IRQ_TYPE_LEVEL_HIGH 0>; 906 pinctrl-0 = <&hsi2c2_bus>; 907 pinctrl-names = "default"; 908 status = "disabled"; 909 }; 910 911 serial_3: serial@11d20000 { 912 compatible = "samsung,exynos2200-uart", "google,gs101-uart"; 913 reg = <0x11d20000 0xc0>; 914 clocks = <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>, 915 <&cmu_peric2 CLK_DOUT_PERIC2_USI01>; 916 clock-names = "uart", "clk_uart_baud0"; 917 interrupts = <GIC_SPI 706 IRQ_TYPE_LEVEL_HIGH 0>; 918 pinctrl-0 = <&uart3_bus_single>; 919 pinctrl-names = "default"; 920 samsung,uart-fifosize = <64>; 921 status = "disabled"; 922 }; 923 }; 924 925 usi1_i2c: usi@11d300c0 { 926 compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi"; 927 reg = <0x11d300c0 0x20>; 928 ranges; 929 #address-cells = <1>; 930 #size-cells = <1>; 931 clocks = <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>, 932 <&cmu_peric2 CLK_DOUT_PERIC2_USI01_SPI_I2C>; 933 clock-names = "pclk", "ipclk"; 934 samsung,mode = <USI_MODE_I2C>; 935 samsung,sysreg = <&syscon_peric2 0x200c>; 936 status = "disabled"; 937 938 hsi2c_3: i2c@11d30000 { 939 compatible = "samsung,exynos2200-hsi2c", 940 "samsung,exynosautov9-hsi2c"; 941 reg = <0x11d30000 0xc0>; 942 #address-cells = <1>; 943 #size-cells = <0>; 944 clocks = <&cmu_peric2 CLK_DOUT_PERIC2_USI01_SPI_I2C>, 945 <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>; 946 clock-names = "hsi2c", "hsi2c_pclk"; 947 interrupts = <GIC_SPI 705 IRQ_TYPE_LEVEL_HIGH 0>; 948 pinctrl-0 = <&hsi2c3_bus>; 949 pinctrl-names = "default"; 950 status = "disabled"; 951 }; 952 }; 953 954 usi2: usi@11d400c0 { 955 compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi"; 956 reg = <0x11d400c0 0x20>; 957 ranges; 958 #address-cells = <1>; 959 #size-cells = <1>; 960 clocks = <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>, 961 <&cmu_peric2 CLK_DOUT_PERIC2_USI02>; 962 clock-names = "pclk", "ipclk"; 963 samsung,sysreg = <&syscon_peric2 0x2010>; 964 status = "disabled"; 965 966 hsi2c_4: i2c@11d40000 { 967 compatible = "samsung,exynos2200-hsi2c", 968 "samsung,exynosautov9-hsi2c"; 969 reg = <0x11d40000 0xc0>; 970 #address-cells = <1>; 971 #size-cells = <0>; 972 clocks = <&cmu_peric2 CLK_DOUT_PERIC2_USI02>, 973 <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>; 974 clock-names = "hsi2c", "hsi2c_pclk"; 975 interrupts = <GIC_SPI 708 IRQ_TYPE_LEVEL_HIGH 0>; 976 pinctrl-0 = <&hsi2c4_bus>; 977 pinctrl-names = "default"; 978 status = "disabled"; 979 }; 980 981 serial_4: serial@11d40000 { 982 compatible = "samsung,exynos2200-uart", "google,gs101-uart"; 983 reg = <0x11d40000 0xc0>; 984 clocks = <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>, 985 <&cmu_peric2 CLK_DOUT_PERIC2_USI02>; 986 clock-names = "uart", "clk_uart_baud0"; 987 interrupts = <GIC_SPI 708 IRQ_TYPE_LEVEL_HIGH 0>; 988 pinctrl-0 = <&uart4_bus_single>; 989 pinctrl-names = "default"; 990 samsung,uart-fifosize = <256>; 991 status = "disabled"; 992 }; 993 }; 994 995 usi2_i2c: usi@11d500c0 { 996 compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi"; 997 reg = <0x11d500c0 0x20>; 998 ranges; 999 #address-cells = <1>; 1000 #size-cells = <1>; 1001 clocks = <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>, 1002 <&cmu_peric2 CLK_DOUT_PERIC2_I2C>; 1003 clock-names = "pclk", "ipclk"; 1004 samsung,mode = <USI_MODE_I2C>; 1005 samsung,sysreg = <&syscon_peric2 0x2014>; 1006 status = "disabled"; 1007 1008 hsi2c_5: i2c@11d50000 { 1009 compatible = "samsung,exynos2200-hsi2c", 1010 "samsung,exynosautov9-hsi2c"; 1011 reg = <0x11d50000 0xc0>; 1012 #address-cells = <1>; 1013 #size-cells = <0>; 1014 clocks = <&cmu_peric2 CLK_DOUT_PERIC2_I2C>, 1015 <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>; 1016 clock-names = "hsi2c", "hsi2c_pclk"; 1017 interrupts = <GIC_SPI 707 IRQ_TYPE_LEVEL_HIGH 0>; 1018 pinctrl-0 = <&hsi2c5_bus>; 1019 pinctrl-names = "default"; 1020 status = "disabled"; 1021 }; 1022 }; 1023 1024 usi3: usi@11d600c0 { 1025 compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi"; 1026 reg = <0x11d600c0 0x20>; 1027 ranges; 1028 #address-cells = <1>; 1029 #size-cells = <1>; 1030 clocks = <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>, 1031 <&cmu_peric2 CLK_DOUT_PERIC2_USI03>; 1032 clock-names = "pclk", "ipclk"; 1033 samsung,sysreg = <&syscon_peric2 0x2018>; 1034 status = "disabled"; 1035 1036 hsi2c_6: i2c@11d60000 { 1037 compatible = "samsung,exynos2200-hsi2c", 1038 "samsung,exynosautov9-hsi2c"; 1039 reg = <0x11d60000 0xc0>; 1040 #address-cells = <1>; 1041 #size-cells = <0>; 1042 clocks = <&cmu_peric2 CLK_DOUT_PERIC2_USI03>, 1043 <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>; 1044 clock-names = "hsi2c", "hsi2c_pclk"; 1045 interrupts = <GIC_SPI 710 IRQ_TYPE_LEVEL_HIGH 0>; 1046 pinctrl-0 = <&hsi2c6_bus>; 1047 pinctrl-names = "default"; 1048 status = "disabled"; 1049 }; 1050 1051 serial_5: serial@11d60000 { 1052 compatible = "samsung,exynos2200-uart", "google,gs101-uart"; 1053 reg = <0x11d60000 0xc0>; 1054 clocks = <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>, 1055 <&cmu_peric2 CLK_DOUT_PERIC2_USI03>; 1056 clock-names = "uart", "clk_uart_baud0"; 1057 interrupts = <GIC_SPI 710 IRQ_TYPE_LEVEL_HIGH 0>; 1058 pinctrl-0 = <&uart5_bus_single>; 1059 pinctrl-names = "default"; 1060 samsung,uart-fifosize = <256>; 1061 status = "disabled"; 1062 }; 1063 }; 1064 1065 usi3_i2c: usi@11d700c0 { 1066 compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi"; 1067 reg = <0x11d700c0 0x20>; 1068 ranges; 1069 #address-cells = <1>; 1070 #size-cells = <1>; 1071 clocks = <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>, 1072 <&cmu_peric2 CLK_DOUT_PERIC2_I2C>; 1073 clock-names = "pclk", "ipclk"; 1074 samsung,mode = <USI_MODE_I2C>; 1075 samsung,sysreg = <&syscon_peric2 0x201c>; 1076 status = "disabled"; 1077 1078 hsi2c_7: i2c@11d70000 { 1079 compatible = "samsung,exynos2200-hsi2c", 1080 "samsung,exynosautov9-hsi2c"; 1081 reg = <0x11d70000 0xc0>; 1082 #address-cells = <1>; 1083 #size-cells = <0>; 1084 clocks = <&cmu_peric2 CLK_DOUT_PERIC2_I2C>, 1085 <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>; 1086 clock-names = "hsi2c", "hsi2c_pclk"; 1087 interrupts = <GIC_SPI 709 IRQ_TYPE_LEVEL_HIGH 0>; 1088 pinctrl-0 = <&hsi2c7_bus>; 1089 pinctrl-names = "default"; 1090 status = "disabled"; 1091 }; 1092 }; 1093 1094 usi5_i2c: usi@11d800c0 { 1095 compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi"; 1096 reg = <0x11d800c0 0x20>; 1097 ranges; 1098 #address-cells = <1>; 1099 #size-cells = <1>; 1100 clocks = <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>, 1101 <&cmu_peric2 CLK_DOUT_PERIC2_I2C>; 1102 clock-names = "pclk", "ipclk"; 1103 samsung,mode = <USI_MODE_I2C>; 1104 samsung,sysreg = <&syscon_peric2 0x102c>; 1105 status = "disabled"; 1106 1107 hsi2c_11: i2c@11d80000 { 1108 compatible = "samsung,exynos2200-hsi2c", 1109 "samsung,exynosautov9-hsi2c"; 1110 reg = <0x11d80000 0xc0>; 1111 #address-cells = <1>; 1112 #size-cells = <0>; 1113 clocks = <&cmu_peric2 CLK_DOUT_PERIC2_I2C>, 1114 <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>; 1115 clock-names = "hsi2c", "hsi2c_pclk"; 1116 interrupts = <GIC_SPI 711 IRQ_TYPE_LEVEL_HIGH 0>; 1117 pinctrl-0 = <&hsi2c11_bus>; 1118 pinctrl-names = "default"; 1119 status = "disabled"; 1120 }; 1121 }; 1122 1123 usi6_i2c: usi@11d900c0 { 1124 compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi"; 1125 reg = <0x11d900c0 0x20>; 1126 ranges; 1127 #address-cells = <1>; 1128 #size-cells = <1>; 1129 clocks = <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>, 1130 <&cmu_peric2 CLK_DOUT_PERIC2_I2C>; 1131 clock-names = "pclk", "ipclk"; 1132 samsung,mode = <USI_MODE_I2C>; 1133 samsung,sysreg = <&syscon_peric2 0x1004>; 1134 status = "disabled"; 1135 1136 hsi2c_13: i2c@11d90000 { 1137 compatible = "samsung,exynos2200-hsi2c", 1138 "samsung,exynosautov9-hsi2c"; 1139 reg = <0x11d90000 0xc0>; 1140 #address-cells = <1>; 1141 #size-cells = <0>; 1142 clocks = <&cmu_peric2 CLK_DOUT_PERIC2_I2C>, 1143 <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>; 1144 clock-names = "hsi2c", "hsi2c_pclk"; 1145 interrupts = <GIC_SPI 713 IRQ_TYPE_LEVEL_HIGH 0>; 1146 pinctrl-0 = <&hsi2c13_bus>; 1147 pinctrl-names = "default"; 1148 status = "disabled"; 1149 }; 1150 }; 1151 1152 usi11: usi@11da00c0 { 1153 compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi"; 1154 reg = <0x11da00c0 0x20>; 1155 ranges; 1156 #address-cells = <1>; 1157 #size-cells = <1>; 1158 clocks = <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>, 1159 <&cmu_peric2 CLK_DOUT_PERIC2_USI11>; 1160 clock-names = "pclk", "ipclk"; 1161 samsung,sysreg = <&syscon_peric2 0x1058>; 1162 status = "disabled"; 1163 1164 hsi2c_22: i2c@11da0000 { 1165 compatible = "samsung,exynos2200-hsi2c", 1166 "samsung,exynosautov9-hsi2c"; 1167 reg = <0x11da0000 0xc0>; 1168 #address-cells = <1>; 1169 #size-cells = <0>; 1170 clocks = <&cmu_peric2 CLK_DOUT_PERIC2_USI11>, 1171 <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>; 1172 clock-names = "hsi2c", "hsi2c_pclk"; 1173 interrupts = <GIC_SPI 716 IRQ_TYPE_LEVEL_HIGH 0>; 1174 pinctrl-0 = <&hsi2c22_bus>; 1175 pinctrl-names = "default"; 1176 status = "disabled"; 1177 }; 1178 1179 serial_13: serial@11da0000 { 1180 compatible = "samsung,exynos2200-uart", "google,gs101-uart"; 1181 reg = <0x11da0000 0xc0>; 1182 clocks = <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>, 1183 <&cmu_peric2 CLK_DOUT_PERIC2_USI11>; 1184 clock-names = "uart", "clk_uart_baud0"; 1185 interrupts = <GIC_SPI 716 IRQ_TYPE_LEVEL_HIGH 0>; 1186 pinctrl-0 = <&uart13_bus_single>; 1187 pinctrl-names = "default"; 1188 samsung,uart-fifosize = <64>; 1189 status = "disabled"; 1190 }; 1191 }; 1192 1193 usi11_i2c: usi@11db00c0 { 1194 compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi"; 1195 reg = <0x11db00c0 0x20>; 1196 ranges; 1197 #address-cells = <1>; 1198 #size-cells = <1>; 1199 clocks = <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>, 1200 <&cmu_peric2 CLK_DOUT_PERIC2_I2C>; 1201 clock-names = "pclk", "ipclk"; 1202 samsung,mode = <USI_MODE_I2C>; 1203 samsung,sysreg = <&syscon_peric2 0x105c>; 1204 status = "disabled"; 1205 1206 hsi2c_23: i2c@11db0000 { 1207 compatible = "samsung,exynos2200-hsi2c", 1208 "samsung,exynosautov9-hsi2c"; 1209 reg = <0x11db0000 0xc0>; 1210 #address-cells = <1>; 1211 #size-cells = <0>; 1212 clocks = <&cmu_peric2 CLK_DOUT_PERIC2_I2C>, 1213 <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>; 1214 clock-names = "hsi2c", "hsi2c_pclk"; 1215 interrupts = <GIC_SPI 715 IRQ_TYPE_LEVEL_HIGH 0>; 1216 pinctrl-0 = <&hsi2c23_bus>; 1217 pinctrl-names = "default"; 1218 status = "disabled"; 1219 }; 1220 }; 1221 1222 usi5: usi@11dd00c0 { 1223 compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi"; 1224 reg = <0x11dd00c0 0x20>; 1225 ranges; 1226 #address-cells = <1>; 1227 #size-cells = <1>; 1228 clocks = <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>, 1229 <&cmu_peric2 CLK_DOUT_PERIC2_USI05>; 1230 clock-names = "pclk", "ipclk"; 1231 samsung,sysreg = <&syscon_peric2 0x117c>; 1232 status = "disabled"; 1233 1234 hsi2c_10: i2c@11dd0000 { 1235 compatible = "samsung,exynos2200-hsi2c", 1236 "samsung,exynosautov9-hsi2c"; 1237 reg = <0x11dd0000 0xc0>; 1238 #address-cells = <1>; 1239 #size-cells = <0>; 1240 clocks = <&cmu_peric2 CLK_DOUT_PERIC2_USI05>, 1241 <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>; 1242 clock-names = "hsi2c", "hsi2c_pclk"; 1243 interrupts = <GIC_SPI 538 IRQ_TYPE_LEVEL_HIGH 0>; 1244 pinctrl-0 = <&hsi2c10_bus>; 1245 pinctrl-names = "default"; 1246 status = "disabled"; 1247 }; 1248 1249 serial_7: serial@11dd0000 { 1250 compatible = "samsung,exynos2200-uart", "google,gs101-uart"; 1251 reg = <0x11dd0000 0xc0>; 1252 clocks = <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>, 1253 <&cmu_peric2 CLK_DOUT_PERIC2_USI05>; 1254 clock-names = "uart", "clk_uart_baud0"; 1255 interrupts = <GIC_SPI 538 IRQ_TYPE_LEVEL_HIGH 0>; 1256 pinctrl-0 = <&uart7_bus_single>; 1257 pinctrl-names = "default"; 1258 samsung,uart-fifosize = <256>; 1259 status = "disabled"; 1260 }; 1261 }; 1262 1263 usi6: usi@11de00c0 { 1264 compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi"; 1265 reg = <0x11de00c0 0x20>; 1266 ranges; 1267 #address-cells = <1>; 1268 #size-cells = <1>; 1269 clocks = <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>, 1270 <&cmu_peric2 CLK_DOUT_PERIC2_USI06>; 1271 clock-names = "pclk", "ipclk"; 1272 samsung,sysreg = <&syscon_peric2 0x1180>; 1273 status = "disabled"; 1274 1275 hsi2c_12: i2c@11de0000 { 1276 compatible = "samsung,exynos2200-hsi2c", 1277 "samsung,exynosautov9-hsi2c"; 1278 reg = <0x11de0000 0xc0>; 1279 #address-cells = <1>; 1280 #size-cells = <0>; 1281 clocks = <&cmu_peric2 CLK_DOUT_PERIC2_USI06>, 1282 <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>; 1283 clock-names = "hsi2c", "hsi2c_pclk"; 1284 interrupts = <GIC_SPI 539 IRQ_TYPE_LEVEL_HIGH 0>; 1285 pinctrl-0 = <&hsi2c12_bus>; 1286 pinctrl-names = "default"; 1287 status = "disabled"; 1288 }; 1289 1290 serial_8: serial@11de0000 { 1291 compatible = "samsung,exynos2200-uart", "google,gs101-uart"; 1292 reg = <0x11de0000 0xc0>; 1293 clocks = <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>, 1294 <&cmu_peric2 CLK_DOUT_PERIC2_USI06>; 1295 clock-names = "uart", "clk_uart_baud0"; 1296 interrupts = <GIC_SPI 539 IRQ_TYPE_LEVEL_HIGH 0>; 1297 pinctrl-0 = <&uart8_bus_single>; 1298 pinctrl-names = "default"; 1299 samsung,uart-fifosize = <64>; 1300 status = "disabled"; 1301 }; 1302 }; 1303 1304 cmu_cmgp: clock-controller@14e00000 { 1305 compatible = "samsung,exynos2200-cmu-cmgp"; 1306 reg = <0x14e00000 0x8000>; 1307 #clock-cells = <1>; 1308 1309 clocks = <&xtcxo>, 1310 <&cmu_alive CLK_DOUT_ALIVE_CMGP_NOC>, 1311 <&cmu_alive CLK_DOUT_ALIVE_CMGP_PERI>; 1312 clock-names = "oscclk", "noc", "peri"; 1313 }; 1314 1315 syscon_cmgp: syscon@14e20000 { 1316 compatible = "samsung,exynos2200-cmgp-sysreg", "syscon"; 1317 reg = <0x14e20000 0x10000>; 1318 }; 1319 1320 pinctrl_cmgp: pinctrl@14e30000 { 1321 compatible = "samsung,exynos2200-pinctrl"; 1322 reg = <0x14e30000 0x1000>; 1323 1324 wakeup-interrupt-controller { 1325 compatible = "samsung,exynos2200-wakeup-eint", 1326 "samsung,exynos850-wakeup-eint", 1327 "samsung,exynos7-wakeup-eint"; 1328 }; 1329 }; 1330 1331 usi_cmgp0: usi@14f000c0 { 1332 compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi"; 1333 reg = <0x14f000c0 0x20>; 1334 ranges; 1335 #address-cells = <1>; 1336 #size-cells = <1>; 1337 clocks = <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>, 1338 <&cmu_cmgp CLK_DOUT_CMGP_USI0>; 1339 clock-names = "pclk", "ipclk"; 1340 samsung,sysreg = <&syscon_cmgp 0x2000>; 1341 status = "disabled"; 1342 1343 hsi2c_24: i2c@14f00000 { 1344 compatible = "samsung,exynos2200-hsi2c", 1345 "samsung,exynosautov9-hsi2c"; 1346 reg = <0x14f00000 0xc0>; 1347 #address-cells = <1>; 1348 #size-cells = <0>; 1349 clocks = <&cmu_cmgp CLK_DOUT_CMGP_USI0>, 1350 <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>; 1351 clock-names = "hsi2c", "hsi2c_pclk"; 1352 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH 0>; 1353 pinctrl-0 = <&hsi2c24_bus>; 1354 pinctrl-names = "default"; 1355 status = "disabled"; 1356 }; 1357 1358 serial_14: serial@14f00000 { 1359 compatible = "samsung,exynos2200-uart", "google,gs101-uart"; 1360 reg = <0x14f00000 0xc0>; 1361 clocks = <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>, 1362 <&cmu_cmgp CLK_DOUT_CMGP_USI0>; 1363 clock-names = "uart", "clk_uart_baud0"; 1364 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH 0>; 1365 pinctrl-0 = <&uart14_bus_single>; 1366 pinctrl-names = "default"; 1367 samsung,uart-fifosize = <64>; 1368 status = "disabled"; 1369 }; 1370 }; 1371 1372 usi_i2c_cmgp0: usi@14f100c0 { 1373 compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi"; 1374 reg = <0x14f100c0 0x20>; 1375 ranges; 1376 #address-cells = <1>; 1377 #size-cells = <1>; 1378 clocks = <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>, 1379 <&cmu_cmgp CLK_DOUT_CMGP_SPI_I2C0>; 1380 clock-names = "pclk", "ipclk"; 1381 samsung,mode = <USI_MODE_I2C>; 1382 samsung,sysreg = <&syscon_cmgp 0x2070>; 1383 status = "disabled"; 1384 1385 hsi2c_25: i2c@14f10000 { 1386 compatible = "samsung,exynos2200-hsi2c", 1387 "samsung,exynosautov9-hsi2c"; 1388 reg = <0x14f10000 0xc0>; 1389 #address-cells = <1>; 1390 #size-cells = <0>; 1391 clocks = <&cmu_cmgp CLK_DOUT_CMGP_SPI_I2C0>, 1392 <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>; 1393 clock-names = "hsi2c", "hsi2c_pclk"; 1394 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH 0>; 1395 pinctrl-0 = <&hsi2c25_bus>; 1396 pinctrl-names = "default"; 1397 status = "disabled"; 1398 }; 1399 }; 1400 1401 usi_cmgp1: usi@14f200c0 { 1402 compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi"; 1403 reg = <0x14f200c0 0x20>; 1404 ranges; 1405 #address-cells = <1>; 1406 #size-cells = <1>; 1407 clocks = <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>, 1408 <&cmu_cmgp CLK_DOUT_CMGP_USI1>; 1409 clock-names = "pclk", "ipclk"; 1410 samsung,sysreg = <&syscon_cmgp 0x2010>; 1411 status = "disabled"; 1412 1413 hsi2c_26: i2c@14f20000 { 1414 compatible = "samsung,exynos2200-hsi2c", 1415 "samsung,exynosautov9-hsi2c"; 1416 reg = <0x14f20000 0xc0>; 1417 #address-cells = <1>; 1418 #size-cells = <0>; 1419 clocks = <&cmu_cmgp CLK_DOUT_CMGP_USI1>, 1420 <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>; 1421 clock-names = "hsi2c", "hsi2c_pclk"; 1422 interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH 0>; 1423 pinctrl-0 = <&hsi2c26_bus>; 1424 pinctrl-names = "default"; 1425 status = "disabled"; 1426 }; 1427 1428 serial_15: serial@14f20000 { 1429 compatible = "samsung,exynos2200-uart", "google,gs101-uart"; 1430 reg = <0x14f20000 0xc0>; 1431 clocks = <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>, 1432 <&cmu_cmgp CLK_DOUT_CMGP_USI1>; 1433 clock-names = "uart", "clk_uart_baud0"; 1434 interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH 0>; 1435 pinctrl-0 = <&uart15_bus_single>; 1436 pinctrl-names = "default"; 1437 samsung,uart-fifosize = <64>; 1438 status = "disabled"; 1439 }; 1440 }; 1441 1442 usi_i2c_cmgp1: usi@14f300c0 { 1443 compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi"; 1444 reg = <0x14f300c0 0x20>; 1445 ranges; 1446 #address-cells = <1>; 1447 #size-cells = <1>; 1448 clocks = <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>, 1449 <&cmu_cmgp CLK_DOUT_CMGP_SPI_I2C1>; 1450 clock-names = "pclk", "ipclk"; 1451 samsung,mode = <USI_MODE_I2C>; 1452 samsung,sysreg = <&syscon_cmgp 0x2074>; 1453 status = "disabled"; 1454 1455 hsi2c_27: i2c@14f30000 { 1456 compatible = "samsung,exynos2200-hsi2c", 1457 "samsung,exynosautov9-hsi2c"; 1458 reg = <0x14f30000 0xc0>; 1459 #address-cells = <1>; 1460 #size-cells = <0>; 1461 clocks = <&cmu_cmgp CLK_DOUT_CMGP_SPI_I2C1>, 1462 <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>; 1463 clock-names = "hsi2c", "hsi2c_pclk"; 1464 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH 0>; 1465 pinctrl-0 = <&hsi2c27_bus>; 1466 pinctrl-names = "default"; 1467 status = "disabled"; 1468 }; 1469 }; 1470 1471 usi_cmgp2: usi@14f400c0 { 1472 compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi"; 1473 reg = <0x14f400c0 0x20>; 1474 ranges; 1475 #address-cells = <1>; 1476 #size-cells = <1>; 1477 clocks = <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>, 1478 <&cmu_cmgp CLK_DOUT_CMGP_USI2>; 1479 clock-names = "pclk", "ipclk"; 1480 samsung,sysreg = <&syscon_cmgp 0x2020>; 1481 status = "disabled"; 1482 1483 hsi2c_28: i2c@14f40000 { 1484 compatible = "samsung,exynos2200-hsi2c", 1485 "samsung,exynosautov9-hsi2c"; 1486 reg = <0x14f40000 0xc0>; 1487 #address-cells = <1>; 1488 #size-cells = <0>; 1489 clocks = <&cmu_cmgp CLK_DOUT_CMGP_USI2>, 1490 <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>; 1491 clock-names = "hsi2c", "hsi2c_pclk"; 1492 interrupts = <GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH 0>; 1493 pinctrl-0 = <&hsi2c28_bus>; 1494 pinctrl-names = "default"; 1495 status = "disabled"; 1496 }; 1497 1498 serial_16: serial@14f40000 { 1499 compatible = "samsung,exynos2200-uart", "google,gs101-uart"; 1500 reg = <0x14f40000 0xc0>; 1501 clocks = <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>, 1502 <&cmu_cmgp CLK_DOUT_CMGP_USI2>; 1503 clock-names = "uart", "clk_uart_baud0"; 1504 interrupts = <GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH 0>; 1505 pinctrl-0 = <&uart16_bus_single>; 1506 pinctrl-names = "default"; 1507 samsung,uart-fifosize = <64>; 1508 status = "disabled"; 1509 }; 1510 }; 1511 1512 usi_i2c_cmgp2: usi@14f500c0 { 1513 compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi"; 1514 reg = <0x14f500c0 0x20>; 1515 ranges; 1516 #address-cells = <1>; 1517 #size-cells = <1>; 1518 clocks = <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>, 1519 <&cmu_cmgp CLK_DOUT_CMGP_I2C>; 1520 clock-names = "pclk", "ipclk"; 1521 samsung,mode = <USI_MODE_I2C>; 1522 samsung,sysreg = <&syscon_cmgp 0x2024>; 1523 status = "disabled"; 1524 1525 hsi2c_29: i2c@14f50000 { 1526 compatible = "samsung,exynos2200-hsi2c", 1527 "samsung,exynosautov9-hsi2c"; 1528 reg = <0x14f50000 0xc0>; 1529 #address-cells = <1>; 1530 #size-cells = <0>; 1531 clocks = <&cmu_cmgp CLK_DOUT_CMGP_I2C>, 1532 <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>; 1533 clock-names = "hsi2c", "hsi2c_pclk"; 1534 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH 0>; 1535 pinctrl-0 = <&hsi2c29_bus>; 1536 pinctrl-names = "default"; 1537 status = "disabled"; 1538 }; 1539 }; 1540 1541 usi_cmgp3: usi@14f600c0 { 1542 compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi"; 1543 reg = <0x14f600c0 0x20>; 1544 ranges; 1545 #address-cells = <1>; 1546 #size-cells = <1>; 1547 clocks = <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>, 1548 <&cmu_cmgp CLK_DOUT_CMGP_USI3>; 1549 clock-names = "pclk", "ipclk"; 1550 samsung,sysreg = <&syscon_cmgp 0x2030>; 1551 status = "disabled"; 1552 1553 hsi2c_30: i2c@14f60000 { 1554 compatible = "samsung,exynos2200-hsi2c", 1555 "samsung,exynosautov9-hsi2c"; 1556 reg = <0x14f60000 0xc0>; 1557 #address-cells = <1>; 1558 #size-cells = <0>; 1559 clocks = <&cmu_cmgp CLK_DOUT_CMGP_USI3>, 1560 <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>; 1561 clock-names = "hsi2c", "hsi2c_pclk"; 1562 interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH 0>; 1563 pinctrl-0 = <&hsi2c30_bus>; 1564 pinctrl-names = "default"; 1565 status = "disabled"; 1566 }; 1567 1568 serial_17: serial@14f60000 { 1569 compatible = "samsung,exynos2200-uart", "google,gs101-uart"; 1570 reg = <0x14f60000 0xc0>; 1571 clocks = <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>, 1572 <&cmu_cmgp CLK_DOUT_CMGP_USI3>; 1573 clock-names = "uart", "clk_uart_baud0"; 1574 interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH 0>; 1575 pinctrl-0 = <&uart17_bus_single>; 1576 pinctrl-names = "default"; 1577 samsung,uart-fifosize = <64>; 1578 status = "disabled"; 1579 }; 1580 }; 1581 1582 usi_i2c_cmgp3: usi@14f700c0 { 1583 compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi"; 1584 reg = <0x14f700c0 0x20>; 1585 ranges; 1586 #address-cells = <1>; 1587 #size-cells = <1>; 1588 clocks = <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>, 1589 <&cmu_cmgp CLK_DOUT_CMGP_I2C>; 1590 clock-names = "pclk", "ipclk"; 1591 samsung,mode = <USI_MODE_I2C>; 1592 samsung,sysreg = <&syscon_cmgp 0x2034>; 1593 status = "disabled"; 1594 1595 hsi2c_31: i2c@14f70000 { 1596 compatible = "samsung,exynos2200-hsi2c", 1597 "samsung,exynosautov9-hsi2c"; 1598 reg = <0x14f70000 0xc0>; 1599 #address-cells = <1>; 1600 #size-cells = <0>; 1601 clocks = <&cmu_cmgp CLK_DOUT_CMGP_I2C>, 1602 <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>; 1603 clock-names = "hsi2c", "hsi2c_pclk"; 1604 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH 0>; 1605 pinctrl-0 = <&hsi2c31_bus>; 1606 pinctrl-names = "default"; 1607 status = "disabled"; 1608 }; 1609 }; 1610 1611 usi_cmgp4: usi@14f800c0 { 1612 compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi"; 1613 reg = <0x14f800c0 0x20>; 1614 ranges; 1615 #address-cells = <1>; 1616 #size-cells = <1>; 1617 clocks = <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>, 1618 <&cmu_cmgp CLK_DOUT_CMGP_USI4>; 1619 clock-names = "pclk", "ipclk"; 1620 samsung,sysreg = <&syscon_cmgp 0x2040>; 1621 status = "disabled"; 1622 1623 hsi2c_32: i2c@14f80000 { 1624 compatible = "samsung,exynos2200-hsi2c", 1625 "samsung,exynosautov9-hsi2c"; 1626 reg = <0x14f80000 0xc0>; 1627 #address-cells = <1>; 1628 #size-cells = <0>; 1629 clocks = <&cmu_cmgp CLK_DOUT_CMGP_USI4>, 1630 <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>; 1631 clock-names = "hsi2c", "hsi2c_pclk"; 1632 interrupts = <GIC_SPI 179 IRQ_TYPE_LEVEL_HIGH 0>; 1633 pinctrl-0 = <&hsi2c32_bus>; 1634 pinctrl-names = "default"; 1635 status = "disabled"; 1636 }; 1637 1638 serial_18: serial@14f80000 { 1639 compatible = "samsung,exynos2200-uart", "google,gs101-uart"; 1640 reg = <0x14f80000 0xc0>; 1641 clocks = <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>, 1642 <&cmu_cmgp CLK_DOUT_CMGP_USI4>; 1643 clock-names = "uart", "clk_uart_baud0"; 1644 interrupts = <GIC_SPI 179 IRQ_TYPE_LEVEL_HIGH 0>; 1645 pinctrl-0 = <&uart18_bus_single>; 1646 pinctrl-names = "default"; 1647 samsung,uart-fifosize = <64>; 1648 status = "disabled"; 1649 }; 1650 }; 1651 1652 usi_i2c_cmgp4: usi@14f900c0 { 1653 compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi"; 1654 reg = <0x14f900c0 0x20>; 1655 ranges; 1656 #address-cells = <1>; 1657 #size-cells = <1>; 1658 clocks = <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>, 1659 <&cmu_cmgp CLK_DOUT_CMGP_I2C>; 1660 clock-names = "pclk", "ipclk"; 1661 samsung,mode = <USI_MODE_I2C>; 1662 samsung,sysreg = <&syscon_cmgp 0x2044>; 1663 status = "disabled"; 1664 1665 hsi2c_33: i2c@14f90000 { 1666 compatible = "samsung,exynos2200-hsi2c", 1667 "samsung,exynosautov9-hsi2c"; 1668 reg = <0x14f90000 0xc0>; 1669 #address-cells = <1>; 1670 #size-cells = <0>; 1671 clocks = <&cmu_cmgp CLK_DOUT_CMGP_I2C>, 1672 <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>; 1673 clock-names = "hsi2c", "hsi2c_pclk"; 1674 interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH 0>; 1675 pinctrl-0 = <&hsi2c33_bus>; 1676 pinctrl-names = "default"; 1677 status = "disabled"; 1678 }; 1679 }; 1680 1681 usi_cmgp5: usi@14fa00c0 { 1682 compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi"; 1683 reg = <0x14fa00c0 0x20>; 1684 ranges; 1685 #address-cells = <1>; 1686 #size-cells = <1>; 1687 clocks = <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>, 1688 <&cmu_cmgp CLK_DOUT_CMGP_USI5>; 1689 clock-names = "pclk", "ipclk"; 1690 samsung,sysreg = <&syscon_cmgp 0x2050>; 1691 status = "disabled"; 1692 1693 hsi2c_34: i2c@14fa0000 { 1694 compatible = "samsung,exynos2200-hsi2c", 1695 "samsung,exynosautov9-hsi2c"; 1696 reg = <0x14fa0000 0xc0>; 1697 #address-cells = <1>; 1698 #size-cells = <0>; 1699 clocks = <&cmu_cmgp CLK_DOUT_CMGP_USI5>, 1700 <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>; 1701 clock-names = "hsi2c", "hsi2c_pclk"; 1702 interrupts = <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH 0>; 1703 pinctrl-0 = <&hsi2c34_bus>; 1704 pinctrl-names = "default"; 1705 status = "disabled"; 1706 }; 1707 1708 serial_19: serial@14fa0000 { 1709 compatible = "samsung,exynos2200-uart", "google,gs101-uart"; 1710 reg = <0x14fa0000 0xc0>; 1711 clocks = <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>, 1712 <&cmu_cmgp CLK_DOUT_CMGP_USI5>; 1713 clock-names = "uart", "clk_uart_baud0"; 1714 interrupts = <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH 0>; 1715 pinctrl-0 = <&uart19_bus_single>; 1716 pinctrl-names = "default"; 1717 samsung,uart-fifosize = <64>; 1718 status = "disabled"; 1719 }; 1720 }; 1721 1722 usi_i2c_cmgp5: usi@14fb00c0 { 1723 compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi"; 1724 reg = <0x14fb00c0 0x20>; 1725 ranges; 1726 #address-cells = <1>; 1727 #size-cells = <1>; 1728 clocks = <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>, 1729 <&cmu_cmgp CLK_DOUT_CMGP_I2C>; 1730 clock-names = "pclk", "ipclk"; 1731 samsung,mode = <USI_MODE_I2C>; 1732 samsung,sysreg = <&syscon_cmgp 0x2054>; 1733 status = "disabled"; 1734 1735 hsi2c_35: i2c@14fb0000 { 1736 compatible = "samsung,exynos2200-hsi2c", 1737 "samsung,exynosautov9-hsi2c"; 1738 reg = <0x14fb0000 0xc0>; 1739 #address-cells = <1>; 1740 #size-cells = <0>; 1741 clocks = <&cmu_cmgp CLK_DOUT_CMGP_I2C>, 1742 <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>; 1743 clock-names = "hsi2c", "hsi2c_pclk"; 1744 interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH 0>; 1745 pinctrl-0 = <&hsi2c35_bus>; 1746 pinctrl-names = "default"; 1747 status = "disabled"; 1748 }; 1749 }; 1750 1751 usi_cmgp6: usi@14fc00c0 { 1752 compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi"; 1753 reg = <0x14fc00c0 0x20>; 1754 ranges; 1755 #address-cells = <1>; 1756 #size-cells = <1>; 1757 clocks = <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>, 1758 <&cmu_cmgp CLK_DOUT_CMGP_USI6>; 1759 clock-names = "pclk", "ipclk"; 1760 samsung,sysreg = <&syscon_cmgp 0x2060>; 1761 status = "disabled"; 1762 1763 hsi2c_36: i2c@14fc0000 { 1764 compatible = "samsung,exynos2200-hsi2c", 1765 "samsung,exynosautov9-hsi2c"; 1766 reg = <0x14fc0000 0xc0>; 1767 #address-cells = <1>; 1768 #size-cells = <0>; 1769 clocks = <&cmu_cmgp CLK_DOUT_CMGP_USI6>, 1770 <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>; 1771 clock-names = "hsi2c", "hsi2c_pclk"; 1772 interrupts = <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH 0>; 1773 pinctrl-0 = <&hsi2c36_bus>; 1774 pinctrl-names = "default"; 1775 status = "disabled"; 1776 }; 1777 1778 serial_20: serial@14fc0000 { 1779 compatible = "samsung,exynos2200-uart", "google,gs101-uart"; 1780 reg = <0x14fc0000 0xc0>; 1781 clocks = <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>, 1782 <&cmu_cmgp CLK_DOUT_CMGP_USI6>; 1783 clock-names = "uart", "clk_uart_baud0"; 1784 interrupts = <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH 0>; 1785 pinctrl-0 = <&uart20_bus_single>; 1786 pinctrl-names = "default"; 1787 samsung,uart-fifosize = <64>; 1788 status = "disabled"; 1789 }; 1790 }; 1791 1792 usi_i2c_cmgp6: usi@14fd00c0 { 1793 compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi"; 1794 reg = <0x14fd00c0 0x20>; 1795 ranges; 1796 #address-cells = <1>; 1797 #size-cells = <1>; 1798 clocks = <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>, 1799 <&cmu_cmgp CLK_DOUT_CMGP_I2C>; 1800 clock-names = "pclk", "ipclk"; 1801 samsung,mode = <USI_MODE_I2C>; 1802 samsung,sysreg = <&syscon_cmgp 0x2064>; 1803 status = "disabled"; 1804 1805 hsi2c_37: i2c@14fd0000 { 1806 compatible = "samsung,exynos2200-hsi2c", 1807 "samsung,exynosautov9-hsi2c"; 1808 reg = <0x14fd0000 0xc0>; 1809 #address-cells = <1>; 1810 #size-cells = <0>; 1811 clocks = <&cmu_cmgp CLK_DOUT_CMGP_I2C>, 1812 <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>; 1813 clock-names = "hsi2c", "hsi2c_pclk"; 1814 interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH 0>; 1815 pinctrl-0 = <&hsi2c37_bus>; 1816 pinctrl-names = "default"; 1817 status = "disabled"; 1818 }; 1819 }; 1820 1821 usi_i2c_cmgp7: usi@14fe00c0 { 1822 compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi"; 1823 reg = <0x14fe00c0 0x20>; 1824 ranges; 1825 #address-cells = <1>; 1826 #size-cells = <1>; 1827 clocks = <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>, 1828 <&cmu_cmgp CLK_DOUT_CMGP_I2C>; 1829 clock-names = "pclk", "ipclk"; 1830 samsung,mode = <USI_MODE_I2C>; 1831 samsung,sysreg = <&syscon_cmgp 0x2080>; 1832 status = "disabled"; 1833 1834 hsi2c_38: i2c@14fe0000 { 1835 compatible = "samsung,exynos2200-hsi2c", 1836 "samsung,exynosautov9-hsi2c"; 1837 reg = <0x14fe0000 0xc0>; 1838 #address-cells = <1>; 1839 #size-cells = <0>; 1840 clocks = <&cmu_cmgp CLK_DOUT_CMGP_I2C>, 1841 <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>; 1842 clock-names = "hsi2c", "hsi2c_pclk"; 1843 interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH 0>; 1844 pinctrl-0 = <&hsi2c38_bus>; 1845 pinctrl-names = "default"; 1846 status = "disabled"; 1847 }; 1848 }; 1849 1850 cmu_vts: clock-controller@15300000 { 1851 compatible = "samsung,exynos2200-cmu-vts"; 1852 reg = <0x15300000 0x8000>; 1853 #clock-cells = <1>; 1854 1855 clocks = <&xtcxo>, 1856 <&cmu_top CLK_DOUT_CMU_VTS_DMIC>; 1857 clock-names = "oscclk", "dmic"; 1858 }; 1859 1860 pinctrl_vts: pinctrl@15320000 { 1861 compatible = "samsung,exynos2200-pinctrl"; 1862 reg = <0x15320000 0x1000>; 1863 }; 1864 1865 cmu_alive: clock-controller@15800000 { 1866 compatible = "samsung,exynos2200-cmu-alive"; 1867 reg = <0x15800000 0x8000>; 1868 #clock-cells = <1>; 1869 1870 clocks = <&xtcxo>, 1871 <&cmu_top CLK_DOUT_CMU_ALIVE_NOC>; 1872 clock-names = "oscclk", "noc"; 1873 }; 1874 1875 pinctrl_alive: pinctrl@15850000 { 1876 compatible = "samsung,exynos2200-pinctrl"; 1877 reg = <0x15850000 0x1000>; 1878 1879 wakeup-interrupt-controller { 1880 compatible = "samsung,exynos2200-wakeup-eint", 1881 "samsung,exynos850-wakeup-eint", 1882 "samsung,exynos7-wakeup-eint"; 1883 }; 1884 }; 1885 1886 pmu_system_controller: system-controller@15860000 { 1887 compatible = "samsung,exynos2200-pmu", 1888 "samsung,exynos7-pmu", "syscon"; 1889 reg = <0x15860000 0x10000>; 1890 1891 reboot: syscon-reboot { 1892 compatible = "syscon-reboot"; 1893 offset = <0x3c00>; /* SYSTEM_CONFIGURATION */ 1894 mask = <0x2>; /* SWRESET_SYSTEM */ 1895 value = <0x2>; /* reset value */ 1896 }; 1897 }; 1898 1899 cmu_top: clock-controller@1a320000 { 1900 compatible = "samsung,exynos2200-cmu-top"; 1901 reg = <0x1a320000 0x8000>; 1902 #clock-cells = <1>; 1903 1904 clocks = <&xtcxo>; 1905 clock-names = "oscclk"; 1906 }; 1907 }; 1908 1909 timer { 1910 compatible = "arm,armv8-timer"; 1911 interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW 0>, 1912 <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW 0>, 1913 <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW 0>, 1914 <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW 0>; 1915 /* 1916 * Non-updatable, broken stock Samsung bootloader does not 1917 * configure CNTFRQ_EL0 1918 */ 1919 clock-frequency = <25600000>; 1920 }; 1921}; 1922 1923#include "exynos2200-pinctrl.dtsi"
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