s5l8965x-opp.dtsi

 1// SPDX-License-Identifier: GPL-2.0+ OR MIT
 2/*
 3 * Operating points for Apple S5L8965X "A7" Rev A SoC, Up to 1392 MHz
 4 *
 5 * target-type: J71, J72, J73
 6 *
 7 * Copyright (c) 2024, Nick Chan <towinchenmi@gmail.com>
 8 */
 9
10/ {
11	cyclone_opp: opp-table {
12		compatible = "operating-points-v2";
13
14		opp01 {
15			opp-hz = /bits/ 64 <300000000>;
16			opp-level = <1>;
17			clock-latency-ns = <10000>;
18		};
19		opp02 {
20			opp-hz = /bits/ 64 <600000000>;
21			opp-level = <2>;
22			clock-latency-ns = <49000>;
23		};
24		opp03 {
25			opp-hz = /bits/ 64 <840000000>;
26			opp-level = <3>;
27			clock-latency-ns = <30000>;
28		};
29		opp04 {
30			opp-hz = /bits/ 64 <1128000000>;
31			opp-level = <4>;
32			clock-latency-ns = <39500>;
33		};
34		opp05 {
35			opp-hz = /bits/ 64 <1296000000>;
36			opp-level = <5>;
37			clock-latency-ns = <45500>;
38		};
39		opp06 {
40			opp-hz = /bits/ 64 <1392000000>;
41			opp-level = <6>;
42			clock-latency-ns = <46500>;
43		};
44	};
45};