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amlogic-s6.dtsi

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linux-6.19.14/arch/arm64/boot/dts/amlogic/amlogic-s6.dtsi DEVICETREE
  1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
  2/*
  3 * Copyright (c) 2025 Amlogic, Inc. All rights reserved.
  4 */
  5
  6#include <dt-bindings/interrupt-controller/irq.h>
  7#include <dt-bindings/interrupt-controller/arm-gic.h>
  8#include <dt-bindings/gpio/gpio.h>
  9#include <dt-bindings/pinctrl/amlogic,pinctrl.h>
 10#include <dt-bindings/power/amlogic,s6-pwrc.h>
 11/ {
 12	cpus {
 13		#address-cells = <2>;
 14		#size-cells = <0>;
 15
 16		cpu0: cpu@0 {
 17			device_type = "cpu";
 18			compatible = "arm,cortex-a510";
 19			reg = <0x0 0x0>;
 20			enable-method = "psci";
 21		};
 22
 23		cpu1: cpu@100 {
 24			device_type = "cpu";
 25			compatible = "arm,cortex-a510";
 26			reg = <0x0 0x100>;
 27			enable-method = "psci";
 28		};
 29
 30		cpu2: cpu@200 {
 31			device_type = "cpu";
 32			compatible = "arm,cortex-a510";
 33			reg = <0x0 0x200>;
 34			enable-method = "psci";
 35		};
 36
 37		cpu3: cpu@300 {
 38			device_type = "cpu";
 39			compatible = "arm,cortex-a510";
 40			reg = <0x0 0x300>;
 41			enable-method = "psci";
 42		};
 43	};
 44
 45	sm: secure-monitor {
 46		compatible = "amlogic,meson-gxbb-sm";
 47
 48		pwrc: power-controller {
 49			compatible = "amlogic,s6-pwrc";
 50			#power-domain-cells = <1>;
 51		};
 52	};
 53
 54	timer {
 55		compatible = "arm,armv8-timer";
 56		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
 57			     <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
 58			     <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
 59			     <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
 60	};
 61
 62	psci {
 63		compatible = "arm,psci-1.0";
 64		method = "smc";
 65	};
 66
 67	xtal: xtal-clk {
 68		compatible = "fixed-clock";
 69		clock-frequency = <24000000>;
 70		clock-output-names = "xtal";
 71		#clock-cells = <0>;
 72	};
 73
 74	soc {
 75		compatible = "simple-bus";
 76		#address-cells = <2>;
 77		#size-cells = <2>;
 78		ranges;
 79
 80		gic: interrupt-controller@ff200000 {
 81			compatible = "arm,gic-v3";
 82			#interrupt-cells = <3>;
 83			#address-cells = <0>;
 84			interrupt-controller;
 85			reg = <0x0 0xff200000 0 0x10000>,
 86			      <0x0 0xff240000 0 0x80000>;
 87			interrupts = <GIC_PPI 9 0xf04>;
 88		};
 89
 90		apb: bus@fe000000 {
 91			compatible = "simple-bus";
 92			reg = <0x0 0xfe000000 0x0 0x480000>;
 93			#address-cells = <2>;
 94			#size-cells = <2>;
 95			ranges = <0x0 0x0 0x0 0xfe000000 0x0 0x480000>;
 96
 97			uart_b: serial@7a000 {
 98				compatible = "amlogic,s6-uart",
 99					     "amlogic,meson-s4-uart";
100				reg = <0x0 0x7a000 0x0 0x18>;
101				interrupts = <GIC_SPI 169 IRQ_TYPE_EDGE_RISING>;
102				clocks = <&xtal>, <&xtal>, <&xtal>;
103				clock-names = "xtal", "pclk", "baud";
104				status = "disabled";
105			};
106
107			periphs_pinctrl: pinctrl@4000 {
108				compatible = "amlogic,pinctrl-s6";
109				#address-cells = <2>;
110				#size-cells = <2>;
111				ranges = <0x0 0x0 0x0 0x4000 0x0 0x340>;
112
113				gpioz: gpio@c0 {
114					reg = <0 0xc0 0 0x20>, <0 0x18 0 0x8>;
115					reg-names = "gpio", "mux";
116					gpio-controller;
117					#gpio-cells = <2>;
118					gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_Z<<8) 16>;
119				};
120
121				gpiox: gpio@100 {
122					reg = <0 0x100 0 0x30>, <0 0xc 0 0x8>;
123					reg-names = "gpio", "mux";
124					gpio-controller;
125					#gpio-cells = <2>;
126					gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_X<<8) 20>;
127				};
128
129				gpioh: gpio@140 {
130					reg = <0 0x140 0 0x20>, <0 0x2c 0 0x8>;
131					reg-names = "gpio", "mux";
132					gpio-controller;
133					#gpio-cells = <2>;
134					gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_H<<8) 9>;
135				};
136
137				gpiod: gpio@180 {
138					reg = <0 0x180 0 0x20>, <0 0x8 0 0x4>;
139					reg-names = "gpio", "mux";
140					gpio-controller;
141					#gpio-cells = <2>;
142					gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_D<<8) 7>;
143				};
144
145				gpiof: gpio@1a0 {
146					reg = <0 0x1a0 0 0x20>, <0 0x20 0 0x4>;
147					reg-names = "gpio", "mux";
148					gpio-controller;
149					#gpio-cells = <2>;
150					gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_F<<8) 5>;
151				};
152
153				gpioe: gpio@1c0 {
154					reg = <0 0x1c0 0 0x20>, <0 0x48 0 0x4>;
155					reg-names = "gpio", "mux";
156					gpio-controller;
157					#gpio-cells = <2>;
158					gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_E<<8) 3>;
159				};
160
161				gpioc: gpio@200 {
162					reg = <0 0x200 0 0x20>, <0 0x24 0 0x4>;
163					reg-names = "gpio", "mux";
164					gpio-controller;
165					#gpio-cells = <2>;
166					gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_C<<8) 8>;
167				};
168
169				gpiob: gpio@240 {
170					reg = <0 0x240 0 0x20>, <0 0x0 0 0x8>;
171					reg-names = "gpio", "mux";
172					gpio-controller;
173					#gpio-cells = <2>;
174					gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_B<<8) 14>;
175				};
176
177				gpioa: gpio@280 {
178					reg = <0 0x280 0 0x20>, <0 0x40 0 0x8>;
179					reg-names = "gpio", "mux";
180					gpio-controller;
181					#gpio-cells = <2>;
182					gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_A<<8) 16>;
183				};
184
185				test_n: gpio@2c0 {
186					reg = <0 0x2c0 0 0x20>;
187					reg-names = "gpio";
188					gpio-controller;
189					#gpio-cells = <2>;
190					gpio-ranges =
191						<&periphs_pinctrl 0 (AMLOGIC_GPIO_TEST_N<<8) 1>;
192				};
193
194				gpiocc: gpio@300 {
195					reg = <0 0x300 0 0x20>, <0 0x14 0 0x4>;
196					reg-names = "gpio", "mux";
197					gpio-controller;
198					#gpio-cells = <2>;
199					gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_CC<<8) 2>;
200				};
201			};
202
203			gpio_intc: interrupt-controller@4080 {
204				compatible = "amlogic,s6-gpio-intc",
205					     "amlogic,meson-gpio-intc";
206				reg = <0x0 0x4080 0x0 0x20>;
207				interrupt-controller;
208				#interrupt-cells = <2>;
209				amlogic,channel-interrupts =
210					<10 11 12 13 14 15 16 17 18 19 20 21>;
211			};
212
213			ao-secure@10220 {
214				compatible = "amlogic,s6-ao-secure",
215					     "amlogic,meson-gx-ao-secure",
216					     "syscon";
217				reg = <0x0 0x10220 0x0 0x140>;
218				amlogic,has-chip-id;
219			};
220		};
221	};
222};
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